tree e5d2d73ec5b5e1497ec56d8944f6e6f03caac9d5
parent 8b3e233e8121d241a93f27a093c1440673d3a7ff
author Dinh Nguyen <dinguyen@altera.com> 1399469489 -0500
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1401230562 -0700

usb: dwc2: Add function to calculate correct FIFO sizes

The dwc2 IP on the SOCFPGA cannot use the default HW configured
FIFO sizes. The total FIFO depth as read from GHWCFG3 reports 0x1f80 or 8064
32-bit words. But the GRXFSIZ, GNPTXFSIZ, and HPTXFSIZ register defaults
to 0x2000 or 8192 32-bit words. So the driver cannot just use the fifo sizes
as read from those registers.

For platforms that face the same issue, this commits sets the RX, periodic TX,
and non-periodic TX fifo size to those that are recommended v2.93a spec for
the DWC2 IP. Implements Method #2 from the Synopsys v2.93a spec for the DWC2.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>