| commit | 136ff2a272ad4bee33bf85f8c490ff8a2dd08f96 | [log] [tgz] |
|---|---|---|
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | Tue Apr 20 12:56:18 2010 +0900 |
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Wed Apr 21 01:41:26 2010 +0900 |
| tree | 4f8876c8acdb816e432916f5cd8ad84e1533cdd0 | |
| parent | 4f6f22d7bef77dfb6b27eaed4240784339c546e6 [diff] |
ASoC: Support FLL input clock selection on WM8994 The WM8994 FLL can be clocked from one of four inputs, the two MCLKs and the LRCLK and BCLK of the AIF associated with the FLL. Allow all four inputs to be used rather than defaulting to MCLK1. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>