tree 30992f70579cb4fedf909f96f557e5b9c9098410
parent 21e4903246029e221ee92e3be3653f2805fac898
author Rhyland Klein <rklein@nvidia.com> 1452799471 -0500
committer Thierry Reding <treding@nvidia.com> 1453726590 +0100

clk: tegra: Remove improper flags for lock_enable

Most PLL's don't actually have LOCK_ENABLE bits. However, most PLL's
also had that flag set, which meant that the clk code was trying to
enable locks, and inadvertantly flipping bits in other fields.

For PLLM, ensure the correct register is used for the misc_register.
PLL_MISC0 contains the EN_LCKDET bit which should be used for enabling
the lock, and PLLM_MISC1 shouldn't be used at all.

Lastly, remove some of the settings which would point to the EN_LCKDET
bits for some PLLs. There is no need to enable the locks, and that is
done as part of the set_defaults logic already.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>