commit | a91de84b7874d5fa95477005179b66c97723bc36 | [log] [tgz] |
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author | Siddhartha Agrawal <agrawals@codeaurora.org> | Mon Aug 25 10:41:10 2014 -0700 |
committer | Narendra Muppalla <NarendraM@codeaurora.org> | Fri Jan 13 15:40:45 2017 -0800 |
tree | a399ccfeb687338d2a53f61429e85bbd0749b4c8 | |
parent | cee50fd138afc32b0825bb87e3c8532897ff85fa [diff] |
clk: mdss: shutdown 20nm PHY pll properly to fix power issue The second DSI PLL is consuming power when it is in reset state. Configure the needed registers to shutdown the second DSI PLL properly even though its not been used. Add these register configurations whenever mdss gdsc is toggled. Change-Id: I008bc102795ccb5991bf4b61545c2d672b453392 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>