drm/msm/dsi-staging: fix idle power collapse exit sequence for PHY v3
Ensure that the escape clock is turned on prior to reinitializing
the DSI PHY when exiting idle power collapse. This will ensure that
there are no spurious transitions on the lanes after the PHY clamps
are removed.
Change-Id: Ic7ce1af62581b71d2a610b18381c9c57eb80696c
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c b/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
index 6a7a84c..2e2d0d8 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_phy.c
@@ -902,6 +902,26 @@
}
/**
+ * dsi_phy_set_clamp_state() - configure clamps for DSI lanes
+ * @phy: DSI PHY handle.
+ * @enable: boolean to specify clamp enable/disable.
+ *
+ * Return: error code.
+ */
+int dsi_phy_set_clamp_state(struct msm_dsi_phy *phy, bool enable)
+{
+ if (!phy)
+ return -EINVAL;
+
+ pr_debug("[%s] enable=%d\n", phy->name, enable);
+
+ if (phy->hw.ops.clamp_ctrl)
+ phy->hw.ops.clamp_ctrl(&phy->hw, enable);
+
+ return 0;
+}
+
+/**
* dsi_phy_idle_ctrl() - enable/disable DSI PHY during idle screen
* @phy: DSI PHY handle
* @enable: boolean to specify PHY enable/disable.