commit 1918707556986e9460682845a2bf4055c43a8b65
author Ben Skeggs <bskeggs@redhat.com> Thu Aug 20 14:54:14 2015 +1000
committer Ben Skeggs <bskeggs@redhat.com> Fri Aug 28 12:40:27 2015 +1000
tree 805a64603ab9f3f210c66dd51fb07a3b6e30394b
parent 45ea503161af6e94d593a59e8cca8981d0435d5c

drm/nouveau/bar: switch to gpuobj accessor macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
index 09e36b6..b997d8d 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c
@@ -122,10 +122,12 @@
 	if (ret)
 		return ret;
 
-	nv_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
-	nv_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
-	nv_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
-	nv_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
+	nvkm_kmap(bar_vm->mem);
+	nvkm_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
+	nvkm_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
+	nvkm_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
+	nvkm_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
+	nvkm_done(bar_vm->mem);
 	return 0;
 }
 

drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
index a47d64d..6909e52 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c
@@ -166,13 +166,15 @@
 	if (ret)
 		return ret;
 
-	nv_wo32(bar->bar3, 0x00, 0x7fc00000);
-	nv_wo32(bar->bar3, 0x04, lower_32_bits(limit));
-	nv_wo32(bar->bar3, 0x08, lower_32_bits(start));
-	nv_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 |
-				  upper_32_bits(start));
-	nv_wo32(bar->bar3, 0x10, 0x00000000);
-	nv_wo32(bar->bar3, 0x14, 0x00000000);
+	nvkm_kmap(bar->bar3);
+	nvkm_wo32(bar->bar3, 0x00, 0x7fc00000);
+	nvkm_wo32(bar->bar3, 0x04, lower_32_bits(limit));
+	nvkm_wo32(bar->bar3, 0x08, lower_32_bits(start));
+	nvkm_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 |
+				   upper_32_bits(start));
+	nvkm_wo32(bar->bar3, 0x10, 0x00000000);
+	nvkm_wo32(bar->bar3, 0x14, 0x00000000);
+	nvkm_done(bar->bar3);
 
 	/* BAR1 */
 	start = 0x0000000000ULL;
@@ -193,13 +195,15 @@
 	if (ret)
 		return ret;
 
-	nv_wo32(bar->bar1, 0x00, 0x7fc00000);
-	nv_wo32(bar->bar1, 0x04, lower_32_bits(limit));
-	nv_wo32(bar->bar1, 0x08, lower_32_bits(start));
-	nv_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 |
-				  upper_32_bits(start));
-	nv_wo32(bar->bar1, 0x10, 0x00000000);
-	nv_wo32(bar->bar1, 0x14, 0x00000000);
+	nvkm_kmap(bar->bar1);
+	nvkm_wo32(bar->bar1, 0x00, 0x7fc00000);
+	nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit));
+	nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start));
+	nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 |
+				   upper_32_bits(start));
+	nvkm_wo32(bar->bar1, 0x10, 0x00000000);
+	nvkm_wo32(bar->bar1, 0x14, 0x00000000);
+	nvkm_done(bar->bar1);
 
 	bar->base.alloc = nvkm_bar_alloc;
 	bar->base.kmap = nv50_bar_kmap;