| commit | 1a6472768a40a17fbf6abce3664e93bff5b1b69b | [log] [tgz] |
|---|---|---|
| author | Deepak Katragadda <dkatraga@codeaurora.org> | Fri Apr 21 14:16:44 2017 -0700 |
| committer | Deepak Katragadda <dkatraga@codeaurora.org> | Fri Apr 21 14:16:44 2017 -0700 |
| tree | c18f8557419f279fd1b3a9f77a3fafeffc2eb6ab | |
| parent | 925b22073122b46ce228360c69700f8d3f6ded43 [diff] |
clk: qcom: gcc-sdm845: Add reset clock registers for PCIE PHY on SDM845 Add the missing PCIE PHY BCR register modelling on SDM845. Change-Id: I6791abaaf56d3fb5181126516d1c911117ac0444 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>