| commit | 1ab23380f8b990ad865349040ec14c3ebe3a09c5 | [log] [tgz] |
|---|---|---|
| author | Satheeshakrishna M <satheeshakrishna.m@intel.com> | Fri Aug 22 09:49:06 2014 +0530 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Thu Apr 16 11:29:05 2015 +0200 |
| tree | 0862b833474b5e9e86a743667a51aa4f5930715d | |
| parent | 535afa2e9e3c1867460d6981d879b04d8b2b9ab3 [diff] |
drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9 PORT_CLK_SEL programming is needed only on HSW/BDW. v2: - don't program PORT_CLK_SEL from mst encoders either (imre) v3: - fix the check for GEN9+ in intel_mst_pre_enable_dp() (damien) Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>