firewire: ohci: enable cycle timer fix on ALi and NEC controllers
Discussed in "read_cycle_timer backwards for sub-cycle 0000, 0001",
http://thread.gmane.org/gmane.linux.kernel.firewire.devel/13704
Known bad controllers:
ALi M5271, listed by lspci as M5253 [10b9:5253]
NEC OrangeLink [1033:00cd] (rev 03)
NEC uPD72874 [1033:00f2] (rev 01)
VIA VT6306 [1106:3044] (rev 46)
VIA VT6308P, listed by lspci as rev c0
Reported-by: Pieter Palmers <pieterp@joow.be>
Reported-by: Håkan Johansson <f96hajo@chalmers.se>
Reported-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index d6ba897..bf5e112 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -1817,13 +1817,14 @@
c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
} else {
/*
- * VIA controllers have two bugs when updating the iso cycle
- * timer register:
- * 1) When the lowest six bits are wrapping around to zero,
+ * Some controllers exhibit one or more of the following bugs
+ * when updating the iso cycle timer register:
+ * - When the lowest six bits are wrapping around to zero,
* a read that happens at the same time will return garbage
* in the lowest ten bits.
- * 2) When the cycleOffset field wraps around to zero, the
+ * - When the cycleOffset field wraps around to zero, the
* cycleCount field is not incremented for about 60 ns.
+ * - Occasionally, the entire register reads zero.
*
* To catch these, we read the register three times and ensure
* that the difference between each two consecutive reads is
@@ -2542,7 +2543,9 @@
#endif
ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI;
- ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_VIA;
+ ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_AL ||
+ dev->vendor == PCI_VENDOR_ID_NEC ||
+ dev->vendor == PCI_VENDOR_ID_VIA;
ar_context_init(&ohci->ar_request_ctx, ohci,
OHCI1394_AsReqRcvContextControlSet);