SPI: add CSR SiRFprimaII SPI controller driver
CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
* Master and slave modes
* 8-/12-/16-/32-bit data unit
* 256 bytes receive data FIFO and 256 bytes transmit data FIFO
* Multi-unit frame
* Configurable SPI_EN (chip select pin) active state
* Configurable SPI_CLK polarity
* Configurable SPI_CLK phase
* Configurable MSB/LSB first
Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 566ff7b..3508648 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -336,6 +336,13 @@
help
SPI driver for SuperH HSPI blocks.
+config SPI_SIRF
+ tristate "CSR SiRFprimaII SPI controller"
+ depends on ARCH_PRIMA2
+ select SPI_BITBANG
+ help
+ SPI driver for CSR SiRFprimaII SoCs
+
config SPI_STMP3XXX
tristate "Freescale STMP37xx/378x SPI/SSP controller"
depends on ARCH_STMP3XXX