tree 6aea0ca61ab79112f1a1416744ecb97c7a594cdd
parent 254003926eed24344c23509a743d0bc281e0eb95
author Damien Lespiau <damien.lespiau@intel.com> 1425667853 +0000
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1426627808 +0100

drm/i915/skl: Restore the DDI translation tables when enabling PW1

I was dumping the DDI translation tables to make sure my patch updating
the HDMI entry was doing the right thing when I noticed that the table
was showing reset values after DPMS.

And indeed, the DDI translation registers are in power well 1 on SKL,
and so we're losing their values when shutting down eDP.

Calling intel_prepare_ddi() on PW1 enabling re-programs the table.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>