Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
diff --git a/include/asm-ia64/sn/rw_mmr.h b/include/asm-ia64/sn/rw_mmr.h
new file mode 100644
index 0000000..f40fd1a
--- /dev/null
+++ b/include/asm-ia64/sn/rw_mmr.h
@@ -0,0 +1,74 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002-2004 Silicon Graphics, Inc. All Rights Reserved.
+ */
+#ifndef _ASM_IA64_SN_RW_MMR_H
+#define _ASM_IA64_SN_RW_MMR_H
+
+
+/*
+ * This file contains macros used to access MMR registers via
+ * uncached physical addresses.
+ * pio_phys_read_mmr - read an MMR
+ * pio_phys_write_mmr - write an MMR
+ * pio_atomic_phys_write_mmrs - atomically write 1 or 2 MMRs with psr.ic=0
+ * Second MMR will be skipped if address is NULL
+ *
+ * Addresses passed to these routines should be uncached physical addresses
+ * ie., 0x80000....
+ */
+
+
+extern inline long
+pio_phys_read_mmr(volatile long *mmr)
+{
+ long val;
+ asm volatile
+ ("mov r2=psr;;"
+ "rsm psr.i | psr.dt;;"
+ "srlz.i;;"
+ "ld8.acq %0=[%1];;"
+ "mov psr.l=r2;;"
+ "srlz.i;;"
+ : "=r"(val)
+ : "r"(mmr)
+ : "r2");
+ return val;
+}
+
+
+
+extern inline void
+pio_phys_write_mmr(volatile long *mmr, long val)
+{
+ asm volatile
+ ("mov r2=psr;;"
+ "rsm psr.i | psr.dt;;"
+ "srlz.i;;"
+ "st8.rel [%0]=%1;;"
+ "mov psr.l=r2;;"
+ "srlz.i;;"
+ :: "r"(mmr), "r"(val)
+ : "r2", "memory");
+}
+
+extern inline void
+pio_atomic_phys_write_mmrs(volatile long *mmr1, long val1, volatile long *mmr2, long val2)
+{
+ asm volatile
+ ("mov r2=psr;;"
+ "rsm psr.i | psr.dt | psr.ic;;"
+ "cmp.ne p9,p0=%2,r0;"
+ "srlz.i;;"
+ "st8.rel [%0]=%1;"
+ "(p9) st8.rel [%2]=%3;;"
+ "mov psr.l=r2;;"
+ "srlz.i;;"
+ :: "r"(mmr1), "r"(val1), "r"(mmr2), "r"(val2)
+ : "p9", "r2", "memory");
+}
+
+#endif /* _ASM_IA64_SN_RW_MMR_H */