| commit | 1de9b21633d669668b089bc88a67c4cd74a89a1c | [log] [tgz] |
|---|---|---|
| author | Shunli Wang <shunli.wang@mediatek.com> | Fri Aug 19 13:34:51 2016 +0800 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Fri Aug 19 12:18:41 2016 -0700 |
| tree | 7dbc8031e01b3d6add8cd134e66038d66f16dafc | |
| parent | 6a5887030a4a92cd27cfa1aee5be2a8c137975fa [diff] |
clk: mediatek: Add dt-bindings for MT2701 clocks Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>