| commit | 1ec7032ad517714108cc53a6ee7067276ca21e80 | [log] [tgz] |
|---|---|---|
| author | Thierry Reding <treding@nvidia.com> | Mon Apr 20 14:34:57 2015 +0200 |
| committer | Thierry Reding <treding@nvidia.com> | Thu Apr 28 12:41:47 2016 +0200 |
| tree | e852e5e9f0788c4dc448f0c9fe41c43e533a82f8 | |
| parent | 07314fc108e195044c074f4b443974b5aaa2d5d7 [diff] |
clk: tegra: Add fixed factor peripheral clock type Some of the peripheral clocks on Tegra are derived from one of the top- level PLLs with a fixed factor. Support these clocks by implementing the ->enable() and ->disable() callbacks using the peripheral clock register banks and the ->recalc_rate() by dividing the parent rate by the fixed factor. Signed-off-by: Thierry Reding <treding@nvidia.com>