| commit | 1f5826bd0ed6c0abec3da28dfffb8d12f0c2cb81 | [log] [tgz] |
|---|---|---|
| author | Chris Dearman <chris@mips.com> | Mon May 08 18:02:16 2006 +0100 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Wed Mar 12 14:14:40 2008 +0000 |
| tree | 734b934e846b902faf7d10d4ae104b27956eaeb0 | |
| parent | 0ec734c2b8b005667ffdaef8610d1024630683b0 [diff] |
[MIPS] Added missing cases for rdhwr emulation Some of these are architecturally required for R2 processors so lets try to be bit closer to the real thing. This also provides access to the CPU cycle timer, even on multiprocessors. In that aspect its currently bug compatible to what would happen on a R2-based SMP. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>