ARM: S3C2412: SoC has the fractional baud rate register
The S3C2412 has a fractional baud rate register, this patch adds the
corresponding flag to the UART definition to allow generation of more
precise baud rates for the various clock combinations.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce75e28..1700b1a 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -102,6 +102,7 @@
.name = "Samsung S3C2412 UART",
.type = PORT_S3C2412,
.fifosize = 64,
+ .has_divslot = 1,
.rx_fifomask = S3C2440_UFSTAT_RXMASK,
.rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
.rx_fifofull = S3C2440_UFSTAT_RXFULL,