| commit | 0cdba07bb23cdd3e0d64357ec3d983e6b75e541f | [log] [tgz] |
|---|---|---|
| author | Dave Airlie <airlied@redhat.com> | Tue May 05 08:39:24 2009 +0200 |
| committer | Jean Delvare <khali@linux-fr.org> | Tue May 05 08:39:24 2009 +0200 |
| tree | 2be7fb0ed8b0e1a7a478d79e33fc742daa27fb35 | |
| parent | 4ccc28f725bc2b7b0a3bc27e9c15f4eaf63fb812 [diff] |
i2c-algo-bit: Fix timeout test When fetching DDC using i2c algo bit, we were often seeing timeouts before getting valid EDID on a retry. The VESA spec states 2ms is the DDC timeout, so when this translates into 1 jiffie and we are close to the end of the time period, it could return with a timeout less than 2ms. Change this code to use time_after instead of time_after_eq. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>