tree fd940074a312d252976da05f7e4457c446e14027
parent 4c4925c1f4ccd72002957c3e73b4f117f2bcf712
author Nicolas Pitre <nico@cam.org> 1206981511 -0400
committer Lennert Buytenhek <buytenh@marvell.com> 1214167478 +0200

[ARM] cache align destination pointer when copying memory for some processors

The implementation for memory copy functions on ARM had a (disabled)
provision for aligning the source pointer before loading registers with
data.  Turns out that aligning the _destination_ pointer is much more
useful, as the read side is already sufficiently helped with the use of
preload.

So this changes the definition of the CALGN() macro to target the
destination pointer instead, and turns it on for Feroceon processors
where the gain is very noticeable.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>