| commit | 231957aebbaf23ac43c066f7797d8700a1f7fe5b | [log] [tgz] |
|---|---|---|
| author | Taniya Das <tdas@codeaurora.org> | Wed Apr 22 12:45:50 2020 +0530 |
| committer | Taniya Das <tdas@codeaurora.org> | Thu Apr 23 10:00:36 2020 +0530 |
| tree | d1d7384b894c8b2ff6d71ffce4711808aaeb8490 | |
| parent | 4a520b70ba486c131728f6c7f88d8bef92c4bb0f [diff] |
clk: qcom: alpha-pll: Check for PLL run condition for Fabia PLL The PLL could be enabled previously to HLOS and sourcing to the RCG. In those cases where the clock driver receives the enable request it would temporarily disable the PLL output. Thus handle such condition if PLL is already enabled. Change-Id: I75118c09ff67a35d866dabea4a948e7401915f9a Signed-off-by: Taniya Das <tdas@codeaurora.org>