commit 24178ec42b0985d485886bc43b97e54ff173627e
author Alex Deucher <alexander.deucher@amd.com> Thu Jan 24 15:00:17 2013 -0500
committer Alex Deucher <alexander.deucher@amd.com> Thu Jan 31 16:24:58 2013 -0500
tree 7179ec2f9c917fb36477feb4a12e0d9b53c6e22d
parent 123bc1832c33218dfa677a88c2c54bc1a48a9e72

drm/radeon: don't reset the MC on IGPs/APUs

The MC isn't part of the GPU per se.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/radeon/evergreen.c

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 045955d..2916de8 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2500,8 +2500,10 @@
 	if (reset_mask & RADEON_RESET_VMC)
 		srbm_soft_reset |= SOFT_RESET_VMC;
 
-	if (reset_mask & RADEON_RESET_MC)
-		srbm_soft_reset |= SOFT_RESET_MC;
+	if (!(rdev->flags & RADEON_IS_IGP)) {
+		if (reset_mask & RADEON_RESET_MC)
+			srbm_soft_reset |= SOFT_RESET_MC;
+	}
 
 	if (grbm_soft_reset) {
 		tmp = RREG32(GRBM_SOFT_RESET);

drivers/gpu/drm/radeon/ni.c

diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index b6e8055..170bd03 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1474,8 +1474,10 @@
 	if (reset_mask & RADEON_RESET_VMC)
 		srbm_soft_reset |= SOFT_RESET_VMC;
 
-	if (reset_mask & RADEON_RESET_MC)
-		srbm_soft_reset |= SOFT_RESET_MC;
+	if (!(rdev->flags & RADEON_IS_IGP)) {
+		if (reset_mask & RADEON_RESET_MC)
+			srbm_soft_reset |= SOFT_RESET_MC;
+	}
 
 	if (grbm_soft_reset) {
 		tmp = RREG32(GRBM_SOFT_RESET);

drivers/gpu/drm/radeon/r600.c

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 3f29276..dbcb075 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1475,8 +1475,10 @@
 	if (reset_mask & RADEON_RESET_GRBM)
 		srbm_soft_reset |= S_000E60_SOFT_RESET_GRBM(1);
 
-	if (reset_mask & RADEON_RESET_MC)
-		srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1);
+	if (!(rdev->flags & RADEON_IS_IGP)) {
+		if (reset_mask & RADEON_RESET_MC)
+			srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1);
+	}
 
 	if (reset_mask & RADEON_RESET_VMC)
 		srbm_soft_reset |= S_000E60_SOFT_RESET_VMC(1);