OMAP3+: VC: abstract out channel configuration
VC channel configuration is programmed based on settings coming from
the PMIC configuration.
Currently, the VC channel to PMIC mapping is a simple one-to-one
mapping. Whenever a VC channel parameter is configured (i2c slave
addres, PMIC register address, on/ret/off command), the corresponding
bits are enabled in the VC channel configuration register.
If necessary, the programmability of channel configuration settings
could be extended to board/PMIC files, however, because this patch
changes the channel configuration to be programmed based on existing
values from the PMIC settings, it may not be required.
Also note that starting with OMAP4, where there are more than 2
channels, one channel is identified as the "default" channel. When
any of the bits in the channel config for the other channels are zero,
it means to use the default channel. The OMAP4 TRM (at least through
NDA version Q) is wrong in describing which is the default channel.
The default channel on OMAP4 is MPU, not CORE as decribed in the TRM.
Signed-off-by: Kevin Hilman <khilman@ti.com>
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 6e8806b..4e19137 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -54,8 +54,12 @@
u8 cmd_onlp_shift;
u8 cmd_ret_shift;
u8 cmd_off_shift;
+ u8 cfg_channel_reg;
};
+/* omap_vc_channel.flags values */
+#define OMAP_VC_CHANNEL_DEFAULT BIT(0)
+
/**
* struct omap_vc_channel - VC per-instance data
* @i2c_slave_addr: I2C slave address of PMIC for this VC channel
@@ -67,6 +71,7 @@
* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
* @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
* @cmdval_reg: register for on/ret/off voltage level values for this channel
+ * @flags: VC channel-specific flags (optional)
*/
struct omap_vc_channel {
/* channel state */
@@ -74,6 +79,7 @@
u16 volt_reg_addr;
u16 cmd_reg_addr;
u16 setup_time;
+ u8 cfg_channel;
/* register access data */
const struct omap_vc_common *common;
@@ -81,6 +87,8 @@
u32 smps_volra_mask;
u32 smps_cmdra_mask;
u8 cmdval_reg;
+ u8 cfg_channel_sa_shift;
+ u8 flags;
};
extern struct omap_vc_channel omap3_vc_mpu;