Merge "dwc3: Use logging APIs to log events, errors and setup packet" into msm-4.9
diff --git a/Documentation/devicetree/bindings/arm/msm/wil6210.txt b/Documentation/devicetree/bindings/arm/msm/wil6210.txt
new file mode 100644
index 0000000..b381bdeb
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/wil6210.txt
@@ -0,0 +1,52 @@
+wil6210 - Qualcomm Technologies Inc. 802.11ad Wireless Driver
+
+wil6210 driver is responsible for managing 802.11ad chipset
+connected to MSM over PCIe interface.
+
+The platform data is needed in order to perform proper
+bus-scaling and SMMU initialization by the driver.
+
+Required properties:
+
+- compatible: "qcom,wil6210"
+- qcom,smmu-support: Boolean flag indicating whether PCIe has SMMU support
+- qcom,pcie-parent: phandle for the PCIe root complex to which 11ad card is connected
+- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
+ the below optional properties:
+ - qcom,msm-bus,name
+ - qcom,msm-bus,num-cases
+ - qcom,msm-bus,num-paths
+ - qcom,msm-bus,vectors-KBps
+
+Optional properties:
+- qcom,sleep-clk-en: GPIO for sleep clock used for low power modes by 11ad card
+- qcom,wigig-en: Enable GPIO connected to 11ad card
+- qcom,use-ext-supply: Boolean flag to indicate if 11ad SIP uses external power supply
+- vdd-supply: phandle to 11ad VDD regulator node
+- vddio-supply: phandle to 11ad VDDIO regulator node
+- qcom,use-ext-clocks: Boolean flag to indicate if 11ad SIP uses external clocks
+- clocks : List of phandle and clock specifier pairs
+- clock-names : List of clock input name strings sorted in the same
+ order as the clocks property.
+
+Example:
+ wil6210: qcom,wil6210 {
+ compatible = "qcom,wil6210";
+ qcom,smmu-support;
+ qcom,pcie-parent = <&pcie1>;
+ qcom,wigig-en = <&tlmm 94 0>;
+ qcom,msm-bus,name = "wil6210";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <100 512 0 0>,
+ <100 512 600000 800000>; /* ~4.6Gbps (MCS12) */
+ qcom,use-ext-supply;
+ vdd-supply= <&pm8998_s7>;
+ vddio-supply= <&pm8998_s5>;
+ qcom,use-ext-clocks;
+ clocks = <&clock_gcc clk_rf_clk3>,
+ <&clock_gcc clk_rf_clk3_pin>;
+ clock-names = "rf_clk3_clk", "rf_clk3_pin_clk";
+ };
+
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qcom-geni.txt b/Documentation/devicetree/bindings/i2c/qcom,i2c-qcom-geni.txt
new file mode 100644
index 0000000..f6b7552
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qcom-geni.txt
@@ -0,0 +1,22 @@
+GENI based Qualcomm Technologies Inc Universal Peripheral version 3 (QUPv3)
+ I2C controller
+
+Required properties:
+ - compatible: Should be:
+ * "qcom,i2c-geni.
+ - reg: Should contain QUP register address and length.
+ - interrupts: Should contain I2C interrupt.
+ - #address-cells: Should be <1> Address cells for i2c device address
+ - #size-cells: Should be <0> as i2c addresses have no size component
+
+Child nodes should conform to i2c bus binding.
+
+Example:
+
+i2c@a94000 {
+ compatible = "qcom,i2c-geni";
+ reg = <0xa94000 0x4000>;
+ interrupts = <GIC_SPI 358 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+};
diff --git a/Documentation/devicetree/bindings/qdsp/msm-cdsp-loader.txt b/Documentation/devicetree/bindings/qdsp/msm-cdsp-loader.txt
new file mode 100644
index 0000000..155514f
--- /dev/null
+++ b/Documentation/devicetree/bindings/qdsp/msm-cdsp-loader.txt
@@ -0,0 +1,16 @@
+Qualcomm Technologies, Inc. CDSP Loader Driver
+
+msm-cdsp-loader driver implements the mechanism that allows to load CDSP firmware images.
+
+Required properties:
+
+ - compatible: This must be "qcom,msm-cdsp-loader".
+ - qcom,proc-img-to-load: CDSP firmware name, must be "cdsp".
+
+Example:
+ The following for sdm660.
+
+ qcom,msm-cdsp-loader {
+ compatible = "qcom,cdsp-loader";
+ qcom,proc-img-to-load = "cdsp";
+ };
diff --git a/Documentation/media/uapi/v4l/pixfmt-007.rst b/Documentation/media/uapi/v4l/pixfmt-007.rst
index 44bb5a7..95a23a2 100644
--- a/Documentation/media/uapi/v4l/pixfmt-007.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-007.rst
@@ -211,7 +211,13 @@
The :ref:`srgb` standard defines the colorspace used by most webcams
and computer graphics. The default transfer function is
``V4L2_XFER_FUNC_SRGB``. The default Y'CbCr encoding is
-``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is full range.
+``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is limited range.
+
+Note that the :ref:`sycc` standard specifies full range quantization,
+however all current capture hardware supported by the kernel convert
+R'G'B' to limited range Y'CbCr. So choosing full range as the default
+would break how applications interpret the quantization range.
+
The chromaticities of the primary colors and the white reference are:
@@ -276,7 +282,7 @@
Y' is clamped to the range [0…1] and Cb and Cr are clamped to the range
[-0.5…0.5]. This transform is identical to one defined in SMPTE
-170M/BT.601. The Y'CbCr quantization is full range.
+170M/BT.601. The Y'CbCr quantization is limited range.
.. _col-adobergb:
@@ -288,10 +294,15 @@
graphics that use the AdobeRGB colorspace. This is also known as the
:ref:`oprgb` standard. The default transfer function is
``V4L2_XFER_FUNC_ADOBERGB``. The default Y'CbCr encoding is
-``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is full
-range. The chromaticities of the primary colors and the white reference
-are:
+``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is limited
+range.
+Note that the :ref:`oprgb` standard specifies full range quantization,
+however all current capture hardware supported by the kernel convert
+R'G'B' to limited range Y'CbCr. So choosing full range as the default
+would break how applications interpret the quantization range.
+
+The chromaticities of the primary colors and the white reference are:
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
@@ -344,7 +355,7 @@
Y' is clamped to the range [0…1] and Cb and Cr are clamped to the range
[-0.5…0.5]. This transform is identical to one defined in SMPTE
-170M/BT.601. The Y'CbCr quantization is full range.
+170M/BT.601. The Y'CbCr quantization is limited range.
.. _col-bt2020:
diff --git a/Makefile b/Makefile
index 18d0eaa..30807c0 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 9
-SUBLEVEL = 9
+SUBLEVEL = 12
EXTRAVERSION =
NAME = Roaring Lionus
diff --git a/arch/arc/kernel/unaligned.c b/arch/arc/kernel/unaligned.c
index 91ebe38..5f69c3b 100644
--- a/arch/arc/kernel/unaligned.c
+++ b/arch/arc/kernel/unaligned.c
@@ -243,7 +243,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
/* clear any remanants of delay slot */
if (delay_mode(regs)) {
- regs->ret = regs->bta ~1U;
+ regs->ret = regs->bta & ~1U;
regs->status32 &= ~STATUS_DE_MASK;
} else {
regs->ret += state.instr_len;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 00be82f..63ea69d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -548,6 +548,31 @@
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
+config ARCH_QCOM
+ bool "Qualcomm MSM (non-multiplatform)"
+ select ARCH_REQUIRE_GPIOLIB
+ select CPU_V7
+ select AUTO_ZRELADDR
+ select HAVE_SMP
+ select CLKDEV_LOOKUP
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_ALLOCATOR
+ select ARM_PATCH_PHYS_VIRT
+ select ARM_HAS_SG_CHAIN
+ select ARCH_HAS_OPP
+ select SOC_BUS
+ select MULTI_IRQ_HANDLER
+ select PM_OPP
+ select SPARSE_IRQ
+ select USE_OF
+ select PINCTRL
+ help
+ Support for Qualcomm MSM/QSD based systems. This runs on the
+ apps processor of the MSM/QSD and depends on a shared memory
+ interface to the modem processor which runs the baseband
+ stack and controls some vital subsystems
+ (clock and power control, etc).
+
config ARCH_RPC
bool "RiscPC"
depends on MMU
@@ -1478,7 +1503,7 @@
config ARCH_NR_GPIO
int
default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
- ARCH_ZYNQ
+ ARCH_ZYNQ || ARCH_QCOM
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
default 416 if ARCH_SUNXI
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 17dcd94..771896f 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1712,7 +1712,7 @@
config UNCOMPRESS_INCLUDE
string
default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \
- PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
+ ARCH_QCOM || PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
default "mach/uncompress.h"
config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index b53a7b4..f56516c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -309,6 +309,8 @@
KBUILD_DTBS := dtbs
endif
+DTSSUBDIR := qcom
+
all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
boot := arch/arm/boot
@@ -337,13 +339,9 @@
%.dtb: | scripts
$(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
-PHONY += dtbs dtbs_install
-
-dtbs: prepare scripts
- $(Q)$(MAKE) $(build)=$(boot)/dts
-
-dtbs_install:
- $(Q)$(MAKE) $(dtbinst)=$(boot)/dts
+dtbs: scripts
+ $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) dtbs
+ $(foreach DIR, $(DTSSUBDIR), $(Q)$(MAKE) $(build)=$(boot)/dts/$(DIR) MACHINE=$(MACHINE) dtbs)
PHONY += vdso_install
vdso_install:
@@ -352,7 +350,7 @@
endif
zImage-dtb: vmlinux scripts dtbs
- $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
+ $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) DTSSUBDIR=$(DTSSUBDIR) $(boot)/$@
# We use MRPROPER_FILES and CLEAN_FILES now
archclean:
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index da75630..4175dfe 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -13,10 +13,11 @@
OBJCOPYFLAGS :=-O binary -R .comment -S
-ifneq ($(MACHINE),)
-include $(MACHINE)/Makefile.boot
-endif
include $(srctree)/arch/arm/boot/dts/Makefile
+ifneq ($(DTSSUBDIR),)
+DTSSUBDIR_INCS=$(foreach DIR, $(DTSSUBDIR), $(addsuffix /Makefile, $(addprefix $(srctree)/arch/arm/boot/dts/, $(DIR))))
+include $(DTSSUBDIR_INCS)
+endif
# Note: the following conditions must always be true:
# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 54f95d3..4266ea6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -970,5 +970,10 @@
targets += dtbs dtbs_install
targets += $(DTB_LIST)
+ifeq ($(CONFIG_ARM64),y)
always := $(DTB_LIST)
+else
+dtbs: $(addprefix $(obj)/, $(DTB_LIST))
+ $(Q)rm -f $(obj)/../*.dtb
+endif
clean-files := *.dtb
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 1ade195..7aa120f 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -137,7 +137,7 @@
&gpio4 {
gpio-ranges = <&iomuxc 5 136 1>, <&iomuxc 6 145 1>, <&iomuxc 7 150 1>,
<&iomuxc 8 146 1>, <&iomuxc 9 151 1>, <&iomuxc 10 147 1>,
- <&iomuxc 11 151 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>,
+ <&iomuxc 11 152 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>,
<&iomuxc 14 149 1>, <&iomuxc 15 154 1>, <&iomuxc 16 39 7>,
<&iomuxc 23 56 1>, <&iomuxc 24 61 7>, <&iomuxc 31 46 1>;
};
diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile
new file mode 100644
index 0000000..14422e5
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/Makefile
@@ -0,0 +1,16 @@
+
+
+
+ifeq ($(CONFIG_ARM64),y)
+always := $(dtb-y)
+subdir-y := $(dts-dirs)
+else
+targets += dtbs
+targets += $(addprefix ../, $(dtb-y))
+
+$(obj)/../%.dtb: $(src)/%.dts FORCE
+ $(call if_changed_dep,dtc)
+
+dtbs: $(addprefix $(obj)/../,$(dtb-y))
+endif
+clean-files := *.dtb
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index bdd283b..58c6398 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -94,6 +94,21 @@
* DMA Cache Coherency
* ===================
*
+ * dma_inv_range(start, end)
+ *
+ * Invalidate (discard) the specified virtual address range.
+ * May not write back any entries. If 'start' or 'end'
+ * are not cache line aligned, those lines must be written
+ * back.
+ * - start - virtual start address
+ * - end - virtual end address
+ *
+ * dma_clean_range(start, end)
+ *
+ * Clean (write back) the specified virtual address range.
+ * - start - virtual start address
+ * - end - virtual end address
+ *
* dma_flush_range(start, end)
*
* Clean and invalidate the specified virtual address range.
@@ -115,6 +130,8 @@ struct cpu_cache_fns {
void (*dma_map_area)(const void *, size_t, int);
void (*dma_unmap_area)(const void *, size_t, int);
+ void (*dma_inv_range)(const void *, const void *);
+ void (*dma_clean_range)(const void *, const void *);
void (*dma_flush_range)(const void *, const void *);
};
@@ -140,6 +157,8 @@ extern struct cpu_cache_fns cpu_cache;
* is visible to DMA, or data written by DMA to system memory is
* visible to the CPU.
*/
+#define dmac_inv_range cpu_cache.dma_inv_range
+#define dmac_clean_range cpu_cache.dma_clean_range
#define dmac_flush_range cpu_cache.dma_flush_range
#else
@@ -159,6 +178,8 @@ extern void __cpuc_flush_dcache_area(void *, size_t);
* is visible to DMA, or data written by DMA to system memory is
* visible to the CPU.
*/
+extern void dmac_inv_range(const void *, const void *);
+extern void dmac_clean_range(const void *, const void *);
extern void dmac_flush_range(const void *, const void *);
#endif
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index 01c3d92..d14f310 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -155,6 +155,8 @@ static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
+#define dmac_inv_range __glue(_CACHE, _dma_inv_range)
+#define dmac_clean_range __glue(_CACHE, _dma_clean_range)
#endif
#endif
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 021692c..66003a8 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -29,6 +29,7 @@
#include <asm/byteorder.h>
#include <asm/memory.h>
#include <asm-generic/pci_iomap.h>
+#include <linux/msm_rtb.h>
#include <xen/xen.h>
/*
@@ -62,23 +63,21 @@ void __raw_readsl(const volatile void __iomem *addr, void *data, int longlen);
* the bus. Rather than special-case the machine, just let the compiler
* generate the access for CPUs prior to ARMv6.
*/
-#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
-#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))
+#define __raw_readw_no_log(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
+#define __raw_writew_no_log(v, a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))
#else
/*
* When running under a hypervisor, we want to avoid I/O accesses with
* writeback addressing modes as these incur a significant performance
* overhead (the address generation must be emulated in software).
*/
-#define __raw_writew __raw_writew
-static inline void __raw_writew(u16 val, volatile void __iomem *addr)
+static inline void __raw_writew_no_log(u16 val, volatile void __iomem *addr)
{
asm volatile("strh %1, %0"
: : "Q" (*(volatile u16 __force *)addr), "r" (val));
}
-#define __raw_readw __raw_readw
-static inline u16 __raw_readw(const volatile void __iomem *addr)
+static inline u16 __raw_readw_no_log(const volatile void __iomem *addr)
{
u16 val;
asm volatile("ldrh %0, %1"
@@ -88,22 +87,30 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
}
#endif
-#define __raw_writeb __raw_writeb
-static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
+static inline void __raw_writeb_no_log(u8 val, volatile void __iomem *addr)
{
asm volatile("strb %1, %0"
: : "Qo" (*(volatile u8 __force *)addr), "r" (val));
}
-#define __raw_writel __raw_writel
-static inline void __raw_writel(u32 val, volatile void __iomem *addr)
+static inline void __raw_writel_no_log(u32 val, volatile void __iomem *addr)
{
asm volatile("str %1, %0"
: : "Qo" (*(volatile u32 __force *)addr), "r" (val));
}
-#define __raw_readb __raw_readb
-static inline u8 __raw_readb(const volatile void __iomem *addr)
+static inline void __raw_writeq_no_log(u64 val, volatile void __iomem *addr)
+{
+ register u64 v asm ("r2");
+
+ v = val;
+
+ asm volatile("strd %1, %0"
+ : "+Qo" (*(volatile u64 __force *)addr)
+ : "r" (v));
+}
+
+static inline u8 __raw_readb_no_log(const volatile void __iomem *addr)
{
u8 val;
asm volatile("ldrb %0, %1"
@@ -112,8 +119,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)
return val;
}
-#define __raw_readl __raw_readl
-static inline u32 __raw_readl(const volatile void __iomem *addr)
+static inline u32 __raw_readl_no_log(const volatile void __iomem *addr)
{
u32 val;
asm volatile("ldr %0, %1"
@@ -122,6 +128,58 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
return val;
}
+static inline u64 __raw_readq_no_log(const volatile void __iomem *addr)
+{
+ register u64 val asm ("r2");
+
+ asm volatile("ldrd %1, %0"
+ : "+Qo" (*(volatile u64 __force *)addr),
+ "=r" (val));
+ return val;
+}
+
+/*
+ * There may be cases when clients don't want to support or can't support the
+ * logging. The appropriate functions can be used but clients should carefully
+ * consider why they can't support the logging.
+ */
+
+#define __raw_write_logged(v, a, _t) ({ \
+ int _ret; \
+ volatile void __iomem *_a = (a); \
+ void *_addr = (void __force *)(_a); \
+ _ret = uncached_logk(LOGK_WRITEL, _addr); \
+ ETB_WAYPOINT; \
+ __raw_write##_t##_no_log((v), _a); \
+ if (_ret) \
+ LOG_BARRIER; \
+ })
+
+
+#define __raw_writeb(v, a) __raw_write_logged((v), (a), b)
+#define __raw_writew(v, a) __raw_write_logged((v), (a), w)
+#define __raw_writel(v, a) __raw_write_logged((v), (a), l)
+#define __raw_writeq(v, a) __raw_write_logged((v), (a), q)
+
+#define __raw_read_logged(a, _l, _t) ({ \
+ unsigned _t __a; \
+ const volatile void __iomem *_a = (a); \
+ void *_addr = (void __force *)(_a); \
+ int _ret; \
+ _ret = uncached_logk(LOGK_READL, _addr); \
+ ETB_WAYPOINT; \
+ __a = __raw_read##_l##_no_log(_a);\
+ if (_ret) \
+ LOG_BARRIER; \
+ __a; \
+ })
+
+
+#define __raw_readb(a) __raw_read_logged((a), b, char)
+#define __raw_readw(a) __raw_read_logged((a), w, short)
+#define __raw_readl(a) __raw_read_logged((a), l, int)
+#define __raw_readq(a) __raw_read_logged((a), q, long long)
+
/*
* Architecture ioremap implementation.
*/
@@ -291,18 +349,32 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
__raw_readw(c)); __r; })
#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
__raw_readl(c)); __r; })
+#define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \
+ __raw_readq(c)); __r; })
+#define readb_relaxed_no_log(c) ({ u8 __r = __raw_readb_no_log(c); __r; })
+#define readl_relaxed_no_log(c) ({ u32 __r = le32_to_cpu((__force __le32) \
+ __raw_readl_no_log(c)); __r; })
+#define readq_relaxed_no_log(c) ({ u64 __r = le64_to_cpu((__force __le64) \
+ __raw_readq_no_log(c)); __r; })
-#define writeb_relaxed(v,c) __raw_writeb(v,c)
-#define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c)
-#define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
+
+#define writeb_relaxed(v, c) __raw_writeb(v, c)
+#define writew_relaxed(v, c) __raw_writew((__force u16) cpu_to_le16(v), c)
+#define writel_relaxed(v, c) __raw_writel((__force u32) cpu_to_le32(v), c)
+#define writeq_relaxed(v, c) __raw_writeq((__force u64) cpu_to_le64(v), c)
+#define writeb_relaxed_no_log(v, c) ((void)__raw_writeb_no_log((v), (c)))
+#define writel_relaxed_no_log(v, c) __raw_writel_no_log((__force u32) cpu_to_le32(v), c)
+#define writeq_relaxed_no_log(v, c) __raw_writeq_no_log((__force u64) cpu_to_le64(v), c)
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
+#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; })
#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
+#define writeq(v, c) ({ __iowmb(); writeq_relaxed(v, c); })
#define readsb(p,d,l) __raw_readsb(p,d,l)
#define readsw(p,d,l) __raw_readsw(p,d,l)
@@ -410,6 +482,23 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size);
void iounmap(volatile void __iomem *iomem_cookie);
#define iounmap iounmap
+/*
+ * io{read,write}{8,16,32,64} macros
+ */
+#ifndef ioread8
+#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; })
+#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
+#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })
+#define ioread64(p) ({ unsigned int __v = le64_to_cpu((__force __le64)__raw_readq(p)); __iormb(); __v; })
+
+#define ioread64be(p) ({ unsigned int __v = be64_to_cpu((__force __be64)__raw_readq(p)); __iormb(); __v; })
+
+#define iowrite8(v, p) ({ __iowmb(); __raw_writeb(v, p); })
+#define iowrite16(v, p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_le16(v), p); })
+#define iowrite32(v, p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_le32(v), p); })
+#define iowrite64(v, p) ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_le64(v), p); })
+
+#define iowrite64be(v, p) ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); })
void *arch_memremap_wb(phys_addr_t phys_addr, size_t size);
#define arch_memremap_wb arch_memremap_wb
@@ -431,6 +520,7 @@ extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
#define ioport_unmap ioport_unmap
extern void ioport_unmap(void __iomem *addr);
#endif
+#endif
struct pci_dev;
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index ce131ed..ae738a6 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -600,7 +600,7 @@ static int gpr_set(struct task_struct *target,
const void *kbuf, const void __user *ubuf)
{
int ret;
- struct pt_regs newregs;
+ struct pt_regs newregs = *task_pt_regs(target);
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&newregs,
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 8ecfd15..df73914 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -67,7 +67,7 @@
ENDPROC(__get_user_4)
ENTRY(__get_user_8)
- check_uaccess r0, 8, r1, r2, __get_user_bad
+ check_uaccess r0, 8, r1, r2, __get_user_bad8
#ifdef CONFIG_THUMB2_KERNEL
5: TUSER(ldr) r2, [r0]
6: TUSER(ldr) r3, [r0, #4]
diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig
index 46ed10a..6e6ebcb 100644
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
@@ -1,30 +1,46 @@
-menuconfig ARCH_QCOM
- bool "Qualcomm Support"
- depends on ARCH_MULTI_V7
- select ARCH_SUPPORTS_BIG_ENDIAN
- select ARM_GIC
- select ARM_AMBA
- select PINCTRL
- select QCOM_SCM if SMP
- help
- Support for Qualcomm's devicetree based systems.
-
if ARCH_QCOM
+menu "QCOM SoC Type"
config ARCH_MSM8X60
bool "Enable support for MSM8X60"
+ select ARCH_SUPPORTS_BIG_ENDIAN
+ select ARM_GIC
+ select ARM_AMBA
+ select QCOM_SCM if SMP
select CLKSRC_QCOM
+ select CLKSRC_OF
+ select COMMON_CLK
config ARCH_MSM8960
bool "Enable support for MSM8960"
select CLKSRC_QCOM
+ select ARCH_SUPPORTS_BIG_ENDIAN
+ select ARM_GIC
+ select ARM_AMBA
+ select QCOM_SCM if SMP
+ select CLKSRC_OF
+ select COMMON_CLK
+
config ARCH_MSM8974
bool "Enable support for MSM8974"
select HAVE_ARM_ARCH_TIMER
+ select ARCH_SUPPORTS_BIG_ENDIAN
+ select ARM_GIC
+ select ARM_AMBA
+ select QCOM_SCM if SMP
+ select CLKSRC_OF
+ select COMMON_CLK
config ARCH_MDM9615
bool "Enable support for MDM9615"
select CLKSRC_QCOM
+ select ARCH_SUPPORTS_BIG_ENDIAN
+ select ARM_GIC
+ select ARM_AMBA
+ select QCOM_SCM if SMP
+ select CLKSRC_OF
+ select COMMON_CLK
+endmenu
endif
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index a134d8a..2ddf364 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -349,7 +349,7 @@
* - start - virtual start address of region
* - end - virtual end address of region
*/
-v7_dma_inv_range:
+ENTRY(v7_dma_inv_range)
dcache_line_size r2, r3
sub r3, r2, #1
tst r0, r3
@@ -377,7 +377,7 @@
* - start - virtual start address of region
* - end - virtual end address of region
*/
-v7_dma_clean_range:
+ENTRY(v7_dma_clean_range)
dcache_line_size r2, r3
sub r3, r2, #1
bic r0, r0, r3
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 217ddb2..aec74bf 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -610,9 +610,9 @@ static int __init early_abort_handler(unsigned long addr, unsigned int fsr,
void __init early_abt_enable(void)
{
- fsr_info[22].fn = early_abort_handler;
+ fsr_info[FSR_FS_AEA].fn = early_abort_handler;
local_abt_enable();
- fsr_info[22].fn = do_bad;
+ fsr_info[FSR_FS_AEA].fn = do_bad;
}
#ifndef CONFIG_ARM_LPAE
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index 67532f2..afc1f84 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -11,11 +11,15 @@
#define FSR_FS5_0 (0x3f)
#ifdef CONFIG_ARM_LPAE
+#define FSR_FS_AEA 17
+
static inline int fsr_fs(unsigned int fsr)
{
return fsr & FSR_FS5_0;
}
#else
+#define FSR_FS_AEA 22
+
static inline int fsr_fs(unsigned int fsr)
{
return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 0d40c28..60bd916 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -325,6 +325,8 @@
.long \name\()_flush_kern_dcache_area
.long \name\()_dma_map_area
.long \name\()_dma_unmap_area
+ .long \name\()_dma_inv_range
+ .long \name\()_dma_clean_range
.long \name\()_dma_flush_range
.size \name\()_cache_fns, . - \name\()_cache_fns
.endm
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 054b491..70e8b7d 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -30,6 +30,9 @@ EXPORT_SYMBOL(__cpuc_flush_user_all);
EXPORT_SYMBOL(__cpuc_flush_user_range);
EXPORT_SYMBOL(__cpuc_coherent_kern_range);
EXPORT_SYMBOL(__cpuc_flush_dcache_area);
+EXPORT_SYMBOL(dmac_inv_range);
+EXPORT_SYMBOL(dmac_clean_range);
+EXPORT_SYMBOL(dmac_flush_range);
#else
EXPORT_SYMBOL(cpu_cache);
#endif
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 0b50576..6293973 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -838,7 +838,7 @@
endif
config ARM64_SW_TTBR0_PAN
- bool "Emulate Priviledged Access Never using TTBR0_EL1 switching"
+ bool "Emulate Privileged Access Never using TTBR0_EL1 switching"
help
Enabling this option prevents the kernel from accessing
user-space memory directly by pointing TTBR0_EL1 to a reserved
diff --git a/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
index d36c0ff..e7ff343 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
@@ -13,11 +13,19 @@
&soc {
replicator_qdss: replicator@6046000 {
- compatible = "arm,coresight-replicator";
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b909>;
+
+ reg = <0x6046000 0x1000>;
+ reg-names = "replicator-base";
coresight-name = "coresight-replicator";
- ports{
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -40,7 +48,215 @@
};
};
- tmc_etr:tmc@6048000 {
+ replicator_swao: replicator@6b0a000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b909>;
+
+ reg = <0x6b0a000 0x1000>;
+ reg-names = "replicator-base";
+
+ coresight-name = "coresight-replicator-swao";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ replicator_swao_in_tmc_etf_swao: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tmc_etf_swao_out_replicator>;
+ };
+ };
+
+ /* Always have EUD before funnel leading to ETR. If both
+ * sink are active we need to give preference to EUD
+ * over ETR
+ */
+ port@1 {
+ reg = <1>;
+ replicator_swao_out_eud: endpoint {
+ remote-endpoint =
+ <&eud_in_replicator_swao>;
+ };
+ };
+
+ port@2 {
+ reg = <0>;
+ replicator_swao_out_funnel_in2: endpoint {
+ remote-endpoint =
+ <&funnel_in2_in_replicator_swao>;
+ };
+ };
+
+ };
+ };
+
+ tmc_etf_swao: tmc@6b09000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b961>;
+
+ reg = <0x6b09000 0x1000>;
+ reg-names = "tmc-base";
+
+ coresight-name = "coresight-tmc-etf-swao";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tmc_etf_swao_out_replicator: endpoint {
+ remote-endpoint=
+ <&replicator_swao_in_tmc_etf_swao>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ tmc_etf_swao_in_funnel_swao: endpoint {
+ slave-mode;
+ remote-endpoint=
+ <&funnel_swao_out_tmc_etf_swao>;
+ };
+ };
+ };
+
+ };
+
+ funnel_swao:funnel@0x6b08000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6b08000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-swao";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_swao_out_tmc_etf_swao: endpoint {
+ remote-endpoint =
+ <&tmc_etf_swao_in_funnel_swao>;
+ };
+ };
+
+ port@1 {
+ reg = <7>;
+ funnel_swao_in_tpda_swao: endpoint {
+ slave-mode;
+ remote-endpoint=
+ <&tpda_swao_out_funnel_swao>;
+ };
+ };
+ };
+ };
+
+ tpda_swao: tpda@6b01000 {
+ compatible = "qcom,coresight-tpda";
+ reg = <0x6b01000 0x1000>;
+ reg-names = "tpda-base";
+
+ coresight-name = "coresight-tpda-swao";
+
+ qcom,tpda-atid = <71>;
+ qcom,dsb-elem-size = <1 32>;
+ qcom,cmb-elem-size = <0 64>;
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tpda_swao_out_funnel_swao: endpoint {
+ remote-endpoint =
+ <&funnel_swao_in_tpda_swao>;
+ };
+
+ };
+
+ port@1 {
+ reg = <0>;
+ tpda_swao_in_tpdm_swao0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_swao0_out_tpda_swao>;
+ };
+ };
+
+ port@2 {
+ reg = <1>;
+ tpda_swao_in_tpdm_swao1: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_swao1_out_tpda_swao>;
+ };
+
+ };
+ };
+ };
+
+ tpdm_swao0: tpdm@6b02000 {
+ compatible = "qcom,coresight-tpdm";
+
+ reg = <0x6b02000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name = "coresight-tpdm-swao-0";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ port {
+ tpdm_swao0_out_tpda_swao: endpoint {
+ remote-endpoint = <&tpda_swao_in_tpdm_swao0>;
+ };
+ };
+ };
+
+ tpdm_swao1: tpdm@6b03000 {
+ compatible = "qcom,coresight-tpdm";
+ reg = <0x6b03000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name="coresight-tpdm-swao-1";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ port {
+ tpdm_swao1_out_tpda_swao: endpoint {
+ remote-endpoint = <&tpda_swao_in_tpdm_swao1>;
+ };
+ };
+ };
+
+ tmc_etr: tmc@6048000 {
compatible = "arm,primecell";
arm,primecell-periphid = <0x0003b961>;
@@ -65,7 +281,7 @@
};
};
- tmc_etf:tmc@6047000 {
+ tmc_etf: tmc@6047000 {
compatible = "arm,primecell";
arm,primecell-periphid = <0x0003b961>;
@@ -104,6 +320,51 @@
};
+ funnel_merg: funnel@6045000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6045000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-merg";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_merg_out_tmc_etf: endpoint {
+ remote-endpoint =
+ <&tmc_etf_in_funnel_merg>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ funnel_merg_in_funnel_in0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_in0_out_funnel_merg>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ funnel_merg_in_funnel_in2: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_in2_out_funnel_merg>;
+ };
+ };
+ };
+ };
+
stm: stm@6002000 {
compatible = "arm,primecell";
arm,primecell-periphid = <0x0003b962>;
@@ -152,6 +413,24 @@
};
port@1 {
+ reg = <3>;
+ funnel_in0_in_funnel_spss: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_spss_out_funnel_in0>;
+ };
+ };
+
+ port@2 {
+ reg = <6>;
+ funnel_in0_in_funnel_qatb: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_qatb_out_funnel_in0>;
+ };
+ };
+
+ port@3 {
reg = <7>;
funnel_in0_in_stm: endpoint {
slave-mode;
@@ -161,14 +440,14 @@
};
};
- funnel_merg:funnel@6045000 {
+ funnel_in2: funnel@0x6043000 {
compatible = "arm,primecell";
arm,primecell-periphid = <0x0003b908>;
- reg = <0x6045000 0x1000>;
+ reg = <0x6043000 0x1000>;
reg-names = "funnel-base";
- coresight-name = "coresight-funnel-merg";
+ coresight-name = "coresight-funnel-in2";
clocks = <&clock_gcc RPMH_QDSS_CLK>,
<&clock_gcc RPMH_QDSS_A_CLK>;
@@ -180,18 +459,325 @@
port@0 {
reg = <0>;
- funnel_merg_out_tmc_etf: endpoint {
+ funnel_in2_out_funnel_merg: endpoint {
remote-endpoint =
- <&tmc_etf_in_funnel_merg>;
+ <&funnel_merg_in_funnel_in2>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ funnel_in2_in_replicator_swao: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&replicator_swao_out_funnel_in2>;
+ };
+
+ };
+
+ port@2 {
+ reg = <5>;
+ funnel_in2_in_funnel_apss_merg: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_apss_merg_out_funnel_in2>;
+ };
+ };
+
+ };
+ };
+
+ tpda: tpda@6004000 {
+ compatible = "qcom,coresight-tpda";
+ reg = <0x6004000 0x1000>;
+ reg-names = "tpda-base";
+
+ coresight-name = "coresight-tpda";
+
+ qcom,tpda-atid = <65>;
+ qcom,bc-elem-size = <13 32>;
+ qcom,tc-elem-size = <7 32>,
+ <13 32>;
+ qcom,dsb-elem-size = <13 32>;
+ qcom,cmb-elem-size = <7 32>,
+ <8 32>,
+ <13 64>;
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ tpda_out_funnel_qatb: endpoint {
+ remote-endpoint =
+ <&funnel_qatb_in_tpda>;
+ };
+
+ };
+
+ port@1 {
+ reg = <7>;
+ tpda_in_tpdm_vsense: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_vsense_out_tpda>;
+ };
+ };
+
+ port@2 {
+ reg = <8>;
+ tpda_in_tpdm_dcc: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_dcc_out_tpda>;
+ };
+ };
+
+ port@3 {
+ reg = <13>;
+ tpda_in_tpdm_pimem: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_pimem_out_tpda>;
+ };
+ };
+ };
+ };
+
+ tpdm_pimem: tpdm@6850000 {
+ compatible = "qcom,coresight-tpdm";
+ reg = <0x6850000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name = "coresight-tpdm-pimem";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ port {
+ tpdm_pimem_out_tpda: endpoint {
+ remote-endpoint = <&tpda_in_tpdm_pimem>;
+ };
+ };
+ };
+
+
+ tpdm_dcc: tpdm@6870000 {
+ compatible = "qcom,coresight-tpdm";
+ reg = <0x6870000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name = "coresight-tpdm-dcc";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ port {
+ tpdm_dcc_out_tpda: endpoint {
+ remote-endpoint = <&tpda_in_tpdm_dcc>;
+ };
+ };
+ };
+
+ tpdm_vsense: tpdm@6840000 {
+ compatible = "qcom,coresight-tpdm";
+ reg = <0x6840000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name = "coresight-tpdm-vsense";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ port{
+ tpdm_vsense_out_tpda: endpoint {
+ remote-endpoint = <&tpda_in_tpdm_vsense>;
+ };
+ };
+ };
+
+ tpda_olc: tpda@7832000 {
+ compatible = "qcom,coresight-tpda";
+ reg = <0x7832000 0x1000>;
+ reg-names = "tpda-base";
+
+ coresight-name = "coresight-tpda-olc";
+
+ qcom,tpda-atid = <69>;
+ qcom,cmb-elem-size = <0 64>;
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ tpda_olc_out_funnel_apss_merg: endpoint {
+ remote-endpoint =
+ <&funnel_apss_merg_in_tpda_olc>;
+ };
+ };
+ port@1 {
+ reg = <0>;
+ tpda_olc_in_tpdm_olc: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_olc_out_tpda_olc>;
+ };
+ };
+ };
+ };
+
+ tpdm_olc: tpdm@7830000 {
+ compatible = "qcom,coresight-tpdm";
+ reg = <0x7830000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name = "coresight-tpdm-olc";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ port{
+ tpdm_olc_out_tpda_olc: endpoint {
+ remote-endpoint = <&tpda_olc_in_tpdm_olc>;
+ };
+ };
+ };
+
+ tpda_spss: tpda@6882000 {
+ compatible = "qcom,coresight-tpda";
+ reg = <0x6882000 0x1000>;
+ reg-names = "tpda-base";
+
+ coresight-name = "coresight-tpda-spss";
+
+ qcom,tpda-atid = <70>;
+ qcom,dsb-elem-size = <0 32>;
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ tpda_spss_out_funnel_spss: endpoint {
+ remote-endpoint =
+ <&funnel_spss_in_tpda_spss>;
+ };
+ };
+ port@1 {
+ reg = <0>;
+ tpda_spss_in_tpdm_spss: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpdm_spss_out_tpda_spss>;
+ };
+ };
+ };
+ };
+
+ tpdm_spss: tpdm@6880000 {
+ compatible = "qcom,coresight-tpdm";
+ reg = <0x6880000 0x1000>;
+ reg-names = "tpdm-base";
+
+ coresight-name = "coresight-tpdm-spss";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "core_clk", "core_a_clk";
+
+ qcom,msr-fix-req;
+
+ port{
+ tpdm_spss_out_tpda_spss: endpoint {
+ remote-endpoint = <&tpda_spss_in_tpdm_spss>;
+ };
+ };
+ };
+
+ funnel_spss: funnel@6883000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6883000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-spss";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_spss_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_funnel_spss>;
};
};
port@1 {
reg = <0>;
- funnel_merg_in_funnel_in0: endpoint {
+ funnel_spss_in_tpda_spss: endpoint {
slave-mode;
remote-endpoint =
- <&funnel_in0_out_funnel_merg>;
+ <&tpda_spss_out_funnel_spss>;
+ };
+ };
+ };
+ };
+
+ funnel_qatb: funnel@6005000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x6005000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-qatb";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_qatb_out_funnel_in0: endpoint {
+ remote-endpoint =
+ <&funnel_in0_in_funnel_qatb>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ funnel_qatb_in_tpda: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpda_out_funnel_qatb>;
};
};
};
@@ -389,9 +975,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu0: cti@7420000 {
+ cti_cpu0: cti@7020000 {
compatible = "arm,coresight-cti";
- reg = <0x7420000 0x1000>;
+ reg = <0x7020000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu0";
@@ -402,9 +988,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu1: cti@7520000 {
+ cti_cpu1: cti@7120000 {
compatible = "arm,coresight-cti";
- reg = <0x7520000 0x1000>;
+ reg = <0x7120000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu1";
@@ -415,9 +1001,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu2: cti@7620000 {
+ cti_cpu2: cti@7220000 {
compatible = "arm,coresight-cti";
- reg = <0x7620000 0x1000>;
+ reg = <0x7220000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu2";
@@ -428,9 +1014,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu3: cti@7720000 {
+ cti_cpu3: cti@7320000 {
compatible = "arm,coresight-cti";
- reg = <0x7720000 0x1000>;
+ reg = <0x7320000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu3";
@@ -441,9 +1027,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu4: cti@7020000 {
+ cti_cpu4: cti@7420000 {
compatible = "arm,coresight-cti";
- reg = <0x7020000 0x1000>;
+ reg = <0x7420000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu4";
@@ -454,9 +1040,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu5: cti@7120000 {
+ cti_cpu5: cti@7520000 {
compatible = "arm,coresight-cti";
- reg = <0x7120000 0x1000>;
+ reg = <0x7520000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu5";
@@ -467,9 +1053,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu6: cti@7220000 {
+ cti_cpu6: cti@7620000 {
compatible = "arm,coresight-cti";
- reg = <0x7220000 0x1000>;
+ reg = <0x7620000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu6";
@@ -480,9 +1066,9 @@
clock-names = "core_clk", "core_a_clk";
};
- cti_cpu7: cti@7320000 {
+ cti_cpu7: cti@7720000 {
compatible = "arm,coresight-cti";
- reg = <0x7320000 0x1000>;
+ reg = <0x7720000 0x1000>;
reg-names = "cti-base";
coresight-name = "coresight-cti-cpu7";
@@ -492,4 +1078,91 @@
<&clock_gcc RPMH_QDSS_A_CLK>;
clock-names = "core_clk", "core_a_clk";
};
+
+ dummy_eud: dummy_sink {
+ compatible = "qcom,coresight-dummy";
+
+ coresight-name = "coresight-eud";
+
+ qcom,dummy-sink;
+ port {
+ eud_in_replicator_swao: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&replicator_swao_out_eud>;
+ };
+ };
+ };
+
+ funnel_apss_merg: funnel@7810000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x7810000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-apss-merg";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_apss_merg_out_funnel_in2: endpoint {
+ remote-endpoint =
+ <&funnel_in2_in_funnel_apss_merg>;
+ };
+ };
+
+ port@1 {
+ reg = <0>;
+ funnel_apss_merg_in_funnel_apss: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&funnel_apss_out_funnel_apss_merg>;
+ };
+ };
+
+ port@2 {
+ reg = <1>;
+ funnel_apss_merg_in_tpda_olc: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&tpda_olc_out_funnel_apss_merg>;
+ };
+ };
+ };
+ };
+
+ funnel_apss: funnel@7800000 {
+ compatible = "arm,primecell";
+ arm,primecell-periphid = <0x0003b908>;
+
+ reg = <0x7800000 0x1000>;
+ reg-names = "funnel-base";
+
+ coresight-name = "coresight-funnel-apss";
+
+ clocks = <&clock_gcc RPMH_QDSS_CLK>,
+ <&clock_gcc RPMH_QDSS_A_CLK>;
+ clock-names = "apb_pclk", "core_a_clk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ funnel_apss_out_funnel_apss_merg: endpoint {
+ remote-endpoint =
+ <&funnel_apss_merg_in_funnel_apss>;
+ };
+ };
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index f3b529c..8974ef8 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -710,7 +710,7 @@
<0x1f65000 0x008>,
<0x1f64000 0x008>,
<0x4180000 0x020>,
- <0x00179000 0x004>;
+ <0xc2b0000 0x004>;
reg-names = "qdsp6_base", "halt_q6", "halt_modem",
"halt_nc", "rmb_base", "restart_reg";
diff --git a/arch/arm64/configs/sdm845-perf_defconfig b/arch/arm64/configs/sdm845-perf_defconfig
index e029f82..ea34214 100644
--- a/arch/arm64/configs/sdm845-perf_defconfig
+++ b/arch/arm64/configs/sdm845-perf_defconfig
@@ -61,6 +61,7 @@
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
+CONFIG_CPU_IDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
@@ -382,6 +383,8 @@
CONFIG_MSM_PIL_MSS_QDSP6V5=y
CONFIG_ICNSS=y
CONFIG_QCOM_COMMAND_DB=y
+CONFIG_MSM_EVENT_TIMER=y
+CONFIG_MSM_PM=y
CONFIG_EXTCON=y
CONFIG_IIO=y
CONFIG_QCOM_RRADC=y
@@ -414,6 +417,8 @@
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_QCOM_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
+CONFIG_CORESIGHT_TPDA=y
+CONFIG_CORESIGHT_TPDM=y
CONFIG_CORESIGHT_CTI=y
CONFIG_SECURITY=y
CONFIG_SECURITY_SELINUX=y
diff --git a/arch/arm64/configs/sdm845_defconfig b/arch/arm64/configs/sdm845_defconfig
index 6cca05a..7faf735 100644
--- a/arch/arm64/configs/sdm845_defconfig
+++ b/arch/arm64/configs/sdm845_defconfig
@@ -65,6 +65,7 @@
CONFIG_PM_WAKELOCKS_LIMIT=0
# CONFIG_PM_WAKELOCKS_GC is not set
CONFIG_PM_DEBUG=y
+CONFIG_CPU_IDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
@@ -346,6 +347,9 @@
CONFIG_MMC_SDHCI_MSM=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
+CONFIG_EDAC_KRYO3XX_ARM64=y
+CONFIG_EDAC_KRYO3XX_ARM64_PANIC_ON_CE=y
+CONFIG_EDAC_KRYO3XX_ARM64_PANIC_ON_UE=y
CONFIG_EDAC_QCOM_LLCC=y
CONFIG_EDAC_QCOM_LLCC_PANIC_ON_CE=y
CONFIG_EDAC_QCOM_LLCC_PANIC_ON_UE=y
@@ -394,6 +398,8 @@
CONFIG_ICNSS=y
CONFIG_ICNSS_DEBUG=y
CONFIG_QCOM_COMMAND_DB=y
+CONFIG_MSM_EVENT_TIMER=y
+CONFIG_MSM_PM=y
CONFIG_EXTCON=y
CONFIG_IIO=y
CONFIG_QCOM_RRADC=y
@@ -463,6 +469,8 @@
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_QCOM_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
+CONFIG_CORESIGHT_TPDA=y
+CONFIG_CORESIGHT_TPDM=y
CONFIG_CORESIGHT_CTI=y
CONFIG_SECURITY=y
CONFIG_SECURITY_SELINUX=y
diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
index 71dfa3b..85c4a89 100644
--- a/arch/arm64/include/asm/futex.h
+++ b/arch/arm64/include/asm/futex.h
@@ -21,10 +21,7 @@
#include <linux/futex.h>
#include <linux/uaccess.h>
-#include <asm/alternative.h>
-#include <asm/cpufeature.h>
#include <asm/errno.h>
-#include <asm/sysreg.h>
#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
do { \
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index 52a0e43..0363fe8 100644
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -208,9 +208,11 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
* Update the saved TTBR0_EL1 of the scheduled-in task as the previous
* value may have not been initialised yet (activate_mm caller) or the
* ASID has changed since the last run (following the context switch
- * of another thread of the same process).
+ * of another thread of the same process). Avoid setting the reserved
+ * TTBR0_EL1 to swapper_pg_dir (init_mm; e.g. via idle_task_exit).
*/
- update_saved_ttbr0(tsk, next);
+ if (next != &init_mm)
+ update_saved_ttbr0(tsk, next);
}
#define deactivate_mm(tsk,mm) do { } while (0)
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 8b2703e..d1472eb 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -51,6 +51,9 @@ struct thread_info {
u64 ttbr0; /* saved TTBR0_EL1 */
#endif
struct task_struct *task; /* main task structure */
+#ifdef CONFIG_ARM64_SW_TTBR0_PAN
+ u64 ttbr0; /* saved TTBR0_EL1 */
+#endif
int preempt_count; /* 0 => preemptable, <0 => bug */
int cpu; /* cpu */
};
diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index 9e06272..73fee2c 100644
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uaccess.h
@@ -18,6 +18,10 @@
#ifndef __ASM_UACCESS_H
#define __ASM_UACCESS_H
+#include <asm/alternative.h>
+#include <asm/kernel-pgtable.h>
+#include <asm/sysreg.h>
+
#ifndef __ASSEMBLY__
/*
@@ -28,11 +32,9 @@
#include <linux/string.h>
#include <linux/thread_info.h>
-#include <asm/alternative.h>
#include <asm/cpufeature.h>
#include <asm/kernel-pgtable.h>
#include <asm/ptrace.h>
-#include <asm/sysreg.h>
#include <asm/errno.h>
#include <asm/memory.h>
#include <asm/compiler.h>
@@ -126,7 +128,7 @@ static inline void set_fs(mm_segment_t fs)
* User access enabling/disabling.
*/
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-static inline void uaccess_ttbr0_disable(void)
+static inline void __uaccess_ttbr0_disable(void)
{
unsigned long ttbr;
@@ -136,7 +138,7 @@ static inline void uaccess_ttbr0_disable(void)
isb();
}
-static inline void uaccess_ttbr0_enable(void)
+static inline void __uaccess_ttbr0_enable(void)
{
unsigned long flags;
@@ -150,30 +152,44 @@ static inline void uaccess_ttbr0_enable(void)
isb();
local_irq_restore(flags);
}
-#else
-static inline void uaccess_ttbr0_disable(void)
+
+static inline bool uaccess_ttbr0_disable(void)
{
+ if (!system_uses_ttbr0_pan())
+ return false;
+ __uaccess_ttbr0_disable();
+ return true;
}
-static inline void uaccess_ttbr0_enable(void)
+static inline bool uaccess_ttbr0_enable(void)
{
+ if (!system_uses_ttbr0_pan())
+ return false;
+ __uaccess_ttbr0_enable();
+ return true;
+}
+#else
+static inline bool uaccess_ttbr0_disable(void)
+{
+ return false;
+}
+
+static inline bool uaccess_ttbr0_enable(void)
+{
+ return false;
}
#endif
#define __uaccess_disable(alt) \
do { \
- if (system_uses_ttbr0_pan()) \
- uaccess_ttbr0_disable(); \
- else \
+ if (!uaccess_ttbr0_disable()) \
asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \
CONFIG_ARM64_PAN)); \
} while (0)
#define __uaccess_enable(alt) \
do { \
- if (system_uses_ttbr0_pan()) \
- uaccess_ttbr0_enable(); \
- else \
+ if (!uaccess_ttbr0_enable()) \
asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \
CONFIG_ARM64_PAN)); \
} while (0)
@@ -411,69 +427,62 @@ extern __must_check long strnlen_user(const char __user *str, long n);
#else /* __ASSEMBLY__ */
-#include <asm/alternative.h>
#include <asm/assembler.h>
-#include <asm/kernel-pgtable.h>
/*
* User access enabling/disabling macros.
*/
- .macro uaccess_ttbr0_disable, tmp1
+#ifdef CONFIG_ARM64_SW_TTBR0_PAN
+ .macro __uaccess_ttbr0_disable, tmp1
mrs \tmp1, ttbr1_el1 // swapper_pg_dir
add \tmp1, \tmp1, #SWAPPER_DIR_SIZE // reserved_ttbr0 at the end of swapper_pg_dir
msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
isb
.endm
- .macro uaccess_ttbr0_enable, tmp1
+ .macro __uaccess_ttbr0_enable, tmp1
get_thread_info \tmp1
- ldr \tmp1, [\tmp1, #TI_TTBR0] // load saved TTBR0_EL1
+ ldr \tmp1, [\tmp1, #TSK_TI_TTBR0] // load saved TTBR0_EL1
msr ttbr0_el1, \tmp1 // set the non-PAN TTBR0_EL1
isb
.endm
+ .macro uaccess_ttbr0_disable, tmp1
+alternative_if_not ARM64_HAS_PAN
+ __uaccess_ttbr0_disable \tmp1
+alternative_else_nop_endif
+ .endm
+
+ .macro uaccess_ttbr0_enable, tmp1, tmp2
+alternative_if_not ARM64_HAS_PAN
+ save_and_disable_irq \tmp2 // avoid preemption
+ __uaccess_ttbr0_enable \tmp1
+ restore_irq \tmp2
+alternative_else_nop_endif
+ .endm
+#else
+ .macro uaccess_ttbr0_disable, tmp1
+ .endm
+
+ .macro uaccess_ttbr0_enable, tmp1, tmp2
+ .endm
+#endif
+
/*
* These macros are no-ops when UAO is present.
*/
.macro uaccess_disable_not_uao, tmp1
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-alternative_if_not ARM64_HAS_PAN
uaccess_ttbr0_disable \tmp1
-alternative_else
- nop
- nop
- nop
- nop
-alternative_endif
-#endif
-alternative_if_not ARM64_ALT_PAN_NOT_UAO
- nop
-alternative_else
+alternative_if ARM64_ALT_PAN_NOT_UAO
SET_PSTATE_PAN(1)
-alternative_endif
+alternative_else_nop_endif
.endm
.macro uaccess_enable_not_uao, tmp1, tmp2
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-alternative_if_not ARM64_HAS_PAN
- save_and_disable_irq \tmp2 // avoid preemption
- uaccess_ttbr0_enable \tmp1
- restore_irq \tmp2
-alternative_else
- nop
- nop
- nop
- nop
- nop
- nop
- nop
-alternative_endif
-#endif
-alternative_if_not ARM64_ALT_PAN_NOT_UAO
- nop
-alternative_else
+ uaccess_ttbr0_enable \tmp1, \tmp2
+alternative_if ARM64_ALT_PAN_NOT_UAO
SET_PSTATE_PAN(0)
-alternative_endif
+alternative_else_nop_endif
.endm
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h
index ee469be..c731ca0 100644
--- a/arch/arm64/include/uapi/asm/sigcontext.h
+++ b/arch/arm64/include/uapi/asm/sigcontext.h
@@ -16,6 +16,7 @@
#ifndef _UAPI__ASM_SIGCONTEXT_H
#define _UAPI__ASM_SIGCONTEXT_H
+#ifdef CONFIG_64BIT
#include <linux/types.h>
/*
@@ -61,4 +62,35 @@ struct esr_context {
__u64 esr;
};
+#else /* CONFIG_64BIT */
+
+/*
+ * Signal context structure - contains all info to do with the state
+ * before the signal handler was invoked. Note: only add new entries
+ * to the end of the structure.
+ */
+struct sigcontext {
+ unsigned long trap_no;
+ unsigned long error_code;
+ unsigned long oldmask;
+ unsigned long arm_r0;
+ unsigned long arm_r1;
+ unsigned long arm_r2;
+ unsigned long arm_r3;
+ unsigned long arm_r4;
+ unsigned long arm_r5;
+ unsigned long arm_r6;
+ unsigned long arm_r7;
+ unsigned long arm_r8;
+ unsigned long arm_r9;
+ unsigned long arm_r10;
+ unsigned long arm_fp;
+ unsigned long arm_ip;
+ unsigned long arm_sp;
+ unsigned long arm_lr;
+ unsigned long arm_pc;
+ unsigned long arm_cpsr;
+ unsigned long fault_address;
+};
+#endif /* CONFIG_64BIT */
#endif /* _UAPI__ASM_SIGCONTEXT_H */
diff --git a/arch/arm64/kernel/armv8_deprecated.c b/arch/arm64/kernel/armv8_deprecated.c
index fbdb8bb..bdb35b9 100644
--- a/arch/arm64/kernel/armv8_deprecated.c
+++ b/arch/arm64/kernel/armv8_deprecated.c
@@ -14,7 +14,6 @@
#include <linux/slab.h>
#include <linux/sysctl.h>
-#include <asm/alternative.h>
#include <asm/cpufeature.h>
#include <asm/insn.h>
#include <asm/opcodes.h>
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index e555321..d42e61c 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -44,6 +44,9 @@ int main(void)
#endif
DEFINE(TI_TASK, offsetof(struct thread_info, task));
DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
+#ifdef CONFIG_ARM64_SW_TTBR0_PAN
+ DEFINE(TSK_TI_TTBR0, offsetof(struct thread_info, ttbr0));
+#endif
BLANK();
DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
BLANK();
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 324b288..1f0cea7 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -121,11 +121,9 @@
* feature as all TTBR0_EL1 accesses are disabled, not just those to
* user mappings.
*/
-alternative_if_not ARM64_HAS_PAN
- nop
-alternative_else
+alternative_if ARM64_HAS_PAN
b 1f // skip TTBR0 PAN
-alternative_endif
+alternative_else_nop_endif
.if \el != 0
mrs x21, ttbr0_el1
@@ -135,7 +133,7 @@
and x23, x23, #~PSR_PAN_BIT // Clear the emulated PAN in the saved SPSR
.endif
- uaccess_ttbr0_disable x21
+ __uaccess_ttbr0_disable x21
1:
#endif
@@ -184,17 +182,15 @@
* Restore access to TTBR0_EL1. If returning to EL0, no need for SPSR
* PAN bit checking.
*/
-alternative_if_not ARM64_HAS_PAN
- nop
-alternative_else
+alternative_if ARM64_HAS_PAN
b 2f // skip TTBR0 PAN
-alternative_endif
+alternative_else_nop_endif
.if \el != 0
- tbnz x22, #_PSR_PAN_BIT, 1f // Skip re-enabling TTBR0 access if previously disabled
+ tbnz x22, #22, 1f // Skip re-enabling TTBR0 access if the PSR_PAN_BIT is set
.endif
- uaccess_ttbr0_enable x0
+ __uaccess_ttbr0_enable x0
.if \el == 0
/*
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index d5c4242..d84c7d0 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -317,7 +317,7 @@ void die(const char *str, struct pt_regs *regs, int err)
if (!user_mode(regs))
bug_type = report_bug(regs->pc, regs);
- if (bug_type != BUG_TRAP_TYPE_NONE)
+ if (bug_type != BUG_TRAP_TYPE_NONE && !strlen(str))
str = "Oops - BUG";
ret = __die(str, err, thread, regs);
@@ -470,9 +470,10 @@ int cpu_enable_cache_maint_trap(void *__unused)
}
#define __user_cache_maint(insn, address, res) \
- if (untagged_addr(address) >= user_addr_max()) \
+ if (untagged_addr(address) >= user_addr_max()) { \
res = -EFAULT; \
- else \
+ } else { \
+ uaccess_ttbr0_enable(); \
asm volatile ( \
"1: " insn ", %1\n" \
" mov %w0, #0\n" \
@@ -484,7 +485,9 @@ int cpu_enable_cache_maint_trap(void *__unused)
" .popsection\n" \
_ASM_EXTABLE(1b, 3b) \
: "=r" (res) \
- : "r" (address), "i" (-EFAULT) )
+ : "r" (address), "i" (-EFAULT)); \
+ uaccess_ttbr0_disable(); \
+ }
static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
{
diff --git a/arch/arm64/lib/clear_user.S b/arch/arm64/lib/clear_user.S
index 08b5f18..d7150e3 100644
--- a/arch/arm64/lib/clear_user.S
+++ b/arch/arm64/lib/clear_user.S
@@ -17,9 +17,6 @@
*/
#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/cpufeature.h>
-#include <asm/sysreg.h>
#include <asm/uaccess.h>
.text
diff --git a/arch/arm64/lib/copy_from_user.S b/arch/arm64/lib/copy_from_user.S
index 5f8f812..cfe1339 100644
--- a/arch/arm64/lib/copy_from_user.S
+++ b/arch/arm64/lib/copy_from_user.S
@@ -16,10 +16,7 @@
#include <linux/linkage.h>
-#include <asm/assembler.h>
#include <asm/cache.h>
-#include <asm/cpufeature.h>
-#include <asm/sysreg.h>
#include <asm/uaccess.h>
/*
diff --git a/arch/arm64/lib/copy_in_user.S b/arch/arm64/lib/copy_in_user.S
index 9b04ff3..718b1c4 100644
--- a/arch/arm64/lib/copy_in_user.S
+++ b/arch/arm64/lib/copy_in_user.S
@@ -18,10 +18,7 @@
#include <linux/linkage.h>
-#include <asm/assembler.h>
#include <asm/cache.h>
-#include <asm/cpufeature.h>
-#include <asm/sysreg.h>
#include <asm/uaccess.h>
/*
diff --git a/arch/arm64/lib/copy_to_user.S b/arch/arm64/lib/copy_to_user.S
index 8077e4f..e99e31c 100644
--- a/arch/arm64/lib/copy_to_user.S
+++ b/arch/arm64/lib/copy_to_user.S
@@ -16,10 +16,7 @@
#include <linux/linkage.h>
-#include <asm/assembler.h>
#include <asm/cache.h>
-#include <asm/cpufeature.h>
-#include <asm/sysreg.h>
#include <asm/uaccess.h>
/*
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index db00fc9..97de0eb 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -23,6 +23,7 @@
#include <asm/assembler.h>
#include <asm/cpufeature.h>
#include <asm/alternative.h>
+#include <asm/uaccess.h>
/*
* __flush_dcache_all()
@@ -121,6 +122,7 @@
* - end - virtual end address of region
*/
ENTRY(__flush_cache_user_range)
+ uaccess_ttbr0_enable x2, x3
dcache_line_size x2, x3
sub x3, x2, #1
bic x4, x0, x3
@@ -142,10 +144,12 @@
dsb ish
isb
mov x0, #0
+1:
+ uaccess_ttbr0_disable x1
ret
9:
mov x0, #-EFAULT
- ret
+ b 1b
ENDPROC(flush_icache_range)
ENDPROC(__flush_cache_user_range)
diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S
index a23b2e8..b41aff2 100644
--- a/arch/arm64/xen/hypercall.S
+++ b/arch/arm64/xen/hypercall.S
@@ -92,7 +92,6 @@
mov x2, x3
mov x3, x4
mov x4, x5
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
/*
* Privcmd calls are issued by the userspace. The kernel needs to
* enable access to TTBR0_EL1 as the hypervisor would issue stage 1
@@ -101,15 +100,12 @@
* need the explicit uaccess_enable/disable if the TTBR0 PAN emulation
* is enabled (it implies that hardware UAO and PAN disabled).
*/
- uaccess_enable_not_uao x6, x7
-#endif
+ uaccess_ttbr0_enable x6, x7
hvc XEN_IMM
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
/*
* Disable userspace access from kernel once the hyp call completed.
*/
- uaccess_disable_not_uao x6
-#endif
+ uaccess_ttbr0_disable x6
ret
ENDPROC(privcmd_call);
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 9e1499f..13f5fad 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -641,9 +641,10 @@
#define SRR1_ISI_N_OR_G 0x10000000 /* ISI: Access is no-exec or G */
#define SRR1_ISI_PROT 0x08000000 /* ISI: Other protection fault */
#define SRR1_WAKEMASK 0x00380000 /* reason for wakeup */
-#define SRR1_WAKEMASK_P8 0x003c0000 /* reason for wakeup on POWER8 */
+#define SRR1_WAKEMASK_P8 0x003c0000 /* reason for wakeup on POWER8 and 9 */
#define SRR1_WAKESYSERR 0x00300000 /* System error */
#define SRR1_WAKEEE 0x00200000 /* External interrupt */
+#define SRR1_WAKEHVI 0x00240000 /* Hypervisor Virtualization Interrupt (P9) */
#define SRR1_WAKEMT 0x00280000 /* mtctrl */
#define SRR1_WAKEHMI 0x00280000 /* Hypervisor maintenance */
#define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index f0b2385..e0b9e57 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -44,6 +44,7 @@ static inline int icp_hv_init(void) { return -ENODEV; }
#ifdef CONFIG_PPC_POWERNV
extern int icp_opal_init(void);
+extern void icp_opal_flush_interrupt(void);
#else
static inline int icp_opal_init(void) { return -ENODEV; }
#endif
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 16ada1e..d5ce34d 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -424,7 +424,8 @@ early_param("disable_radix", parse_disable_radix);
void __init mmu_early_init_devtree(void)
{
/* Disable radix mode based on kernel command line. */
- if (disable_radix)
+ /* We don't yet have the machinery to do radix as a guest. */
+ if (disable_radix || !(mfmsr() & MSR_HV))
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
if (early_radix_enabled())
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index 3493cf4..71697ff 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -50,9 +50,7 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric)
for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
__tlbiel_pid(pid, set, ric);
}
- if (cpu_has_feature(CPU_FTR_POWER9_DD1))
- asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
- return;
+ asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
}
static inline void _tlbie_pid(unsigned long pid, unsigned long ric)
@@ -85,8 +83,6 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid,
asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
asm volatile("ptesync": : :"memory");
- if (cpu_has_feature(CPU_FTR_POWER9_DD1))
- asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
}
static inline void _tlbie_va(unsigned long va, unsigned long pid,
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index c789258..eec0e8d 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -155,8 +155,10 @@ static void pnv_smp_cpu_kill_self(void)
wmask = SRR1_WAKEMASK_P8;
idle_states = pnv_get_supported_cpuidle_states();
+
/* We don't want to take decrementer interrupts while we are offline,
- * so clear LPCR:PECE1. We keep PECE2 enabled.
+ * so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9)
+ * enabled as to let IPIs in.
*/
mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
@@ -206,8 +208,12 @@ static void pnv_smp_cpu_kill_self(void)
* contains 0.
*/
if (((srr1 & wmask) == SRR1_WAKEEE) ||
+ ((srr1 & wmask) == SRR1_WAKEHVI) ||
(local_paca->irq_happened & PACA_IRQ_EE)) {
- icp_native_flush_interrupt();
+ if (cpu_has_feature(CPU_FTR_ARCH_300))
+ icp_opal_flush_interrupt();
+ else
+ icp_native_flush_interrupt();
} else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
@@ -221,6 +227,8 @@ static void pnv_smp_cpu_kill_self(void)
if (srr1 && !generic_check_cpu_restart(cpu))
DBG("CPU%d Unexpected exit while offline !\n", cpu);
}
+
+ /* Re-enable decrementer interrupts */
mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
DBG("CPU%d coming online...\n", cpu);
}
diff --git a/arch/powerpc/sysdev/xics/icp-opal.c b/arch/powerpc/sysdev/xics/icp-opal.c
index 60c5765..c96c0cb 100644
--- a/arch/powerpc/sysdev/xics/icp-opal.c
+++ b/arch/powerpc/sysdev/xics/icp-opal.c
@@ -132,6 +132,35 @@ static irqreturn_t icp_opal_ipi_action(int irq, void *dev_id)
return smp_ipi_demux();
}
+/*
+ * Called when an interrupt is received on an off-line CPU to
+ * clear the interrupt, so that the CPU can go back to nap mode.
+ */
+void icp_opal_flush_interrupt(void)
+{
+ unsigned int xirr;
+ unsigned int vec;
+
+ do {
+ xirr = icp_opal_get_xirr();
+ vec = xirr & 0x00ffffff;
+ if (vec == XICS_IRQ_SPURIOUS)
+ break;
+ if (vec == XICS_IPI) {
+ /* Clear pending IPI */
+ int cpu = smp_processor_id();
+ kvmppc_set_host_ipi(cpu, 0);
+ opal_int_set_mfrr(get_hard_smp_processor_id(cpu), 0xff);
+ } else {
+ pr_err("XICS: hw interrupt 0x%x to offline cpu, "
+ "disabling\n", vec);
+ xics_mask_unknown_vec(vec);
+ }
+
+ /* EOI the interrupt */
+ } while (opal_int_eoi(xirr) > 0);
+}
+
#endif /* CONFIG_SMP */
static const struct icp_ops icp_opal_ops = {
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 984a7bf..83db0ea 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -104,6 +104,7 @@ struct cpuinfo_x86 {
__u8 x86_phys_bits;
/* CPUID returned core id bits: */
__u8 x86_coreid_bits;
+ __u8 cu_id;
/* Max extended CPUID function supported: */
__u32 extended_cpuid_level;
/* Maximum supported CPUID level, -1=no CPUID: */
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 7249f15..d1e2556 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1876,7 +1876,6 @@ static struct irq_chip ioapic_chip __read_mostly = {
.irq_ack = irq_chip_ack_parent,
.irq_eoi = ioapic_ack_level,
.irq_set_affinity = ioapic_set_affinity,
- .irq_retrigger = irq_chip_retrigger_hierarchy,
.flags = IRQCHIP_SKIP_SET_WAKE,
};
@@ -1888,7 +1887,6 @@ static struct irq_chip ioapic_ir_chip __read_mostly = {
.irq_ack = irq_chip_ack_parent,
.irq_eoi = ioapic_ir_ack_level,
.irq_set_affinity = ioapic_set_affinity,
- .irq_retrigger = irq_chip_retrigger_hierarchy,
.flags = IRQCHIP_SKIP_SET_WAKE,
};
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 1d31672..2b4cf04 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -309,8 +309,22 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
/* get information required for multi-node processors */
if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
+ u32 eax, ebx, ecx, edx;
- node_id = cpuid_ecx(0x8000001e) & 7;
+ cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
+
+ node_id = ecx & 0xff;
+ smp_num_siblings = ((ebx >> 8) & 0xff) + 1;
+
+ if (c->x86 == 0x15)
+ c->cu_id = ebx & 0xff;
+
+ if (c->x86 >= 0x17) {
+ c->cpu_core_id = ebx & 0xff;
+
+ if (smp_num_siblings > 1)
+ c->x86_max_cores /= smp_num_siblings;
+ }
/*
* We may have multiple LLCs if L3 caches exist, so check if we
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 023c7bf..4eece91 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1015,6 +1015,7 @@ static void identify_cpu(struct cpuinfo_x86 *c)
c->x86_model_id[0] = '\0'; /* Unset */
c->x86_max_cores = 1;
c->x86_coreid_bits = 0;
+ c->cu_id = 0xff;
#ifdef CONFIG_X86_64
c->x86_clflush_size = 64;
c->x86_phys_bits = 36;
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index ebb4e95..96d80df 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -236,7 +236,8 @@ void fpstate_init(union fpregs_state *state)
* it will #GP. Make sure it is replaced after the memset().
*/
if (static_cpu_has(X86_FEATURE_XSAVES))
- state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT;
+ state->xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT |
+ xfeatures_mask;
if (static_cpu_has(X86_FEATURE_FXSR))
fpstate_init_fxstate(&state->fxsave);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index e9bbe02..36171bc 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -423,9 +423,15 @@ static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
if (c->phys_proc_id == o->phys_proc_id &&
- per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2) &&
- c->cpu_core_id == o->cpu_core_id)
- return topology_sane(c, o, "smt");
+ per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2)) {
+ if (c->cpu_core_id == o->cpu_core_id)
+ return topology_sane(c, o, "smt");
+
+ if ((c->cu_id != 0xff) &&
+ (o->cu_id != 0xff) &&
+ (c->cu_id == o->cu_id))
+ return topology_sane(c, o, "smt");
+ }
} else if (c->phys_proc_id == o->phys_proc_id &&
c->cpu_core_id == o->cpu_core_id) {
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index ea9c49a..8aa6bea 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -15,6 +15,7 @@
#include <linux/debugfs.h>
#include <linux/mm.h>
#include <linux/init.h>
+#include <linux/sched.h>
#include <linux/seq_file.h>
#include <asm/pgtable.h>
@@ -406,6 +407,7 @@ static void ptdump_walk_pgd_level_core(struct seq_file *m, pgd_t *pgd,
} else
note_page(m, &st, __pgprot(0), 1);
+ cond_resched();
start++;
}
diff --git a/crypto/algif_aead.c b/crypto/algif_aead.c
index e9c0993..e8817e2 100644
--- a/crypto/algif_aead.c
+++ b/crypto/algif_aead.c
@@ -671,9 +671,9 @@ static int aead_recvmsg_sync(struct socket *sock, struct msghdr *msg, int flags)
unlock:
list_for_each_entry_safe(rsgl, tmp, &ctx->list, list) {
af_alg_free_sg(&rsgl->sgl);
+ list_del(&rsgl->list);
if (rsgl != &ctx->first_rsgl)
sock_kfree_s(sk, rsgl, sizeof(*rsgl));
- list_del(&rsgl->list);
}
INIT_LIST_HEAD(&ctx->list);
aead_wmem_wakeup(sk);
diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c
index 312c4b4..6eb6733 100644
--- a/drivers/acpi/nfit/core.c
+++ b/drivers/acpi/nfit/core.c
@@ -2704,6 +2704,7 @@ static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
struct device *dev = acpi_desc->dev;
struct acpi_nfit_flush_work flush;
+ int rc;
/* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
device_lock(dev);
@@ -2716,7 +2717,10 @@ static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
INIT_WORK_ONSTACK(&flush.work, flush_probe);
COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
queue_work(nfit_wq, &flush.work);
- return wait_for_completion_interruptible(&flush.cmp);
+
+ rc = wait_for_completion_interruptible(&flush.cmp);
+ cancel_work_sync(&flush.work);
+ return rc;
}
static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 3fd76d9..a13a45e 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -378,6 +378,7 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
const struct freq_tbl *f;
+ int ret;
f = qcom_find_freq(rcg->freq_tbl, rate);
if (!f)
@@ -392,7 +393,13 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate)
return 0;
}
- return clk_rcg2_configure(rcg, f);
+ ret = clk_rcg2_configure(rcg, f);
+ if (ret)
+ return ret;
+
+ /* Update current frequency with the requested frequency. */
+ rcg->current_freq = rate;
+ return ret;
}
static int clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -410,7 +417,7 @@ static int clk_rcg2_set_rate_and_parent(struct clk_hw *hw,
static int clk_rcg2_enable(struct clk_hw *hw)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
- unsigned long rate = clk_get_rate(hw->clk);
+ unsigned long rate;
const struct freq_tbl *f;
if (!rcg->enable_safe_config)
@@ -424,6 +431,7 @@ static int clk_rcg2_enable(struct clk_hw *hw)
* is always on while APPS is online. Therefore, the RCG can safely be
* switched.
*/
+ rate = rcg->current_freq;
f = qcom_find_freq(rcg->freq_tbl, rate);
if (!f)
return -EINVAL;
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index e5a2016..82e62c5 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -824,6 +824,7 @@ static int __init arch_timer_common_init(void)
arch_timer_banner(arch_timers_present);
arch_counter_register(arch_timers_present);
+ clocksource_select_force();
return arch_timer_arch_init();
}
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index 0173b8b..884e557 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -120,14 +120,15 @@
loading your cpufreq low-level hardware driver, using the
'interactive' governor for latency-sensitive workloads.
-config CPU_FREQ_DEFAULT_GOV_INTERACTIVE
- bool "interactive"
- select CPU_FREQ_GOV_INTERACTIVE
+config CPU_FREQ_DEFAULT_GOV_SCHEDUTIL
+ bool "schedutil"
+ depends on SMP
+ select CPU_FREQ_GOV_SCHEDUTIL
+ select CPU_FREQ_GOV_PERFORMANCE
help
- Use the CPUFreq governor 'interactive' as default. This allows
- you to get a full dynamic cpu frequency capable system by simply
- loading your cpufreq low-level hardware driver, using the
- 'interactive' governor for latency-sensitive workloads.
+ Use the 'schedutil' CPUFreq governor by default. If unsure,
+ have a look at the help section of that governor. The fallback
+ governor will be 'performance'.
endchoice
@@ -243,6 +244,23 @@
If in doubt, say N.
+config CPU_FREQ_GOV_SCHEDUTIL
+ bool "'schedutil' cpufreq policy governor"
+ depends on CPU_FREQ && SMP
+ select CPU_FREQ_GOV_ATTR_SET
+ select IRQ_WORK
+ help
+ This governor makes decisions based on the utilization data provided
+ by the scheduler. It sets the CPU frequency to be proportional to
+ the utilization/capacity ratio coming from the scheduler. If the
+ utilization is frequency-invariant, the new frequency is also
+ proportional to the maximum available frequency. If that is not the
+ case, it is proportional to the current frequency of the CPU. The
+ frequency tipping point is at utilization/capacity equal to 80% in
+ both cases.
+
+ If in doubt, say N.
+
comment "CPU frequency scaling drivers"
config CPUFREQ_DT
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 4737520..80fa656 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -820,6 +820,25 @@ static void intel_pstate_hwp_enable(struct cpudata *cpudata)
wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
}
+#define MSR_IA32_POWER_CTL_BIT_EE 19
+
+/* Disable energy efficiency optimization */
+static void intel_pstate_disable_ee(int cpu)
+{
+ u64 power_ctl;
+ int ret;
+
+ ret = rdmsrl_on_cpu(cpu, MSR_IA32_POWER_CTL, &power_ctl);
+ if (ret)
+ return;
+
+ if (!(power_ctl & BIT(MSR_IA32_POWER_CTL_BIT_EE))) {
+ pr_info("Disabling energy efficiency optimization\n");
+ power_ctl |= BIT(MSR_IA32_POWER_CTL_BIT_EE);
+ wrmsrl_on_cpu(cpu, MSR_IA32_POWER_CTL, power_ctl);
+ }
+}
+
static int atom_get_min_pstate(void)
{
u64 value;
@@ -1420,6 +1439,11 @@ static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
{}
};
+static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
+ ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, core_params),
+ {}
+};
+
static int intel_pstate_init_cpu(unsigned int cpunum)
{
struct cpudata *cpu;
@@ -1435,6 +1459,12 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
cpu->cpu = cpunum;
if (hwp_active) {
+ const struct x86_cpu_id *id;
+
+ id = x86_match_cpu(intel_pstate_cpu_ee_disable_ids);
+ if (id)
+ intel_pstate_disable_ee(cpunum);
+
intel_pstate_hwp_enable(cpu);
pid_params.sample_rate_ms = 50;
pid_params.sample_rate_ns = 50 * NSEC_PER_MSEC;
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c
index faf3cb3..a388bf2 100644
--- a/drivers/crypto/ccp/ccp-dev-v5.c
+++ b/drivers/crypto/ccp/ccp-dev-v5.c
@@ -955,7 +955,7 @@ static irqreturn_t ccp5_irq_handler(int irq, void *data)
static void ccp5_config(struct ccp_device *ccp)
{
/* Public side */
- iowrite32(0x00001249, ccp->io_regs + CMD5_REQID_CONFIG_OFFSET);
+ iowrite32(0x0, ccp->io_regs + CMD5_REQID_CONFIG_OFFSET);
}
static void ccp5other_config(struct ccp_device *ccp)
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h
index da5f4a6..340aef1 100644
--- a/drivers/crypto/ccp/ccp-dev.h
+++ b/drivers/crypto/ccp/ccp-dev.h
@@ -238,6 +238,7 @@ struct ccp_dma_chan {
struct ccp_device *ccp;
spinlock_t lock;
+ struct list_head created;
struct list_head pending;
struct list_head active;
struct list_head complete;
diff --git a/drivers/crypto/ccp/ccp-dmaengine.c b/drivers/crypto/ccp/ccp-dmaengine.c
index 6553912..e5d9278 100644
--- a/drivers/crypto/ccp/ccp-dmaengine.c
+++ b/drivers/crypto/ccp/ccp-dmaengine.c
@@ -63,6 +63,7 @@ static void ccp_free_chan_resources(struct dma_chan *dma_chan)
ccp_free_desc_resources(chan->ccp, &chan->complete);
ccp_free_desc_resources(chan->ccp, &chan->active);
ccp_free_desc_resources(chan->ccp, &chan->pending);
+ ccp_free_desc_resources(chan->ccp, &chan->created);
spin_unlock_irqrestore(&chan->lock, flags);
}
@@ -273,6 +274,7 @@ static dma_cookie_t ccp_tx_submit(struct dma_async_tx_descriptor *tx_desc)
spin_lock_irqsave(&chan->lock, flags);
cookie = dma_cookie_assign(tx_desc);
+ list_del(&desc->entry);
list_add_tail(&desc->entry, &chan->pending);
spin_unlock_irqrestore(&chan->lock, flags);
@@ -426,7 +428,7 @@ static struct ccp_dma_desc *ccp_create_desc(struct dma_chan *dma_chan,
spin_lock_irqsave(&chan->lock, sflags);
- list_add_tail(&desc->entry, &chan->pending);
+ list_add_tail(&desc->entry, &chan->created);
spin_unlock_irqrestore(&chan->lock, sflags);
@@ -610,6 +612,7 @@ static int ccp_terminate_all(struct dma_chan *dma_chan)
/*TODO: Purge the complete list? */
ccp_free_desc_resources(chan->ccp, &chan->active);
ccp_free_desc_resources(chan->ccp, &chan->pending);
+ ccp_free_desc_resources(chan->ccp, &chan->created);
spin_unlock_irqrestore(&chan->lock, flags);
@@ -679,6 +682,7 @@ int ccp_dmaengine_register(struct ccp_device *ccp)
chan->ccp = ccp;
spin_lock_init(&chan->lock);
+ INIT_LIST_HEAD(&chan->created);
INIT_LIST_HEAD(&chan->pending);
INIT_LIST_HEAD(&chan->active);
INIT_LIST_HEAD(&chan->complete);
diff --git a/drivers/crypto/chelsio/chcr_core.c b/drivers/crypto/chelsio/chcr_core.c
index fb5f9bb..6aece3f 100644
--- a/drivers/crypto/chelsio/chcr_core.c
+++ b/drivers/crypto/chelsio/chcr_core.c
@@ -51,6 +51,7 @@ static struct cxgb4_uld_info chcr_uld_info = {
int assign_chcr_device(struct chcr_dev **dev)
{
struct uld_ctx *u_ctx;
+ int ret = -ENXIO;
/*
* Which device to use if multiple devices are available TODO
@@ -58,15 +59,14 @@ int assign_chcr_device(struct chcr_dev **dev)
* must go to the same device to maintain the ordering.
*/
mutex_lock(&dev_mutex); /* TODO ? */
- u_ctx = list_first_entry(&uld_ctx_list, struct uld_ctx, entry);
- if (!u_ctx) {
- mutex_unlock(&dev_mutex);
- return -ENXIO;
+ list_for_each_entry(u_ctx, &uld_ctx_list, entry)
+ if (u_ctx && u_ctx->dev) {
+ *dev = u_ctx->dev;
+ ret = 0;
+ break;
}
-
- *dev = u_ctx->dev;
mutex_unlock(&dev_mutex);
- return 0;
+ return ret;
}
static int chcr_dev_add(struct uld_ctx *u_ctx)
@@ -203,10 +203,8 @@ static int chcr_uld_state_change(void *handle, enum cxgb4_state state)
static int __init chcr_crypto_init(void)
{
- if (cxgb4_register_uld(CXGB4_ULD_CRYPTO, &chcr_uld_info)) {
+ if (cxgb4_register_uld(CXGB4_ULD_CRYPTO, &chcr_uld_info))
pr_err("ULD register fail: No chcr crypto support in cxgb4");
- return -1;
- }
return 0;
}
diff --git a/drivers/crypto/qat/qat_c62x/adf_drv.c b/drivers/crypto/qat/qat_c62x/adf_drv.c
index bc5cbc1..5b2d78a 100644
--- a/drivers/crypto/qat/qat_c62x/adf_drv.c
+++ b/drivers/crypto/qat/qat_c62x/adf_drv.c
@@ -233,7 +233,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
&hw_data->accel_capabilities_mask);
/* Find and map all the device's BARS */
- i = 0;
+ i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0;
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
ADF_PCI_MAX_BARS * 2) {
diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h
index e882253..33f0a62 100644
--- a/drivers/crypto/qat/qat_common/adf_accel_devices.h
+++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h
@@ -69,6 +69,7 @@
#define ADF_ERRSOU5 (0x3A000 + 0xD8)
#define ADF_DEVICE_FUSECTL_OFFSET 0x40
#define ADF_DEVICE_LEGFUSE_OFFSET 0x4C
+#define ADF_DEVICE_FUSECTL_MASK 0x80000000
#define ADF_PCI_MAX_BARS 3
#define ADF_DEVICE_NAME_LENGTH 32
#define ADF_ETR_MAX_RINGS_PER_BANK 16
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c
index 1e480f1..8c4fd25 100644
--- a/drivers/crypto/qat/qat_common/qat_hal.c
+++ b/drivers/crypto/qat/qat_common/qat_hal.c
@@ -456,7 +456,7 @@ static int qat_hal_init_esram(struct icp_qat_fw_loader_handle *handle)
unsigned int csr_val;
int times = 30;
- if (handle->pci_dev->device == ADF_C3XXX_PCI_DEVICE_ID)
+ if (handle->pci_dev->device != ADF_DH895XCC_PCI_DEVICE_ID)
return 0;
csr_val = ADF_CSR_RD(csr_addr, 0);
@@ -716,7 +716,7 @@ int qat_hal_init(struct adf_accel_dev *accel_dev)
(void __iomem *)((uintptr_t)handle->hal_cap_ae_xfer_csr_addr_v +
LOCAL_TO_XFER_REG_OFFSET);
handle->pci_dev = pci_info->pci_dev;
- if (handle->pci_dev->device != ADF_C3XXX_PCI_DEVICE_ID) {
+ if (handle->pci_dev->device == ADF_DH895XCC_PCI_DEVICE_ID) {
sram_bar =
&pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)];
handle->hal_sram_addr_v = sram_bar->virt_addr;
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index e6862a7..4e19bde 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1759,16 +1759,16 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
if (ret && arg->flags & DRM_MODE_PAGE_FLIP_EVENT) {
/*
- * TEST_ONLY and PAGE_FLIP_EVENT are mutually exclusive,
- * if they weren't, this code should be called on success
- * for TEST_ONLY too.
+ * Free the allocated event. drm_atomic_helper_setup_commit
+ * can allocate an event too, so only free it if it's ours
+ * to prevent a double free in drm_atomic_state_clear.
*/
-
for_each_crtc_in_state(state, crtc, crtc_state, i) {
- if (!crtc_state->event)
- continue;
-
- drm_event_cancel_free(dev, &crtc_state->event->base);
+ struct drm_pending_vblank_event *event = crtc_state->event;
+ if (event && (event->base.fence || event->base.file_priv)) {
+ drm_event_cancel_free(dev, &event->base);
+ crtc_state->event = NULL;
+ }
}
}
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index aa64448..f59771d 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1817,7 +1817,7 @@ int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr)
mgr->payloads[i].vcpi = req_payload.vcpi;
} else if (mgr->payloads[i].num_slots) {
mgr->payloads[i].num_slots = 0;
- drm_dp_destroy_payload_step1(mgr, port, port->vcpi.vcpi, &mgr->payloads[i]);
+ drm_dp_destroy_payload_step1(mgr, port, mgr->payloads[i].vcpi, &mgr->payloads[i]);
req_payload.payload_state = mgr->payloads[i].payload_state;
mgr->payloads[i].start_slot = 0;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a218c2e..0c400f8 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1215,14 +1215,14 @@ validate_exec_list(struct drm_device *dev,
if (exec[i].offset !=
gen8_canonical_addr(exec[i].offset & PAGE_MASK))
return -EINVAL;
-
- /* From drm_mm perspective address space is continuous,
- * so from this point we're always using non-canonical
- * form internally.
- */
- exec[i].offset = gen8_noncanonical_addr(exec[i].offset);
}
+ /* From drm_mm perspective address space is continuous,
+ * so from this point we're always using non-canonical
+ * form internally.
+ */
+ exec[i].offset = gen8_noncanonical_addr(exec[i].offset);
+
if (exec[i].alignment && !is_power_of_2(exec[i].alignment))
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8079e5b..b9be8a6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4280,10 +4280,10 @@ static void page_flip_completed(struct intel_crtc *intel_crtc)
drm_crtc_vblank_put(&intel_crtc->base);
wake_up_all(&dev_priv->pending_flip_queue);
- queue_work(dev_priv->wq, &work->unpin_work);
-
trace_i915_flip_complete(intel_crtc->plane,
work->pending_flip_obj);
+
+ queue_work(dev_priv->wq, &work->unpin_work);
}
static int intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 1c59ca5..cae27c5 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -1723,7 +1723,8 @@ bxt_get_dpll(struct intel_crtc *crtc,
return NULL;
if ((encoder->type == INTEL_OUTPUT_DP ||
- encoder->type == INTEL_OUTPUT_EDP) &&
+ encoder->type == INTEL_OUTPUT_EDP ||
+ encoder->type == INTEL_OUTPUT_DP_MST) &&
!bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
return NULL;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_catalog_8996.c b/drivers/gpu/drm/msm/sde/sde_hw_catalog_8996.c
deleted file mode 100644
index 652331f..0000000
--- a/drivers/gpu/drm/msm/sde/sde_hw_catalog_8996.c
+++ /dev/null
@@ -1,671 +0,0 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include "sde_hw_catalog.h"
-#include "sde_hw_mdss.h"
-#include "sde_hwio.h"
-
-/* VIG layer capability */
-#define VIG_17X_MASK \
- (BIT(SDE_SSPP_SRC) | BIT(SDE_SSPP_SCALER_QSEED2) |\
- BIT(SDE_SSPP_CSC) | BIT(SDE_SSPP_HSIC) |\
- BIT(SDE_SSPP_PCC) | BIT(SDE_SSPP_IGC) |\
- BIT(SDE_SSPP_MEMCOLOR) | BIT(SDE_SSPP_QOS))
-
-/* RGB layer capability */
-#define RGB_17X_MASK \
- (BIT(SDE_SSPP_SRC) | BIT(SDE_SSPP_SCALER_RGB) |\
- BIT(SDE_SSPP_PCC) | BIT(SDE_SSPP_IGC) | BIT(SDE_SSPP_QOS))
-
-/* DMA layer capability */
-#define DMA_17X_MASK \
- (BIT(SDE_SSPP_SRC) | BIT(SDE_SSPP_PCC) | BIT(SDE_SSPP_IGC) |\
- BIT(SDE_SSPP_QOS))
-
-/* Cursor layer capability */
-#define CURSOR_17X_MASK (BIT(SDE_SSPP_SRC) | BIT(SDE_SSPP_CURSOR))
-
-#define MIXER_17X_MASK (BIT(SDE_MIXER_SOURCESPLIT) |\
- BIT(SDE_MIXER_GC))
-
-#define DSPP_17X_MASK \
- (BIT(SDE_DSPP_IGC) | BIT(SDE_DSPP_PCC) |\
- BIT(SDE_DSPP_GC) | BIT(SDE_DSPP_HSIC) | BIT(SDE_DSPP_GAMUT) |\
- BIT(SDE_DSPP_DITHER) | BIT(SDE_DSPP_HIST) | BIT(SDE_DSPP_MEMCOLOR) |\
- BIT(SDE_DSPP_SIXZONE) | BIT(SDE_DSPP_AD) | BIT(SDE_DSPP_VLUT))
-
-#define PINGPONG_17X_MASK \
- (BIT(SDE_PINGPONG_TE) | BIT(SDE_PINGPONG_DSC))
-
-#define PINGPONG_17X_SPLIT_MASK \
- (PINGPONG_17X_MASK | BIT(SDE_PINGPONG_SPLIT) |\
- BIT(SDE_PINGPONG_TE2))
-
-#define WB01_17X_MASK \
- (BIT(SDE_WB_LINE_MODE) | BIT(SDE_WB_BLOCK_MODE) |\
- BIT(SDE_WB_CSC) | BIT(SDE_WB_CHROMA_DOWN) | BIT(SDE_WB_DOWNSCALE) |\
- BIT(SDE_WB_DITHER) | BIT(SDE_WB_TRAFFIC_SHAPER) |\
- BIT(SDE_WB_UBWC_1_0) | BIT(SDE_WB_YUV_CONFIG))
-
-#define WB2_17X_MASK \
- (BIT(SDE_WB_LINE_MODE) | BIT(SDE_WB_TRAFFIC_SHAPER) |\
- BIT(SDE_WB_YUV_CONFIG))
-
-#define DECIMATION_17X_MAX_H 4
-#define DECIMATION_17X_MAX_V 4
-
-#define RES_1080p ((u64)(1088*1920))
-#define RES_UHD ((u64)(3840*2160))
-
-static const struct sde_format_extended plane_formats[] = {
- {DRM_FORMAT_ARGB8888, 0},
- {DRM_FORMAT_ABGR8888, 0},
- {DRM_FORMAT_RGBA8888, 0},
- {DRM_FORMAT_RGBA8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_BGRA8888, 0},
- {DRM_FORMAT_XRGB8888, 0},
- {DRM_FORMAT_RGBX8888, 0},
- {DRM_FORMAT_RGBX8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_RGB888, 0},
- {DRM_FORMAT_BGR888, 0},
- {DRM_FORMAT_RGB565, 0},
- {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_BGR565, 0},
- {DRM_FORMAT_ARGB1555, 0},
- {DRM_FORMAT_ABGR1555, 0},
- {DRM_FORMAT_RGBA5551, 0},
- {DRM_FORMAT_BGRA5551, 0},
- {DRM_FORMAT_XRGB1555, 0},
- {DRM_FORMAT_XBGR1555, 0},
- {DRM_FORMAT_RGBX5551, 0},
- {DRM_FORMAT_BGRX5551, 0},
- {DRM_FORMAT_ARGB4444, 0},
- {DRM_FORMAT_ABGR4444, 0},
- {DRM_FORMAT_RGBA4444, 0},
- {DRM_FORMAT_BGRA4444, 0},
- {DRM_FORMAT_XRGB4444, 0},
- {DRM_FORMAT_XBGR4444, 0},
- {DRM_FORMAT_RGBX4444, 0},
- {DRM_FORMAT_BGRX4444, 0},
- {0, 0},
-};
-
-static const struct sde_format_extended plane_formats_yuv[] = {
- {DRM_FORMAT_ARGB8888, 0},
- {DRM_FORMAT_ABGR8888, 0},
- {DRM_FORMAT_RGBA8888, 0},
- {DRM_FORMAT_RGBA8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_BGRA8888, 0},
- {DRM_FORMAT_XRGB8888, 0},
- {DRM_FORMAT_RGBX8888, 0},
- {DRM_FORMAT_RGBX8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_RGB888, 0},
- {DRM_FORMAT_BGR888, 0},
- {DRM_FORMAT_RGB565, 0},
- {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_BGR565, 0},
- {DRM_FORMAT_ARGB1555, 0},
- {DRM_FORMAT_ABGR1555, 0},
- {DRM_FORMAT_RGBA5551, 0},
- {DRM_FORMAT_BGRA5551, 0},
- {DRM_FORMAT_XRGB1555, 0},
- {DRM_FORMAT_XBGR1555, 0},
- {DRM_FORMAT_RGBX5551, 0},
- {DRM_FORMAT_BGRX5551, 0},
- {DRM_FORMAT_ARGB4444, 0},
- {DRM_FORMAT_ABGR4444, 0},
- {DRM_FORMAT_RGBA4444, 0},
- {DRM_FORMAT_BGRA4444, 0},
- {DRM_FORMAT_XRGB4444, 0},
- {DRM_FORMAT_XBGR4444, 0},
- {DRM_FORMAT_RGBX4444, 0},
- {DRM_FORMAT_BGRX4444, 0},
- {DRM_FORMAT_NV12, 0},
- {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_NV21, 0},
- {DRM_FORMAT_NV16, 0},
- {DRM_FORMAT_NV61, 0},
- {DRM_FORMAT_VYUY, 0},
- {DRM_FORMAT_UYVY, 0},
- {DRM_FORMAT_YUYV, 0},
- {DRM_FORMAT_YVYU, 0},
- {DRM_FORMAT_YUV420, 0},
- {DRM_FORMAT_YVU420, 0},
- {0, 0},
-};
-
-static const struct sde_format_extended wb0_formats[] = {
- {DRM_FORMAT_RGB565, 0},
- {DRM_FORMAT_RGB888, 0},
- {DRM_FORMAT_ARGB8888, 0},
- {DRM_FORMAT_RGBA8888, 0},
- {DRM_FORMAT_XRGB8888, 0},
- {DRM_FORMAT_RGBX8888, 0},
- {DRM_FORMAT_ARGB1555, 0},
- {DRM_FORMAT_RGBA5551, 0},
- {DRM_FORMAT_XRGB1555, 0},
- {DRM_FORMAT_RGBX5551, 0},
- {DRM_FORMAT_ARGB4444, 0},
- {DRM_FORMAT_RGBA4444, 0},
- {DRM_FORMAT_RGBX4444, 0},
- {DRM_FORMAT_XRGB4444, 0},
-
- {DRM_FORMAT_BGR565, 0},
- {DRM_FORMAT_BGR888, 0},
- {DRM_FORMAT_ABGR8888, 0},
- {DRM_FORMAT_BGRA8888, 0},
- {DRM_FORMAT_BGRX8888, 0},
- {DRM_FORMAT_ABGR1555, 0},
- {DRM_FORMAT_BGRA5551, 0},
- {DRM_FORMAT_XBGR1555, 0},
- {DRM_FORMAT_BGRX5551, 0},
- {DRM_FORMAT_ABGR4444, 0},
- {DRM_FORMAT_BGRA4444, 0},
- {DRM_FORMAT_BGRX4444, 0},
- {DRM_FORMAT_XBGR4444, 0},
-
- {DRM_FORMAT_RGBX8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_RGBA8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_QCOM_COMPRESSED},
-
- {DRM_FORMAT_YUV420, 0},
- {DRM_FORMAT_NV12, 0},
- {DRM_FORMAT_NV16, 0},
- {DRM_FORMAT_NV21, 0},
- {DRM_FORMAT_NV61, 0},
- {DRM_FORMAT_UYVY, 0},
- {DRM_FORMAT_YUYV, 0},
-
- {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_COMPRESSED},
- {DRM_FORMAT_AYUV, DRM_FORMAT_MOD_QCOM_COMPRESSED},
-
- {0, 0},
-};
-
-static const struct sde_format_extended wb2_formats[] = {
- {DRM_FORMAT_RGB565, 0},
- {DRM_FORMAT_RGB888, 0},
- {DRM_FORMAT_ARGB8888, 0},
- {DRM_FORMAT_RGBA8888, 0},
- {DRM_FORMAT_XRGB8888, 0},
- {DRM_FORMAT_RGBX8888, 0},
- {DRM_FORMAT_ARGB1555, 0},
- {DRM_FORMAT_RGBA5551, 0},
- {DRM_FORMAT_XRGB1555, 0},
- {DRM_FORMAT_RGBX5551, 0},
- {DRM_FORMAT_ARGB4444, 0},
- {DRM_FORMAT_RGBA4444, 0},
- {DRM_FORMAT_RGBX4444, 0},
- {DRM_FORMAT_XRGB4444, 0},
-
- {DRM_FORMAT_BGR565, 0},
- {DRM_FORMAT_BGR888, 0},
- {DRM_FORMAT_ABGR8888, 0},
- {DRM_FORMAT_BGRA8888, 0},
- {DRM_FORMAT_BGRX8888, 0},
- {DRM_FORMAT_ABGR1555, 0},
- {DRM_FORMAT_BGRA5551, 0},
- {DRM_FORMAT_XBGR1555, 0},
- {DRM_FORMAT_BGRX5551, 0},
- {DRM_FORMAT_ABGR4444, 0},
- {DRM_FORMAT_BGRA4444, 0},
- {DRM_FORMAT_BGRX4444, 0},
- {DRM_FORMAT_XBGR4444, 0},
-
- {DRM_FORMAT_YUV420, 0},
- {DRM_FORMAT_NV12, 0},
- {DRM_FORMAT_NV16, 0},
- {DRM_FORMAT_YUYV, 0},
-
- {0, 0},
-};
-
-/**
- * set_cfg_1xx_init(): populate sde sub-blocks reg offsets and instance counts
- */
-static inline int set_cfg_1xx_init(struct sde_mdss_cfg *cfg)
-{
-
- /* Layer capability */
- static const struct sde_sspp_sub_blks vig_layer = {
- .maxlinewidth = 2560,
- .danger_lut_linear = 0x000f,
- .safe_lut_linear = 0xfffc,
- .danger_lut_tile = 0xffff,
- .safe_lut_tile = 0xff00,
- .danger_lut_nrt = 0x0,
- .safe_lut_nrt = 0xffff,
- .creq_lut_nrt = 0x0,
- .creq_vblank = 0x2,
- .danger_vblank = 0,
- .pixel_ram_size = 50 * 1024,
- .maxdwnscale = 4, .maxupscale = 20,
- .maxhdeciexp = DECIMATION_17X_MAX_H,
- .maxvdeciexp = DECIMATION_17X_MAX_V,
- .src_blk = {.id = SDE_SSPP_SRC,
- .base = 0x00, .len = 0x150,},
- .scaler_blk = {.id = SDE_SSPP_SCALER_QSEED2,
- .base = 0x200, .len = 0x70,},
- .csc_blk = {.id = SDE_SSPP_CSC,
- .base = 0x320, .len = 0x44,},
- .format_list = plane_formats_yuv,
- .igc_blk = {.id = SDE_SSPP_IGC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .pcc_blk = {.id = SDE_SSPP_PCC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .hsic = {.id = SDE_SSPP_HSIC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .memcolor = {.id = SDE_SSPP_MEMCOLOR, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- };
-
- static const struct sde_sspp_sub_blks layer = {
- .maxlinewidth = 2560,
- .danger_lut_linear = 0x000f,
- .safe_lut_linear = 0xfffc,
- .danger_lut_tile = 0xffff,
- .safe_lut_tile = 0xff00,
- .danger_lut_nrt = 0x0,
- .safe_lut_nrt = 0xffff,
- .creq_lut_nrt = 0x0,
- .creq_vblank = 0x2,
- .danger_vblank = 0,
- .pixel_ram_size = 50 * 1024,
- .maxdwnscale = 4, .maxupscale = 20,
- .maxhdeciexp = DECIMATION_17X_MAX_H,
- .maxvdeciexp = DECIMATION_17X_MAX_V,
- .src_blk = {.id = SDE_SSPP_SRC,
- .base = 0x00, .len = 0x150,},
- .scaler_blk = {.id = SDE_SSPP_SCALER_QSEED2,
- .base = 0x200, .len = 0x70,},
- .csc_blk = {.id = SDE_SSPP_CSC,
- .base = 0x320, .len = 0x44,},
- .format_list = plane_formats,
- .igc_blk = {.id = SDE_SSPP_IGC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .pcc_blk = {.id = SDE_SSPP_PCC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- };
-
- static const struct sde_sspp_sub_blks dma = {
- .maxlinewidth = 2560,
- .danger_lut_linear = 0x000f,
- .safe_lut_linear = 0xfffc,
- .danger_lut_tile = 0xffff,
- .safe_lut_tile = 0xff00,
- .danger_lut_nrt = 0x0,
- .safe_lut_nrt = 0xffff,
- .creq_lut_nrt = 0x0,
- .creq_vblank = 0x2,
- .danger_vblank = 0,
- .pixel_ram_size = 50 * 1024,
- .maxdwnscale = 1, .maxupscale = 1,
- .maxhdeciexp = DECIMATION_17X_MAX_H,
- .maxvdeciexp = DECIMATION_17X_MAX_V,
- .src_blk = {.id = SDE_SSPP_SRC, .base = 0x00, .len = 0x150,},
- .scaler_blk = {.id = 0, .base = 0x00, .len = 0x0,},
- .csc_blk = {.id = 0, .base = 0x00, .len = 0x0,},
- .format_list = plane_formats,
- .igc_blk = {.id = SDE_SSPP_IGC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .pcc_blk = {.id = SDE_SSPP_PCC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- };
-
- static const struct sde_sspp_sub_blks cursor = {
- .maxlinewidth = 128,
- .maxdwnscale = 1, .maxupscale = 1,
- .maxhdeciexp = 0,
- .maxvdeciexp = 0,
- .src_blk = {.id = SDE_SSPP_SRC, .base = 0x00, .len = 0x150,},
- .scaler_blk = {.id = 0, .base = 0x00, .len = 0x0,},
- .csc_blk = {.id = 0, .base = 0x00, .len = 0x0,},
- .format_list = plane_formats,
- };
-
- /* MIXER capability */
- static const struct sde_lm_sub_blks lm = {
- .maxwidth = 2560,
- .maxblendstages = 7, /* excluding base layer */
- .blendstage_base = { /* offsets relative to mixer base */
- 0x20, 0x50, 0x80, 0xB0, 0x230, 0x260, 0x290 },
- .gc = {.id = SDE_DSPP_GC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- };
-
- /* DSPP capability */
- static const struct sde_dspp_sub_blks dspp = {
- .igc = {.id = SDE_DSPP_IGC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .pcc = {.id = SDE_DSPP_PCC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .gamut = {.id = SDE_DSPP_GAMUT, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .dither = {.id = SDE_DSPP_DITHER, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .hsic = {.id = SDE_DSPP_HSIC, .base = 0x00, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .memcolor = {.id = SDE_DSPP_MEMCOLOR, .base = 0x00, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .sixzone = {.id = SDE_DSPP_SIXZONE, .base = 0x00, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .hist = {.id = SDE_DSPP_HIST, .base = 0x00, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .gc = {.id = SDE_DSPP_GC, .base = 0x0, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- .ad = {.id = SDE_DSPP_AD, .base = 0x00, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x3, 0x0)},
- .vlut = {.id = SDE_DSPP_VLUT, .base = 0x1400, .len = 0x0,
- .version = SDE_COLOR_PROCESS_VER(0x1, 0x0)},
- };
-
- /* PINGPONG capability */
- static const struct sde_pingpong_sub_blks pingpong = {
- .te = {.id = SDE_PINGPONG_TE, .base = 0x0000, .len = 0x0,
- .version = 0x1},
- .te2 = {.id = SDE_PINGPONG_TE2, .base = 0x2000, .len = 0x0,
- .version = 0x1},
- .dsc = {.id = SDE_PINGPONG_DSC, .base = 0x10000, .len = 0x0,
- .version = 0x1},
- };
-
- /* Writeback 0/1 capability */
- static const struct sde_wb_sub_blocks wb0 = {
- .maxlinewidth = 2048,
- };
-
- /* Writeback 2 capability */
- static const struct sde_wb_sub_blocks wb2 = {
- .maxlinewidth = 4096,
- };
-
- static const struct sde_vbif_dynamic_ot_cfg dynamic_ot_cfg[] = {
- {RES_1080p * 30, 2},
- {RES_1080p * 60, 4},
- {RES_UHD * 30, 16},
- };
-
- /* Setup Register maps and defaults */
- *cfg = (struct sde_mdss_cfg){
- .mdss_count = 1,
- .mdss = {
- {.id = MDP_TOP, .base = 0x00000000, .features = 0}
- },
- .mdp_count = 1,
- .mdp = {
- {.id = MDP_TOP, .base = 0x00001000, .features = 0,
- .highest_bank_bit = 0x2,
- .clk_ctrls[SDE_CLK_CTRL_VIG0] = {
- .reg_off = 0x2AC, .bit_off = 0},
- .clk_ctrls[SDE_CLK_CTRL_VIG1] = {
- .reg_off = 0x2B4, .bit_off = 0},
- .clk_ctrls[SDE_CLK_CTRL_VIG2] = {
- .reg_off = 0x2BC, .bit_off = 0},
- .clk_ctrls[SDE_CLK_CTRL_VIG3] = {
- .reg_off = 0x2C4, .bit_off = 0},
- .clk_ctrls[SDE_CLK_CTRL_RGB0] = {
- .reg_off = 0x2AC, .bit_off = 4},
- .clk_ctrls[SDE_CLK_CTRL_RGB1] = {
- .reg_off = 0x2B4, .bit_off = 4},
- .clk_ctrls[SDE_CLK_CTRL_RGB2] = {
- .reg_off = 0x2BC, .bit_off = 4},
- .clk_ctrls[SDE_CLK_CTRL_RGB3] = {
- .reg_off = 0x2C4, .bit_off = 4},
- .clk_ctrls[SDE_CLK_CTRL_DMA0] = {
- .reg_off = 0x2AC, .bit_off = 8},
- .clk_ctrls[SDE_CLK_CTRL_DMA1] = {
- .reg_off = 0x2B4, .bit_off = 8},
- .clk_ctrls[SDE_CLK_CTRL_CURSOR0] = {
- .reg_off = 0x3A8, .bit_off = 16},
- .clk_ctrls[SDE_CLK_CTRL_CURSOR1] = {
- .reg_off = 0x3B0, .bit_off = 16},
- .clk_ctrls[SDE_CLK_CTRL_WB0] = {
- .reg_off = 0x2BC, .bit_off = 8},
- .clk_ctrls[SDE_CLK_CTRL_WB1] = {
- .reg_off = 0x2BC, .bit_off = 12},
- .clk_ctrls[SDE_CLK_CTRL_WB2] = {
- .reg_off = 0x2BC, .bit_off = 16},
- },
- },
- .ctl_count = 5,
- .ctl = {
- {.id = CTL_0,
- .base = 0x00002000,
- .features = BIT(SDE_CTL_SPLIT_DISPLAY) |
- BIT(SDE_CTL_PINGPONG_SPLIT) },
- {.id = CTL_1,
- .base = 0x00002200,
- .features = BIT(SDE_CTL_SPLIT_DISPLAY) },
- {.id = CTL_2,
- .base = 0x00002400},
- {.id = CTL_3,
- .base = 0x00002600},
- {.id = CTL_4,
- .base = 0x00002800},
- },
- /* 4 VIG, + 4 RGB + 2 DMA + 2 CURSOR */
- .sspp_count = 12,
- .sspp = {
- {.id = SSPP_VIG0, .base = 0x00005000,
- .features = VIG_17X_MASK, .sblk = &vig_layer,
- .xin_id = 0,
- .clk_ctrl = SDE_CLK_CTRL_VIG0},
- {.id = SSPP_VIG1, .base = 0x00007000,
- .features = VIG_17X_MASK, .sblk = &vig_layer,
- .xin_id = 4,
- .clk_ctrl = SDE_CLK_CTRL_VIG1},
- {.id = SSPP_VIG2, .base = 0x00009000,
- .features = VIG_17X_MASK, .sblk = &vig_layer,
- .xin_id = 8,
- .clk_ctrl = SDE_CLK_CTRL_VIG2},
- {.id = SSPP_VIG3, .base = 0x0000b000,
- .features = VIG_17X_MASK, .sblk = &vig_layer,
- .xin_id = 12,
- .clk_ctrl = SDE_CLK_CTRL_VIG3},
-
- {.id = SSPP_RGB0, .base = 0x00015000,
- .features = RGB_17X_MASK, .sblk = &layer,
- .xin_id = 1,
- .clk_ctrl = SDE_CLK_CTRL_RGB0},
- {.id = SSPP_RGB1, .base = 0x00017000,
- .features = RGB_17X_MASK, .sblk = &layer,
- .xin_id = 5,
- .clk_ctrl = SDE_CLK_CTRL_RGB1},
- {.id = SSPP_RGB2, .base = 0x00019000,
- .features = RGB_17X_MASK, .sblk = &layer,
- .xin_id = 9,
- .clk_ctrl = SDE_CLK_CTRL_RGB2},
- {.id = SSPP_RGB3, .base = 0x0001B000,
- .features = RGB_17X_MASK, .sblk = &layer,
- .xin_id = 13,
- .clk_ctrl = SDE_CLK_CTRL_RGB3},
-
- {.id = SSPP_DMA0, .base = 0x00025000,
- .features = DMA_17X_MASK, .sblk = &dma,
- .xin_id = 2,
- .clk_ctrl = SDE_CLK_CTRL_DMA0},
- {.id = SSPP_DMA1, .base = 0x00027000,
- .features = DMA_17X_MASK, .sblk = &dma,
- .xin_id = 10,
- .clk_ctrl = SDE_CLK_CTRL_DMA1},
-
- {.id = SSPP_CURSOR0, .base = 0x00035000,
- .features = CURSOR_17X_MASK, .sblk = &cursor,
- .xin_id = 7,
- .clk_ctrl = SDE_CLK_CTRL_CURSOR0},
- {.id = SSPP_CURSOR1, .base = 0x00037000,
- .features = CURSOR_17X_MASK, .sblk = &cursor,
- .xin_id = 7,
- .clk_ctrl = SDE_CLK_CTRL_CURSOR1},
- },
- .mixer_count = 6,
- .mixer = {
- {.id = LM_0, .base = 0x00045000,
- .features = MIXER_17X_MASK,
- .sblk = &lm,
- .dspp = DSPP_0,
- .pingpong = PINGPONG_0,
- .lm_pair_mask = (1 << LM_1) },
- {.id = LM_1, .base = 0x00046000,
- .features = MIXER_17X_MASK,
- .sblk = &lm,
- .dspp = DSPP_1,
- .pingpong = PINGPONG_1,
- .lm_pair_mask = (1 << LM_0) },
- {.id = LM_2, .base = 0x00047000,
- .features = MIXER_17X_MASK,
- .sblk = &lm,
- .dspp = DSPP_MAX,
- .pingpong = PINGPONG_2,
- .lm_pair_mask = (1 << LM_5) },
- {.id = LM_3, .base = 0x00048000,
- .features = MIXER_17X_MASK,
- .sblk = &lm,
- .dspp = DSPP_MAX,
- .pingpong = PINGPONG_MAX},
- {.id = LM_4, .base = 0x00049000,
- .features = MIXER_17X_MASK,
- .sblk = &lm,
- .dspp = DSPP_MAX,
- .pingpong = PINGPONG_MAX},
- {.id = LM_5, .base = 0x0004a000,
- .features = MIXER_17X_MASK,
- .sblk = &lm,
- .dspp = DSPP_MAX,
- .pingpong = PINGPONG_3,
- .lm_pair_mask = (1 << LM_2) },
- },
- .dspp_count = 2,
- .dspp = {
- {.id = DSPP_0, .base = 0x00055000,
- .features = DSPP_17X_MASK,
- .sblk = &dspp},
- {.id = DSPP_1, .base = 0x00057000,
- .features = DSPP_17X_MASK,
- .sblk = &dspp},
- },
- .pingpong_count = 4,
- .pingpong = {
- {.id = PINGPONG_0, .base = 0x00071000,
- .features = PINGPONG_17X_SPLIT_MASK,
- .sblk = &pingpong},
- {.id = PINGPONG_1, .base = 0x00071800,
- .features = PINGPONG_17X_SPLIT_MASK,
- .sblk = &pingpong},
- {.id = PINGPONG_2, .base = 0x00072000,
- .features = PINGPONG_17X_MASK,
- .sblk = &pingpong},
- {.id = PINGPONG_3, .base = 0x00072800,
- .features = PINGPONG_17X_MASK,
- .sblk = &pingpong},
- },
- .cdm_count = 1,
- .cdm = {
- {.id = CDM_0, .base = 0x0007A200, .features = 0,
- .intf_connect = BIT(INTF_3),
- .wb_connect = BIT(WB_2),}
- },
- .intf_count = 4,
- .intf = {
- {.id = INTF_0, .base = 0x0006B000,
- .type = INTF_NONE, .controller_id = 0,
- .prog_fetch_lines_worst_case = 21},
- {.id = INTF_1, .base = 0x0006B800,
- .type = INTF_DSI, .controller_id = 0,
- .prog_fetch_lines_worst_case = 21},
- {.id = INTF_2, .base = 0x0006C000,
- .type = INTF_DSI, .controller_id = 1,
- .prog_fetch_lines_worst_case = 21},
- {.id = INTF_3, .base = 0x0006C800,
- .type = INTF_HDMI, .controller_id = 0,
- .prog_fetch_lines_worst_case = 21},
- },
- .wb_count = 3,
- .wb = {
- {.id = WB_0, .base = 0x00065000,
- .features = WB01_17X_MASK,
- .sblk = &wb0,
- .format_list = wb0_formats,
- .vbif_idx = VBIF_NRT,
- .xin_id = 3,
- .clk_ctrl = SDE_CLK_CTRL_WB0},
- {.id = WB_1, .base = 0x00065800,
- .features = WB01_17X_MASK,
- .sblk = &wb0,
- .format_list = wb0_formats,
- .vbif_idx = VBIF_NRT,
- .xin_id = 11,
- .clk_ctrl = SDE_CLK_CTRL_WB1},
- {.id = WB_2, .base = 0x00066000,
- .features = WB2_17X_MASK,
- .sblk = &wb2,
- .format_list = wb2_formats,
- .vbif_idx = VBIF_NRT,
- .xin_id = 6,
- .clk_ctrl = SDE_CLK_CTRL_WB2},
- },
- .vbif_count = 2,
- .vbif = {
- {.id = VBIF_0,
- .base = 0, /* 0x000B0000 */
- .features = BIT(SDE_VBIF_QOS_OTLIM),
- .default_ot_rd_limit = 32,
- .default_ot_wr_limit = 16,
- .xin_halt_timeout = 0x4000,
- .dynamic_ot_rd_tbl = {
- .count = ARRAY_SIZE(dynamic_ot_cfg),
- .cfg = dynamic_ot_cfg},
- .dynamic_ot_wr_tbl = {
- .count = ARRAY_SIZE(dynamic_ot_cfg),
- .cfg = dynamic_ot_cfg},
- },
- {.id = VBIF_1,
- .base = 0, /* 0x000B8000 */
- .features = BIT(SDE_VBIF_QOS_OTLIM),
- .default_ot_rd_limit = 32,
- .default_ot_wr_limit = 16,
- .xin_halt_timeout = 0x4000,
- .dynamic_ot_rd_tbl = {
- .count = ARRAY_SIZE(dynamic_ot_cfg),
- .cfg = dynamic_ot_cfg},
- .dynamic_ot_wr_tbl = {
- .count = ARRAY_SIZE(dynamic_ot_cfg),
- .cfg = dynamic_ot_cfg},
- },
- },
- };
- return 0;
-}
-
-/**
- * sde_mdp_cfg_170_init(): Populate the sde sub-blocks catalog information
- */
-struct sde_mdss_cfg *sde_mdss_cfg_170_init(u32 step)
-{
- struct sde_mdss_cfg *m = NULL;
-
- /*
- * This function, for each sub-block sets,
- * instance count, IO regions,
- * default capabilities and this version capabilities,
- * Additional catalog items
- */
-
- m = kzalloc(sizeof(*m), GFP_KERNEL);
- if (!m)
- return NULL;
-
- set_cfg_1xx_init(m);
- m->hwversion = SDE_HW_VER(1, 7, step);
-
- return m;
-}
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
index fb16070..4a4f953 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -205,8 +205,8 @@ static int radeon_cursor_move_locked(struct drm_crtc *crtc, int x, int y)
}
if (x <= (crtc->x - w) || y <= (crtc->y - radeon_crtc->cursor_height) ||
- x >= (crtc->x + crtc->mode.crtc_hdisplay) ||
- y >= (crtc->y + crtc->mode.crtc_vdisplay))
+ x >= (crtc->x + crtc->mode.hdisplay) ||
+ y >= (crtc->y + crtc->mode.vdisplay))
goto out_of_bounds;
x += xorigin;
diff --git a/drivers/hv/channel.c b/drivers/hv/channel.c
index 16f91c8..5fb4c6d 100644
--- a/drivers/hv/channel.c
+++ b/drivers/hv/channel.c
@@ -39,7 +39,7 @@
* vmbus_setevent- Trigger an event notification on the specified
* channel.
*/
-static void vmbus_setevent(struct vmbus_channel *channel)
+void vmbus_setevent(struct vmbus_channel *channel)
{
struct hv_monitor_page *monitorpage;
@@ -65,6 +65,7 @@ static void vmbus_setevent(struct vmbus_channel *channel)
vmbus_set_event(channel);
}
}
+EXPORT_SYMBOL_GPL(vmbus_setevent);
/*
* vmbus_open - Open the specified channel.
@@ -635,8 +636,6 @@ int vmbus_sendpacket_ctl(struct vmbus_channel *channel, void *buffer,
u32 packetlen_aligned = ALIGN(packetlen, sizeof(u64));
struct kvec bufferlist[3];
u64 aligned_data = 0;
- int ret;
- bool signal = false;
bool lock = channel->acquire_ring_lock;
int num_vecs = ((bufferlen != 0) ? 3 : 1);
@@ -656,33 +655,9 @@ int vmbus_sendpacket_ctl(struct vmbus_channel *channel, void *buffer,
bufferlist[2].iov_base = &aligned_data;
bufferlist[2].iov_len = (packetlen_aligned - packetlen);
- ret = hv_ringbuffer_write(&channel->outbound, bufferlist, num_vecs,
- &signal, lock, channel->signal_policy);
+ return hv_ringbuffer_write(channel, bufferlist, num_vecs,
+ lock, kick_q);
- /*
- * Signalling the host is conditional on many factors:
- * 1. The ring state changed from being empty to non-empty.
- * This is tracked by the variable "signal".
- * 2. The variable kick_q tracks if more data will be placed
- * on the ring. We will not signal if more data is
- * to be placed.
- *
- * Based on the channel signal state, we will decide
- * which signaling policy will be applied.
- *
- * If we cannot write to the ring-buffer; signal the host
- * even if we may not have written anything. This is a rare
- * enough condition that it should not matter.
- * NOTE: in this case, the hvsock channel is an exception, because
- * it looks the host side's hvsock implementation has a throttling
- * mechanism which can hurt the performance otherwise.
- */
-
- if (((ret == 0) && kick_q && signal) ||
- (ret && !is_hvsock_channel(channel)))
- vmbus_setevent(channel);
-
- return ret;
}
EXPORT_SYMBOL(vmbus_sendpacket_ctl);
@@ -723,7 +698,6 @@ int vmbus_sendpacket_pagebuffer_ctl(struct vmbus_channel *channel,
u32 flags,
bool kick_q)
{
- int ret;
int i;
struct vmbus_channel_packet_page_buffer desc;
u32 descsize;
@@ -731,7 +705,6 @@ int vmbus_sendpacket_pagebuffer_ctl(struct vmbus_channel *channel,
u32 packetlen_aligned;
struct kvec bufferlist[3];
u64 aligned_data = 0;
- bool signal = false;
bool lock = channel->acquire_ring_lock;
if (pagecount > MAX_PAGE_BUFFER_COUNT)
@@ -769,29 +742,8 @@ int vmbus_sendpacket_pagebuffer_ctl(struct vmbus_channel *channel,
bufferlist[2].iov_base = &aligned_data;
bufferlist[2].iov_len = (packetlen_aligned - packetlen);
- ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3,
- &signal, lock, channel->signal_policy);
-
- /*
- * Signalling the host is conditional on many factors:
- * 1. The ring state changed from being empty to non-empty.
- * This is tracked by the variable "signal".
- * 2. The variable kick_q tracks if more data will be placed
- * on the ring. We will not signal if more data is
- * to be placed.
- *
- * Based on the channel signal state, we will decide
- * which signaling policy will be applied.
- *
- * If we cannot write to the ring-buffer; signal the host
- * even if we may not have written anything. This is a rare
- * enough condition that it should not matter.
- */
-
- if (((ret == 0) && kick_q && signal) || (ret))
- vmbus_setevent(channel);
-
- return ret;
+ return hv_ringbuffer_write(channel, bufferlist, 3,
+ lock, kick_q);
}
EXPORT_SYMBOL_GPL(vmbus_sendpacket_pagebuffer_ctl);
@@ -822,12 +774,10 @@ int vmbus_sendpacket_mpb_desc(struct vmbus_channel *channel,
u32 desc_size,
void *buffer, u32 bufferlen, u64 requestid)
{
- int ret;
u32 packetlen;
u32 packetlen_aligned;
struct kvec bufferlist[3];
u64 aligned_data = 0;
- bool signal = false;
bool lock = channel->acquire_ring_lock;
packetlen = desc_size + bufferlen;
@@ -848,13 +798,8 @@ int vmbus_sendpacket_mpb_desc(struct vmbus_channel *channel,
bufferlist[2].iov_base = &aligned_data;
bufferlist[2].iov_len = (packetlen_aligned - packetlen);
- ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3,
- &signal, lock, channel->signal_policy);
-
- if (ret == 0 && signal)
- vmbus_setevent(channel);
-
- return ret;
+ return hv_ringbuffer_write(channel, bufferlist, 3,
+ lock, true);
}
EXPORT_SYMBOL_GPL(vmbus_sendpacket_mpb_desc);
@@ -866,14 +811,12 @@ int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel,
struct hv_multipage_buffer *multi_pagebuffer,
void *buffer, u32 bufferlen, u64 requestid)
{
- int ret;
struct vmbus_channel_packet_multipage_buffer desc;
u32 descsize;
u32 packetlen;
u32 packetlen_aligned;
struct kvec bufferlist[3];
u64 aligned_data = 0;
- bool signal = false;
bool lock = channel->acquire_ring_lock;
u32 pfncount = NUM_PAGES_SPANNED(multi_pagebuffer->offset,
multi_pagebuffer->len);
@@ -913,13 +856,8 @@ int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel,
bufferlist[2].iov_base = &aligned_data;
bufferlist[2].iov_len = (packetlen_aligned - packetlen);
- ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3,
- &signal, lock, channel->signal_policy);
-
- if (ret == 0 && signal)
- vmbus_setevent(channel);
-
- return ret;
+ return hv_ringbuffer_write(channel, bufferlist, 3,
+ lock, true);
}
EXPORT_SYMBOL_GPL(vmbus_sendpacket_multipagebuffer);
@@ -941,16 +879,9 @@ __vmbus_recvpacket(struct vmbus_channel *channel, void *buffer,
u32 bufferlen, u32 *buffer_actual_len, u64 *requestid,
bool raw)
{
- int ret;
- bool signal = false;
+ return hv_ringbuffer_read(channel, buffer, bufferlen,
+ buffer_actual_len, requestid, raw);
- ret = hv_ringbuffer_read(&channel->inbound, buffer, bufferlen,
- buffer_actual_len, requestid, &signal, raw);
-
- if (signal)
- vmbus_setevent(channel);
-
- return ret;
}
int vmbus_recvpacket(struct vmbus_channel *channel, void *buffer,
diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c
index 1bc1d479..caf3418 100644
--- a/drivers/hv/channel_mgmt.c
+++ b/drivers/hv/channel_mgmt.c
@@ -449,8 +449,6 @@ static void vmbus_process_offer(struct vmbus_channel *newchannel)
}
dev_type = hv_get_dev_type(newchannel);
- if (dev_type == HV_NIC)
- set_channel_signal_state(newchannel, HV_SIGNAL_POLICY_EXPLICIT);
init_vp_index(newchannel, dev_type);
diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h
index a5b4442..2b13f2a 100644
--- a/drivers/hv/hyperv_vmbus.h
+++ b/drivers/hv/hyperv_vmbus.h
@@ -527,14 +527,14 @@ int hv_ringbuffer_init(struct hv_ring_buffer_info *ring_info,
void hv_ringbuffer_cleanup(struct hv_ring_buffer_info *ring_info);
-int hv_ringbuffer_write(struct hv_ring_buffer_info *ring_info,
+int hv_ringbuffer_write(struct vmbus_channel *channel,
struct kvec *kv_list,
- u32 kv_count, bool *signal, bool lock,
- enum hv_signal_policy policy);
+ u32 kv_count, bool lock,
+ bool kick_q);
-int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info,
+int hv_ringbuffer_read(struct vmbus_channel *channel,
void *buffer, u32 buflen, u32 *buffer_actual_len,
- u64 *requestid, bool *signal, bool raw);
+ u64 *requestid, bool raw);
void hv_ringbuffer_get_debuginfo(struct hv_ring_buffer_info *ring_info,
struct hv_ring_buffer_debug_info *debug_info);
diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c
index 08043da..308dbda 100644
--- a/drivers/hv/ring_buffer.c
+++ b/drivers/hv/ring_buffer.c
@@ -66,21 +66,25 @@ u32 hv_end_read(struct hv_ring_buffer_info *rbi)
* once the ring buffer is empty, it will clear the
* interrupt_mask and re-check to see if new data has
* arrived.
+ *
+ * KYS: Oct. 30, 2016:
+ * It looks like Windows hosts have logic to deal with DOS attacks that
+ * can be triggered if it receives interrupts when it is not expecting
+ * the interrupt. The host expects interrupts only when the ring
+ * transitions from empty to non-empty (or full to non full on the guest
+ * to host ring).
+ * So, base the signaling decision solely on the ring state until the
+ * host logic is fixed.
*/
-static bool hv_need_to_signal(u32 old_write, struct hv_ring_buffer_info *rbi,
- enum hv_signal_policy policy)
+static void hv_signal_on_write(u32 old_write, struct vmbus_channel *channel,
+ bool kick_q)
{
+ struct hv_ring_buffer_info *rbi = &channel->outbound;
+
virt_mb();
if (READ_ONCE(rbi->ring_buffer->interrupt_mask))
- return false;
-
- /*
- * When the client wants to control signaling,
- * we only honour the host interrupt mask.
- */
- if (policy == HV_SIGNAL_POLICY_EXPLICIT)
- return true;
+ return;
/* check interrupt_mask before read_index */
virt_rmb();
@@ -89,9 +93,9 @@ static bool hv_need_to_signal(u32 old_write, struct hv_ring_buffer_info *rbi,
* ring transitions from being empty to non-empty.
*/
if (old_write == READ_ONCE(rbi->ring_buffer->read_index))
- return true;
+ vmbus_setevent(channel);
- return false;
+ return;
}
/* Get the next write location for the specified ring buffer. */
@@ -280,9 +284,9 @@ void hv_ringbuffer_cleanup(struct hv_ring_buffer_info *ring_info)
}
/* Write to the ring buffer. */
-int hv_ringbuffer_write(struct hv_ring_buffer_info *outring_info,
- struct kvec *kv_list, u32 kv_count, bool *signal, bool lock,
- enum hv_signal_policy policy)
+int hv_ringbuffer_write(struct vmbus_channel *channel,
+ struct kvec *kv_list, u32 kv_count, bool lock,
+ bool kick_q)
{
int i = 0;
u32 bytes_avail_towrite;
@@ -292,6 +296,7 @@ int hv_ringbuffer_write(struct hv_ring_buffer_info *outring_info,
u32 old_write;
u64 prev_indices = 0;
unsigned long flags = 0;
+ struct hv_ring_buffer_info *outring_info = &channel->outbound;
for (i = 0; i < kv_count; i++)
totalbytes_towrite += kv_list[i].iov_len;
@@ -344,13 +349,13 @@ int hv_ringbuffer_write(struct hv_ring_buffer_info *outring_info,
if (lock)
spin_unlock_irqrestore(&outring_info->ring_lock, flags);
- *signal = hv_need_to_signal(old_write, outring_info, policy);
+ hv_signal_on_write(old_write, channel, kick_q);
return 0;
}
-int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info,
+int hv_ringbuffer_read(struct vmbus_channel *channel,
void *buffer, u32 buflen, u32 *buffer_actual_len,
- u64 *requestid, bool *signal, bool raw)
+ u64 *requestid, bool raw)
{
u32 bytes_avail_toread;
u32 next_read_location = 0;
@@ -359,6 +364,7 @@ int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info,
u32 offset;
u32 packetlen;
int ret = 0;
+ struct hv_ring_buffer_info *inring_info = &channel->inbound;
if (buflen <= 0)
return -EINVAL;
@@ -377,6 +383,7 @@ int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info,
return ret;
}
+ init_cached_read_index(channel);
next_read_location = hv_get_next_read_location(inring_info);
next_read_location = hv_copyfrom_ringbuffer(inring_info, &desc,
sizeof(desc),
@@ -416,7 +423,7 @@ int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info,
/* Update the read index */
hv_set_next_read_location(inring_info, next_read_location);
- *signal = hv_need_to_signal_on_read(inring_info);
+ hv_signal_on_read(channel);
return ret;
}
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 2cd7c71..a9cedba 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -120,6 +120,7 @@ static void free_event_data(struct work_struct *work)
cpumask_t *mask;
struct etm_event_data *event_data;
struct coresight_device *sink;
+ struct coresight_device *source;
event_data = container_of(work, struct etm_event_data, work);
mask = &event_data->mask;
@@ -135,8 +136,9 @@ static void free_event_data(struct work_struct *work)
}
for_each_cpu(cpu, mask) {
+ source = coresight_get_source(event_data->path[cpu]);
if (!(IS_ERR_OR_NULL(event_data->path[cpu])))
- coresight_release_path(event_data->path[cpu]);
+ coresight_release_path(source, event_data->path[cpu]);
}
kfree(event_data->path);
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index aa5538c..3af358a 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -1,4 +1,5 @@
-/* Copyright (c) 2011-2012, 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2012, 2016-2017, The Linux Foundation.
+ * All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -134,8 +135,10 @@ static inline bool coresight_authstatus_enabled(void __iomem *addr)
void coresight_disable_path(struct list_head *path);
int coresight_enable_path(struct list_head *path, u32 mode);
struct coresight_device *coresight_get_sink(struct list_head *path);
+struct coresight_device *coresight_get_source(struct list_head *path);
struct list_head *coresight_build_path(struct coresight_device *csdev);
-void coresight_release_path(struct list_head *path);
+void coresight_release_path(struct coresight_device *csdev,
+ struct list_head *path);
#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
extern int etm_readl_cp14(u32 off, unsigned int *val);
diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
index 0a3d15f..0bd8b78 100644
--- a/drivers/hwtracing/coresight/coresight-replicator-qcom.c
+++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -47,6 +47,8 @@ static int replicator_enable(struct coresight_device *csdev, int inport,
{
struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+ pm_runtime_get_sync(drvdata->dev);
+
CS_UNLOCK(drvdata->base);
/*
@@ -83,6 +85,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport,
CS_LOCK(drvdata->base);
+ pm_runtime_put(drvdata->dev);
dev_info(drvdata->dev, "REPLICATOR disabled\n");
}
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index 95d7a90..1ccf3da 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -655,7 +655,7 @@ static void __tpdm_enable(struct tpdm_drvdata *drvdata)
}
static int tpdm_enable(struct coresight_device *csdev,
- struct perf_event_attr *attr, u32 mode)
+ struct perf_event *event, u32 mode)
{
struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
int ret;
@@ -731,7 +731,8 @@ static void __tpdm_disable(struct tpdm_drvdata *drvdata)
TPDM_LOCK(drvdata);
}
-static void tpdm_disable(struct coresight_device *csdev)
+static void tpdm_disable(struct coresight_device *csdev,
+ struct perf_event *event)
{
struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 7bf00a0..3a4474d 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,19 +39,17 @@ struct coresight_node {
struct list_head link;
};
-/*
- * When operating Coresight drivers from the sysFS interface, only a single
- * path can exist from a tracer (associated to a CPU) to a sink.
+/**
+ * struct coresight_path - path from source to sink
+ * @path: Address of path list.
+ * @link: hook to the list.
*/
-static DEFINE_PER_CPU(struct list_head *, tracer_path);
+struct coresight_path {
+ struct list_head *path;
+ struct list_head link;
+};
-/*
- * As of this writing only a single STM can be found in CS topologies. Since
- * there is no way to know if we'll ever see more and what kind of
- * configuration they will enact, for the time being only define a single path
- * for STM.
- */
-static struct list_head *stm_path;
+static LIST_HEAD(cs_active_paths);
static int coresight_id_match(struct device *dev, void *data)
{
@@ -152,6 +150,7 @@ static void coresight_disable_sink(struct coresight_device *csdev)
if (sink_ops(csdev)->disable) {
sink_ops(csdev)->disable(csdev);
csdev->enable = false;
+ csdev->activated = false;
}
}
}
@@ -353,6 +352,20 @@ int coresight_enable_path(struct list_head *path, u32 mode)
goto out;
}
+struct coresight_device *coresight_get_source(struct list_head *path)
+{
+ struct coresight_device *csdev;
+
+ if (!path)
+ return NULL;
+
+ csdev = list_first_entry(path, struct coresight_node, link)->csdev;
+ if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
+ return NULL;
+
+ return csdev;
+}
+
struct coresight_device *coresight_get_sink(struct list_head *path)
{
struct coresight_device *csdev;
@@ -446,14 +459,23 @@ struct list_head *coresight_build_path(struct coresight_device *csdev)
* coresight_release_path - release a previously built path.
* @path: the path to release.
*
+ * Remove coresight path entry from source device
* Go through all the elements of a path and 1) removed it from the list and
* 2) free the memory allocated for each node.
*/
-void coresight_release_path(struct list_head *path)
+void coresight_release_path(struct coresight_device *csdev,
+ struct list_head *path)
{
- struct coresight_device *csdev;
struct coresight_node *nd, *next;
+ if (csdev != NULL && csdev->node != NULL) {
+ /* Remove path entry from source device */
+ list_del(&csdev->node->link);
+ kfree(csdev->node);
+ csdev->node = NULL;
+ }
+
+ /* Free the path */
list_for_each_entry_safe(nd, next, path, link) {
csdev = nd->csdev;
@@ -494,9 +516,25 @@ static int coresight_validate_source(struct coresight_device *csdev,
return 0;
}
+int coresight_store_path(struct coresight_device *csdev, struct list_head *path)
+{
+ struct coresight_path *node;
+
+ node = kzalloc(sizeof(struct coresight_path), GFP_KERNEL);
+ if (!node)
+ return -ENOMEM;
+
+ node->path = path;
+ list_add(&node->link, &cs_active_paths);
+
+ csdev->node = node;
+
+ return 0;
+}
+
int coresight_enable(struct coresight_device *csdev)
{
- int cpu, ret = 0;
+ int ret = 0;
struct list_head *path;
mutex_lock(&coresight_mutex);
@@ -523,25 +561,9 @@ int coresight_enable(struct coresight_device *csdev)
if (ret)
goto err_source;
- switch (csdev->subtype.source_subtype) {
- case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
- /*
- * When working from sysFS it is important to keep track
- * of the paths that were created so that they can be
- * undone in 'coresight_disable()'. Since there can only
- * be a single session per tracer (when working from sysFS)
- * a per-cpu variable will do just fine.
- */
- cpu = source_ops(csdev)->cpu_id(csdev);
- per_cpu(tracer_path, cpu) = path;
- break;
- case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
- stm_path = path;
- break;
- default:
- /* We can't be here */
- break;
- }
+ ret = coresight_store_path(csdev, path);
+ if (ret)
+ goto err_source;
out:
mutex_unlock(&coresight_mutex);
@@ -551,15 +573,14 @@ int coresight_enable(struct coresight_device *csdev)
coresight_disable_path(path);
err_path:
- coresight_release_path(path);
+ coresight_release_path(csdev, path);
goto out;
}
EXPORT_SYMBOL_GPL(coresight_enable);
void coresight_disable(struct coresight_device *csdev)
{
- int cpu, ret;
- struct list_head *path = NULL;
+ int ret;
mutex_lock(&coresight_mutex);
@@ -570,24 +591,12 @@ void coresight_disable(struct coresight_device *csdev)
if (!csdev->enable)
goto out;
- switch (csdev->subtype.source_subtype) {
- case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
- cpu = source_ops(csdev)->cpu_id(csdev);
- path = per_cpu(tracer_path, cpu);
- per_cpu(tracer_path, cpu) = NULL;
- break;
- case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
- path = stm_path;
- stm_path = NULL;
- break;
- default:
- /* We can't be here */
- break;
- }
+ if (csdev->node == NULL)
+ goto out;
coresight_disable_source(csdev);
- coresight_disable_path(path);
- coresight_release_path(path);
+ coresight_disable_path(csdev->node->path);
+ coresight_release_path(csdev, csdev->node->path);
out:
mutex_unlock(&coresight_mutex);
@@ -876,8 +885,42 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
return -EAGAIN;
}
+static ssize_t reset_source_sink_store(struct bus_type *bus,
+ const char *buf, size_t size)
+{
+ int ret = 0;
+ unsigned long val;
+ struct coresight_path *cspath = NULL;
+ struct coresight_path *cspath_next = NULL;
+ struct coresight_device *csdev;
+
+ ret = kstrtoul(buf, 10, &val);
+ if (ret)
+ return ret;
+
+ mutex_lock(&coresight_mutex);
+
+ list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) {
+ csdev = coresight_get_source(cspath->path);
+ if (!csdev)
+ continue;
+ coresight_disable(csdev);
+ }
+
+ mutex_unlock(&coresight_mutex);
+ return size;
+}
+static BUS_ATTR_WO(reset_source_sink);
+
+static struct attribute *coresight_reset_source_sink_attrs[] = {
+ &bus_attr_reset_source_sink.attr,
+ NULL,
+};
+ATTRIBUTE_GROUPS(coresight_reset_source_sink);
+
struct bus_type coresight_bustype = {
- .name = "coresight",
+ .name = "coresight",
+ .bus_groups = coresight_reset_source_sink_groups,
};
static int __init coresight_init(void)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index d252276..a9cf687 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -790,6 +790,16 @@
This driver can also be built as a module. If so, the module
will be called i2c-qup.
+config I2C_QCOM_GENI
+ tristate "Qualcomm Technologies Inc.'s GENI based I2C controller"
+ depends on ARCH_QCOM
+ help
+ If you say yes to this option, support will be included for the
+ built-in I2C interface on the Qualcomm Technologies Inc.'s SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-qcom-geni.
+
config I2C_RIIC
tristate "Renesas RIIC adapter"
depends on ARCH_RENESAS || COMPILE_TEST
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 29764cc..7f2523f 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -76,6 +76,7 @@
obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
obj-$(CONFIG_I2C_QUP) += i2c-qup.o
+obj-$(CONFIG_I2C_QCOM_GENI) += i2c-qcom-geni.o
obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o
obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index b403fa5..809f4d4 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -475,30 +475,28 @@ static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev)
static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
{
struct i2c_msg *msgs = dev->msgs;
- u32 ic_tar = 0;
+ u32 ic_con, ic_tar = 0;
/* Disable the adapter */
__i2c_dw_enable_and_wait(dev, false);
/* if the slave address is ten bit address, enable 10BITADDR */
- if (dev->dynamic_tar_update_enabled) {
+ ic_con = dw_readl(dev, DW_IC_CON);
+ if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) {
+ ic_con |= DW_IC_CON_10BITADDR_MASTER;
/*
* If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing
- * mode has to be enabled via bit 12 of IC_TAR register,
- * otherwise bit 4 of IC_CON is used.
+ * mode has to be enabled via bit 12 of IC_TAR register.
+ * We set it always as I2C_DYNAMIC_TAR_UPDATE can't be
+ * detected from registers.
*/
- if (msgs[dev->msg_write_idx].flags & I2C_M_TEN)
- ic_tar = DW_IC_TAR_10BITADDR_MASTER;
+ ic_tar = DW_IC_TAR_10BITADDR_MASTER;
} else {
- u32 ic_con = dw_readl(dev, DW_IC_CON);
-
- if (msgs[dev->msg_write_idx].flags & I2C_M_TEN)
- ic_con |= DW_IC_CON_10BITADDR_MASTER;
- else
- ic_con &= ~DW_IC_CON_10BITADDR_MASTER;
- dw_writel(dev, ic_con, DW_IC_CON);
+ ic_con &= ~DW_IC_CON_10BITADDR_MASTER;
}
+ dw_writel(dev, ic_con, DW_IC_CON);
+
/*
* Set the slave (target) address and enable 10-bit addressing mode
* if applicable.
@@ -923,7 +921,6 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
{
struct i2c_adapter *adap = &dev->adapter;
int r;
- u32 reg;
init_completion(&dev->cmd_complete);
@@ -931,26 +928,6 @@ int i2c_dw_probe(struct dw_i2c_dev *dev)
if (r)
return r;
- r = i2c_dw_acquire_lock(dev);
- if (r)
- return r;
-
- /*
- * Test if dynamic TAR update is enabled in this controller by writing
- * to IC_10BITADDR_MASTER field in IC_CON: when it is enabled this
- * field is read-only so it should not succeed
- */
- reg = dw_readl(dev, DW_IC_CON);
- dw_writel(dev, reg ^ DW_IC_CON_10BITADDR_MASTER, DW_IC_CON);
-
- if ((dw_readl(dev, DW_IC_CON) & DW_IC_CON_10BITADDR_MASTER) ==
- (reg & DW_IC_CON_10BITADDR_MASTER)) {
- dev->dynamic_tar_update_enabled = true;
- dev_dbg(dev->dev, "Dynamic TAR update enabled");
- }
-
- i2c_dw_release_lock(dev);
-
snprintf(adap->name, sizeof(adap->name),
"Synopsys DesignWare I2C adapter");
adap->retries = 3;
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 0d44d2a..22bfbe1 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -117,7 +117,6 @@ struct dw_i2c_dev {
int (*acquire_lock)(struct dw_i2c_dev *dev);
void (*release_lock)(struct dw_i2c_dev *dev);
bool pm_runtime_disabled;
- bool dynamic_tar_update_enabled;
};
#define ACCESS_SWAP 0x00000001
diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
new file mode 100644
index 0000000..8e38a24
--- /dev/null
+++ b/drivers/i2c/busses/i2c-qcom-geni.c
@@ -0,0 +1,321 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/qcom-geni-se.h>
+
+#define SE_I2C_TX_TRANS_LEN (0x26C)
+#define SE_I2C_RX_TRANS_LEN (0x270)
+#define SE_I2C_SCL_COUNTERS (0x278)
+
+#define SE_I2C_ERR (M_CMD_OVERRUN_EN | M_ILLEGAL_CMD_EN | M_CMD_FAILURE_EN |\
+ M_GP_IRQ_1_EN | M_GP_IRQ_3_EN | M_GP_IRQ_4_EN)
+#define SE_I2C_ABORT (1U << 1)
+/* M_CMD OP codes for I2C */
+#define I2C_WRITE (0x1)
+#define I2C_READ (0x2)
+#define I2C_WRITE_READ (0x3)
+#define I2C_ADDR_ONLY (0x4)
+#define I2C_BUS_CLEAR (0x6)
+#define I2C_STOP_ON_BUS (0x7)
+/* M_CMD params for I2C */
+#define PRE_CMD_DELAY (BIT(0))
+#define TIMESTAMP_BEFORE (BIT(1))
+#define STOP_STRETCH (BIT(2))
+#define TIMESTAMP_AFTER (BIT(3))
+#define POST_COMMAND_DELAY (BIT(4))
+#define IGNORE_ADD_NACK (BIT(6))
+#define READ_FINISHED_WITH_ACK (BIT(7))
+#define BYPASS_ADDR_PHASE (BIT(8))
+#define SLV_ADDR_MSK (GENMASK(15, 9))
+#define SLV_ADDR_SHFT (9)
+
+struct geni_i2c_dev {
+ struct device *dev;
+ void __iomem *base;
+ int irq;
+ int err;
+ struct i2c_adapter adap;
+ struct completion xfer;
+ struct i2c_msg *cur;
+ int cur_wr;
+ int cur_rd;
+};
+
+static inline void qcom_geni_i2c_conf(void __iomem *base, int dfs, int div)
+{
+ geni_write_reg(dfs, base, SE_GENI_CLK_SEL);
+ geni_write_reg((div << 4) | 1, base, GENI_SER_M_CLK_CFG);
+ geni_write_reg(((5 << 20) | (0xC << 10) | 0x18),
+ base, SE_I2C_SCL_COUNTERS);
+ /*
+ * Ensure Clk config completes before return.
+ */
+ mb();
+}
+
+static irqreturn_t geni_i2c_irq(int irq, void *dev)
+{
+ struct geni_i2c_dev *gi2c = dev;
+ int i, j;
+ u32 m_stat = readl_relaxed(gi2c->base + SE_GENI_M_IRQ_STATUS);
+ u32 tx_stat = readl_relaxed(gi2c->base + SE_GENI_TX_FIFO_STATUS);
+ u32 rx_stat = readl_relaxed(gi2c->base + SE_GENI_RX_FIFO_STATUS);
+ struct i2c_msg *cur = gi2c->cur;
+
+ dev_dbg(gi2c->dev,
+ "got i2c irq:%d, stat:0x%x, tx stat:0x%x, rx stat:0x%x\n",
+ irq, m_stat, tx_stat, rx_stat);
+ if (!cur || m_stat & SE_I2C_ERR) {
+ dev_err(gi2c->dev, "i2c txn err");
+ writel_relaxed(0, (gi2c->base + SE_GENI_TX_WATERMARK_REG));
+ gi2c->err = -EIO;
+ goto irqret;
+ }
+ if (((m_stat & M_RX_FIFO_WATERMARK_EN) ||
+ (m_stat & M_RX_FIFO_LAST_EN)) && (cur->flags & I2C_M_RD)) {
+ u32 rxcnt = rx_stat & RX_FIFO_WC_MSK;
+
+ for (j = 0; j < rxcnt; j++) {
+ u32 temp;
+ int p;
+
+ temp = readl_relaxed(gi2c->base + SE_GENI_RX_FIFOn);
+ for (i = gi2c->cur_rd, p = 0; (i < cur->len && p < 4);
+ i++, p++)
+ cur->buf[i] = (u8) ((temp >> (p * 8)) & 0xff);
+ gi2c->cur_rd = i;
+ if (gi2c->cur_rd == cur->len) {
+ dev_dbg(gi2c->dev, "i:%d,read 0x%x\n", i, temp);
+ break;
+ }
+ dev_dbg(gi2c->dev, "i: %d, read 0x%x\n", i, temp);
+ }
+ } else if ((m_stat & M_TX_FIFO_WATERMARK_EN) &&
+ !(cur->flags & I2C_M_RD)) {
+ for (j = 0; j < 0x1f; j++) {
+ u32 temp = 0;
+ int p;
+
+ for (i = gi2c->cur_wr, p = 0; (i < cur->len && p < 4);
+ i++, p++)
+ temp |= (((u32)(cur->buf[i]) << (p * 8)));
+ writel_relaxed(temp, gi2c->base + SE_GENI_TX_FIFOn);
+ gi2c->cur_wr = i;
+ dev_dbg(gi2c->dev, "i:%d,wrote 0x%x\n", i, temp);
+ if (gi2c->cur_wr == cur->len) {
+ dev_dbg(gi2c->dev, "i2c bytes done writing\n");
+ writel_relaxed(0,
+ (gi2c->base + SE_GENI_TX_WATERMARK_REG));
+ break;
+ }
+ }
+ }
+irqret:
+ writel_relaxed(m_stat, gi2c->base + SE_GENI_M_IRQ_CLEAR);
+ /* Ensure all writes are done before returning from ISR. */
+ wmb();
+ /* if this is err with done-bit not set, handle that thr' timeout. */
+ if (m_stat & M_CMD_DONE_EN) {
+ dev_dbg(gi2c->dev, "i2c irq: err:%d, stat:0x%x\n",
+ gi2c->err, m_stat);
+ complete(&gi2c->xfer);
+ }
+ return IRQ_HANDLED;
+}
+
+static int geni_i2c_xfer(struct i2c_adapter *adap,
+ struct i2c_msg msgs[],
+ int num)
+{
+ struct geni_i2c_dev *gi2c = i2c_get_adapdata(adap);
+ int i, ret = 0, timeout = 0;
+
+ gi2c->err = 0;
+ gi2c->cur = &msgs[0];
+ reinit_completion(&gi2c->xfer);
+ enable_irq(gi2c->irq);
+ qcom_geni_i2c_conf(gi2c->base, 0, 2);
+ se_config_packing(gi2c->base, 8, 4, true);
+ dev_dbg(gi2c->dev, "i2c xfer:num:%d, msgs:len:%d,flg:%d\n",
+ num, msgs[0].len, msgs[0].flags);
+ for (i = 0; i < num; i++) {
+ int stretch = (i < (num - 1));
+ u32 m_param = 0;
+ u32 m_cmd = 0;
+
+ m_param |= (stretch ? STOP_STRETCH : ~(STOP_STRETCH));
+ m_param |= ((msgs[i].addr & 0x7F) << SLV_ADDR_SHFT);
+
+ gi2c->cur = &msgs[i];
+ if (msgs[i].flags & I2C_M_RD) {
+ dev_dbg(gi2c->dev,
+ "READ,n:%d,i:%d len:%d, stretch:%d\n",
+ num, i, msgs[i].len, stretch);
+ geni_write_reg(msgs[i].len,
+ gi2c->base, SE_I2C_RX_TRANS_LEN);
+ m_cmd = I2C_READ;
+ geni_setup_m_cmd(gi2c->base, m_cmd, m_param);
+ } else {
+ dev_dbg(gi2c->dev,
+ "WRITE:n:%d,i%d len:%d, stretch:%d\n",
+ num, i, msgs[i].len, stretch);
+ geni_write_reg(msgs[i].len, gi2c->base,
+ SE_I2C_TX_TRANS_LEN);
+ m_cmd = I2C_WRITE;
+ geni_setup_m_cmd(gi2c->base, m_cmd, m_param);
+ /* Get FIFO IRQ */
+ geni_write_reg(1, gi2c->base, SE_GENI_TX_WATERMARK_REG);
+ }
+ /* Ensure FIFO write go through before waiting for Done evet */
+ mb();
+ timeout = wait_for_completion_timeout(&gi2c->xfer, HZ);
+ if (!timeout) {
+ dev_err(gi2c->dev, "Timed out\n");
+ gi2c->err = -ETIMEDOUT;
+ gi2c->cur = NULL;
+ geni_abort_m_cmd(gi2c->base);
+ timeout = wait_for_completion_timeout(&gi2c->xfer, HZ);
+ }
+ gi2c->cur_wr = 0;
+ gi2c->cur_rd = 0;
+ if (gi2c->err) {
+ dev_err(gi2c->dev, "i2c error :%d\n", gi2c->err);
+ ret = gi2c->err;
+ break;
+ }
+ }
+ if (ret == 0)
+ ret = i;
+ disable_irq(gi2c->irq);
+ gi2c->cur = NULL;
+ gi2c->err = 0;
+ dev_dbg(gi2c->dev, "i2c txn ret:%d\n", ret);
+ return ret;
+}
+
+static u32 geni_i2c_func(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
+}
+
+static const struct i2c_algorithm geni_i2c_algo = {
+ .master_xfer = geni_i2c_xfer,
+ .functionality = geni_i2c_func,
+};
+
+static int geni_i2c_probe(struct platform_device *pdev)
+{
+ struct geni_i2c_dev *gi2c;
+ struct resource *res;
+ int ret;
+
+ gi2c = devm_kzalloc(&pdev->dev, sizeof(*gi2c), GFP_KERNEL);
+ if (!gi2c)
+ return -ENOMEM;
+
+ gi2c->dev = &pdev->dev;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -EINVAL;
+
+ gi2c->base = devm_ioremap_resource(gi2c->dev, res);
+ if (IS_ERR(gi2c->base))
+ return PTR_ERR(gi2c->base);
+
+ gi2c->irq = platform_get_irq(pdev, 0);
+ if (gi2c->irq < 0) {
+ dev_err(gi2c->dev, "IRQ error for i2c-geni\n");
+ return gi2c->irq;
+ }
+
+ gi2c->adap.algo = &geni_i2c_algo;
+ init_completion(&gi2c->xfer);
+ platform_set_drvdata(pdev, gi2c);
+ ret = devm_request_irq(gi2c->dev, gi2c->irq, geni_i2c_irq,
+ IRQF_TRIGGER_HIGH, "i2c_geni", gi2c);
+ if (ret) {
+ dev_err(gi2c->dev, "Request_irq failed:%d: err:%d\n",
+ gi2c->irq, ret);
+ return ret;
+ }
+ disable_irq(gi2c->irq);
+ i2c_set_adapdata(&gi2c->adap, gi2c);
+ gi2c->adap.dev.parent = gi2c->dev;
+ gi2c->adap.dev.of_node = pdev->dev.of_node;
+
+ strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
+
+ i2c_add_adapter(&gi2c->adap);
+ geni_se_init(gi2c->base, FIFO_MODE, 0xF, 0x10);
+
+ return 0;
+}
+
+static int geni_i2c_remove(struct platform_device *pdev)
+{
+ struct geni_i2c_dev *gi2c = platform_get_drvdata(pdev);
+
+ disable_irq(gi2c->irq);
+ i2c_del_adapter(&gi2c->adap);
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int geni_i2c_suspend(struct device *device)
+{
+ return 0;
+}
+
+static int geni_i2c_resume(struct device *device)
+{
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops geni_i2c_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(
+ geni_i2c_suspend,
+ geni_i2c_resume)
+};
+
+static const struct of_device_id geni_i2c_dt_match[] = {
+ { .compatible = "qcom,i2c-geni" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, geni_i2c_dt_match);
+
+static struct platform_driver geni_i2c_driver = {
+ .probe = geni_i2c_probe,
+ .remove = geni_i2c_remove,
+ .driver = {
+ .name = "i2c_geni",
+ .pm = &geni_i2c_pm_ops,
+ .of_match_table = geni_i2c_dt_match,
+ },
+};
+
+module_platform_driver(geni_i2c_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:i2c_geni");
diff --git a/drivers/infiniband/sw/rxe/rxe_mr.c b/drivers/infiniband/sw/rxe/rxe_mr.c
index 1869152..9b732c5 100644
--- a/drivers/infiniband/sw/rxe/rxe_mr.c
+++ b/drivers/infiniband/sw/rxe/rxe_mr.c
@@ -59,9 +59,11 @@ int mem_check_range(struct rxe_mem *mem, u64 iova, size_t length)
case RXE_MEM_TYPE_MR:
case RXE_MEM_TYPE_FMR:
- return ((iova < mem->iova) ||
- ((iova + length) > (mem->iova + mem->length))) ?
- -EFAULT : 0;
+ if (iova < mem->iova ||
+ length > mem->length ||
+ iova > mem->iova + mem->length - length)
+ return -EFAULT;
+ return 0;
default:
return -EFAULT;
diff --git a/drivers/infiniband/sw/rxe/rxe_resp.c b/drivers/infiniband/sw/rxe/rxe_resp.c
index dd3d88a..ccf6247 100644
--- a/drivers/infiniband/sw/rxe/rxe_resp.c
+++ b/drivers/infiniband/sw/rxe/rxe_resp.c
@@ -472,7 +472,7 @@ static enum resp_states check_rkey(struct rxe_qp *qp,
goto err2;
}
- resid = mtu;
+ qp->resp.resid = mtu;
} else {
if (pktlen != resid) {
state = RESPST_ERR_LENGTH;
diff --git a/drivers/input/misc/uinput.c b/drivers/input/misc/uinput.c
index 92595b9..022be0e 100644
--- a/drivers/input/misc/uinput.c
+++ b/drivers/input/misc/uinput.c
@@ -263,13 +263,21 @@ static int uinput_create_device(struct uinput_device *udev)
return -EINVAL;
}
- if (test_bit(ABS_MT_SLOT, dev->absbit)) {
- nslot = input_abs_get_max(dev, ABS_MT_SLOT) + 1;
- error = input_mt_init_slots(dev, nslot, 0);
- if (error)
+ if (test_bit(EV_ABS, dev->evbit)) {
+ input_alloc_absinfo(dev);
+ if (!dev->absinfo) {
+ error = -EINVAL;
goto fail1;
- } else if (test_bit(ABS_MT_POSITION_X, dev->absbit)) {
- input_set_events_per_packet(dev, 60);
+ }
+
+ if (test_bit(ABS_MT_SLOT, dev->absbit)) {
+ nslot = input_abs_get_max(dev, ABS_MT_SLOT) + 1;
+ error = input_mt_init_slots(dev, nslot, 0);
+ if (error)
+ goto fail1;
+ } else if (test_bit(ABS_MT_POSITION_X, dev->absbit)) {
+ input_set_events_per_packet(dev, 60);
+ }
}
if (test_bit(EV_FF, dev->evbit) && !udev->ff_effects_max) {
diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index d15b338..ed1935f 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -1232,6 +1232,7 @@ static const struct acpi_device_id elan_acpi_id[] = {
{ "ELAN0000", 0 },
{ "ELAN0100", 0 },
{ "ELAN0600", 0 },
+ { "ELAN0605", 0 },
{ "ELAN1000", 0 },
{ }
};
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 4d6ee1b..c704c47 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -635,7 +635,7 @@ static int arm_smmu_register_legacy_master(struct device *dev,
__be32 pci_sid;
int err = 0;
- memset(&it, sizeof(it), 0);
+ memset(&it, 0, sizeof(it));
np = dev_get_dev_node(dev);
if (!np || !of_find_property(np, "#stream-id-cells", NULL)) {
of_node_put(np);
diff --git a/drivers/md/bcache/bcache.h b/drivers/md/bcache/bcache.h
index 6b420a5..c3ea03c 100644
--- a/drivers/md/bcache/bcache.h
+++ b/drivers/md/bcache/bcache.h
@@ -425,7 +425,7 @@ struct cache {
* until a gc finishes - otherwise we could pointlessly burn a ton of
* cpu
*/
- unsigned invalidate_needs_gc:1;
+ unsigned invalidate_needs_gc;
bool discard; /* Get rid of? */
@@ -593,8 +593,8 @@ struct cache_set {
/* Counts how many sectors bio_insert has added to the cache */
atomic_t sectors_to_gc;
+ wait_queue_head_t gc_wait;
- wait_queue_head_t moving_gc_wait;
struct keybuf moving_gc_keys;
/* Number of moving GC bios in flight */
struct semaphore moving_in_flight;
diff --git a/drivers/md/bcache/btree.c b/drivers/md/bcache/btree.c
index 81d3db4..2efdce0 100644
--- a/drivers/md/bcache/btree.c
+++ b/drivers/md/bcache/btree.c
@@ -1757,32 +1757,34 @@ static void bch_btree_gc(struct cache_set *c)
bch_moving_gc(c);
}
-static int bch_gc_thread(void *arg)
+static bool gc_should_run(struct cache_set *c)
{
- struct cache_set *c = arg;
struct cache *ca;
unsigned i;
- while (1) {
-again:
- bch_btree_gc(c);
+ for_each_cache(ca, c, i)
+ if (ca->invalidate_needs_gc)
+ return true;
- set_current_state(TASK_INTERRUPTIBLE);
+ if (atomic_read(&c->sectors_to_gc) < 0)
+ return true;
+
+ return false;
+}
+
+static int bch_gc_thread(void *arg)
+{
+ struct cache_set *c = arg;
+
+ while (1) {
+ wait_event_interruptible(c->gc_wait,
+ kthread_should_stop() || gc_should_run(c));
+
if (kthread_should_stop())
break;
- mutex_lock(&c->bucket_lock);
-
- for_each_cache(ca, c, i)
- if (ca->invalidate_needs_gc) {
- mutex_unlock(&c->bucket_lock);
- set_current_state(TASK_RUNNING);
- goto again;
- }
-
- mutex_unlock(&c->bucket_lock);
-
- schedule();
+ set_gc_sectors(c);
+ bch_btree_gc(c);
}
return 0;
@@ -1790,11 +1792,10 @@ static int bch_gc_thread(void *arg)
int bch_gc_thread_start(struct cache_set *c)
{
- c->gc_thread = kthread_create(bch_gc_thread, c, "bcache_gc");
+ c->gc_thread = kthread_run(bch_gc_thread, c, "bcache_gc");
if (IS_ERR(c->gc_thread))
return PTR_ERR(c->gc_thread);
- set_task_state(c->gc_thread, TASK_INTERRUPTIBLE);
return 0;
}
diff --git a/drivers/md/bcache/btree.h b/drivers/md/bcache/btree.h
index 5c391fa..9b80417 100644
--- a/drivers/md/bcache/btree.h
+++ b/drivers/md/bcache/btree.h
@@ -260,8 +260,7 @@ void bch_initial_mark_key(struct cache_set *, int, struct bkey *);
static inline void wake_up_gc(struct cache_set *c)
{
- if (c->gc_thread)
- wake_up_process(c->gc_thread);
+ wake_up(&c->gc_wait);
}
#define MAP_DONE 0
diff --git a/drivers/md/bcache/request.c b/drivers/md/bcache/request.c
index 40ffe5e..a37c177 100644
--- a/drivers/md/bcache/request.c
+++ b/drivers/md/bcache/request.c
@@ -196,10 +196,8 @@ static void bch_data_insert_start(struct closure *cl)
struct data_insert_op *op = container_of(cl, struct data_insert_op, cl);
struct bio *bio = op->bio, *n;
- if (atomic_sub_return(bio_sectors(bio), &op->c->sectors_to_gc) < 0) {
- set_gc_sectors(op->c);
+ if (atomic_sub_return(bio_sectors(bio), &op->c->sectors_to_gc) < 0)
wake_up_gc(op->c);
- }
if (op->bypass)
return bch_data_invalidate(cl);
diff --git a/drivers/md/bcache/super.c b/drivers/md/bcache/super.c
index 849ad44..66669c8 100644
--- a/drivers/md/bcache/super.c
+++ b/drivers/md/bcache/super.c
@@ -1491,6 +1491,7 @@ struct cache_set *bch_cache_set_alloc(struct cache_sb *sb)
mutex_init(&c->bucket_lock);
init_waitqueue_head(&c->btree_cache_wait);
init_waitqueue_head(&c->bucket_wait);
+ init_waitqueue_head(&c->gc_wait);
sema_init(&c->uuid_write_mutex, 1);
spin_lock_init(&c->btree_gc_time.lock);
@@ -1550,6 +1551,7 @@ static void run_cache_set(struct cache_set *c)
for_each_cache(ca, c, i)
c->nbuckets += ca->sb.nbuckets;
+ set_gc_sectors(c);
if (CACHE_SYNC(&c->sb)) {
LIST_HEAD(journal);
diff --git a/drivers/md/dm-rq.c b/drivers/md/dm-rq.c
index 31a89c8..2c96542 100644
--- a/drivers/md/dm-rq.c
+++ b/drivers/md/dm-rq.c
@@ -804,6 +804,10 @@ static void dm_old_request_fn(struct request_queue *q)
int srcu_idx;
struct dm_table *map = dm_get_live_table(md, &srcu_idx);
+ if (unlikely(!map)) {
+ dm_put_live_table(md, srcu_idx);
+ return;
+ }
ti = dm_table_find_target(map, pos);
dm_put_live_table(md, srcu_idx);
}
diff --git a/drivers/media/platform/msm/vidc/msm_vdec.c b/drivers/media/platform/msm/vidc/msm_vdec.c
index bf0148c..68848a8 100644
--- a/drivers/media/platform/msm/vidc/msm_vdec.c
+++ b/drivers/media/platform/msm/vidc/msm_vdec.c
@@ -504,6 +504,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "Mpeg2",
@@ -512,6 +513,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "H263",
@@ -520,6 +522,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "VC1",
@@ -528,6 +531,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "VC1 SP",
@@ -536,6 +540,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "H264",
@@ -544,6 +549,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "H264_MVC",
@@ -552,6 +558,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "HEVC",
@@ -560,6 +567,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "VP8",
@@ -568,6 +576,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed,
.type = OUTPUT_PORT,
+ .defer_outputs = false,
},
{
.name = "VP9",
@@ -576,6 +585,7 @@ struct msm_vidc_format vdec_formats[] = {
.num_planes = 1,
.get_frame_size = get_frame_size_compressed_full_yuv,
.type = OUTPUT_PORT,
+ .defer_outputs = true,
},
};
@@ -1767,7 +1777,7 @@ int msm_vdec_s_ext_ctrl(struct msm_vidc_inst *inst,
case V4L2_MPEG_VIDC_VIDEO_DPB_COLOR_FMT_NONE:
if (!msm_comm_g_ctrl_for_id(inst, control.id)) {
rc = msm_comm_release_output_buffers(
- inst);
+ inst, false);
if (rc)
dprintk(VIDC_ERR,
"%s Release output buffers failed\n",
diff --git a/drivers/media/platform/msm/vidc/msm_vidc.c b/drivers/media/platform/msm/vidc/msm_vidc.c
index 5d206d3..4a1fd76 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc.c
@@ -1388,7 +1388,13 @@ static void cleanup_instance(struct msm_vidc_inst *inst)
"Failed to release persist buffers\n");
}
- if (msm_comm_release_output_buffers(inst)) {
+ /*
+ * At this point all buffes should be with driver
+ * irrespective of scenario
+ */
+ msm_comm_validate_output_buffers(inst);
+
+ if (msm_comm_release_output_buffers(inst, true)) {
dprintk(VIDC_ERR,
"Failed to release output buffers\n");
}
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.c b/drivers/media/platform/msm/vidc/msm_vidc_common.c
index 564ab99..00feba6 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.c
@@ -1414,7 +1414,7 @@ static void handle_release_res_done(enum hal_command_response cmd, void *data)
put_inst(inst);
}
-void validate_output_buffers(struct msm_vidc_inst *inst)
+void msm_comm_validate_output_buffers(struct msm_vidc_inst *inst)
{
struct internal_buf *binfo;
u32 buffers_owned_by_driver = 0;
@@ -1440,11 +1440,13 @@ void validate_output_buffers(struct msm_vidc_inst *inst)
}
mutex_unlock(&inst->outputbufs.lock);
- if (buffers_owned_by_driver != output_buf->buffer_count_actual)
+ if (buffers_owned_by_driver != output_buf->buffer_count_actual) {
dprintk(VIDC_WARN,
"OUTPUT Buffer count mismatch %d of %d\n",
buffers_owned_by_driver,
output_buf->buffer_count_actual);
+ msm_vidc_handle_hw_error(inst->core);
+ }
}
int msm_comm_queue_output_buffers(struct msm_vidc_inst *inst)
@@ -1524,7 +1526,11 @@ static void handle_session_flush(enum hal_command_response cmd, void *data)
if (msm_comm_get_stream_output_mode(inst) ==
HAL_VIDEO_DECODER_SECONDARY) {
- validate_output_buffers(inst);
+
+ if (!(inst->fmts[OUTPUT_PORT].defer_outputs &&
+ inst->in_reconfig))
+ msm_comm_validate_output_buffers(inst);
+
if (!inst->in_reconfig) {
rc = msm_comm_queue_output_buffers(inst);
if (rc) {
@@ -4051,7 +4057,8 @@ int msm_comm_try_get_prop(struct msm_vidc_inst *inst, enum hal_property ptype,
return rc;
}
-int msm_comm_release_output_buffers(struct msm_vidc_inst *inst)
+int msm_comm_release_output_buffers(struct msm_vidc_inst *inst,
+ bool force_release)
{
struct msm_smem *handle;
struct internal_buf *buf, *dummy;
@@ -4093,6 +4100,11 @@ int msm_comm_release_output_buffers(struct msm_vidc_inst *inst)
goto exit;
}
+ if ((buf->buffer_ownership == FIRMWARE) && !force_release) {
+ dprintk(VIDC_INFO, "DPB is with f/w. Can't free it\n");
+ continue;
+ }
+
buffer_info.buffer_size = handle->size;
buffer_info.buffer_type = buf->buffer_type;
buffer_info.num_buffers = 1;
@@ -4352,13 +4364,17 @@ int msm_comm_try_set_prop(struct msm_vidc_inst *inst,
int msm_comm_set_output_buffers(struct msm_vidc_inst *inst)
{
int rc = 0;
+ bool force_release = true;
if (!inst || !inst->core || !inst->core->device) {
dprintk(VIDC_ERR, "%s invalid parameters\n", __func__);
return -EINVAL;
}
- if (msm_comm_release_output_buffers(inst))
+ if (inst->fmts[OUTPUT_PORT].defer_outputs)
+ force_release = false;
+
+ if (msm_comm_release_output_buffers(inst, force_release))
dprintk(VIDC_WARN, "Failed to release output buffers\n");
rc = set_output_buffers(inst, HAL_BUFFER_OUTPUT);
@@ -4366,7 +4382,7 @@ int msm_comm_set_output_buffers(struct msm_vidc_inst *inst)
goto error;
return rc;
error:
- msm_comm_release_output_buffers(inst);
+ msm_comm_release_output_buffers(inst, true);
return rc;
}
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.h b/drivers/media/platform/msm/vidc/msm_vidc_common.h
index c042fe9..7f2ab04 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.h
@@ -55,7 +55,9 @@ int msm_comm_flush(struct msm_vidc_inst *inst, u32 flags);
int msm_comm_release_scratch_buffers(struct msm_vidc_inst *inst,
bool check_for_reuse);
int msm_comm_release_persist_buffers(struct msm_vidc_inst *inst);
-int msm_comm_release_output_buffers(struct msm_vidc_inst *inst);
+int msm_comm_release_output_buffers(struct msm_vidc_inst *inst,
+ bool force_release);
+void msm_comm_validate_output_buffers(struct msm_vidc_inst *inst);
int msm_comm_force_cleanup(struct msm_vidc_inst *inst);
int msm_comm_suspend(int core_id);
enum hal_extradata_id msm_comm_get_hal_extradata_index(
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_debug.h b/drivers/media/platform/msm/vidc/msm_vidc_debug.h
index 0af0220..cf5ce22 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_debug.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_debug.h
@@ -117,7 +117,7 @@ extern bool msm_vidc_debug_timeout;
#define MSM_VIDC_ERROR(value) \
do { \
- dprintk(VIDC_WARN, "Fatal Level = %d\n", value);\
+ dprintk(VIDC_DBG, "Fatal Level = %d\n", value);\
BUG_ON(value); \
} while (0)
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_internal.h b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
index b4f3cd7..fb90fdf7 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_internal.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
@@ -148,6 +148,7 @@ struct msm_vidc_format {
int num_planes;
int type;
u32 (*get_frame_size)(int plane, u32 height, u32 width);
+ bool defer_outputs;
};
struct msm_vidc_drv {
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi.h b/drivers/media/platform/msm/vidc/vidc_hfi.h
index 949bc47..3267999 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi.h
@@ -62,6 +62,7 @@
#define HFI_BUFFER_EXTRADATA_OUTPUT2 (HFI_OX_BASE + 0x4)
#define HFI_BUFFER_INTERNAL_SCRATCH_1 (HFI_OX_BASE + 0x5)
#define HFI_BUFFER_INTERNAL_SCRATCH_2 (HFI_OX_BASE + 0x6)
+#define HFI_BUFFER_INTERNAL_RECON (HFI_OX_BASE + 0x9)
#define HFI_BUFFER_MODE_DYNAMIC (HFI_OX_BASE + 0x3)
@@ -84,6 +85,7 @@
#define HFI_EXTRADATA_FRAME_QP 0x0000000F
#define HFI_EXTRADATA_FRAME_BITS_INFO 0x00000010
#define HFI_EXTRADATA_VPX_COLORSPACE 0x00000014
+#define HFI_EXTRADATA_UBWC_CR_STAT_INFO 0x00000019
#define HFI_EXTRADATA_MULTISLICE_INFO 0x7F100000
#define HFI_EXTRADATA_NUM_CONCEALED_MB 0x7F100001
#define HFI_EXTRADATA_INDEX 0x7F100002
@@ -119,6 +121,7 @@ struct hfi_extradata_header {
#define HFI_INTERLACE_INTERLEAVE_FRAME_BOTTOMFIELDFIRST 0x04
#define HFI_INTERLACE_FRAME_TOPFIELDFIRST 0x08
#define HFI_INTERLACE_FRAME_BOTTOMFIELDFIRST 0x10
+#define HFI_INTERLACE_FRAME_MBAFF 0x20
#define HFI_PROPERTY_SYS_OX_START \
(HFI_DOMAIN_BASE_COMMON + HFI_ARCH_OX_OFFSET + 0x0000)
@@ -135,9 +138,7 @@ struct hfi_extradata_header {
(HFI_PROPERTY_PARAM_OX_START + 0x006)
#define HFI_PROPERTY_PARAM_S3D_FRAME_PACKING_EXTRADATA \
(HFI_PROPERTY_PARAM_OX_START + 0x009)
-#define HFI_PROPERTY_PARAM_ERR_DETECTION_CODE_EXTRADATA \
- (HFI_PROPERTY_PARAM_OX_START + 0x00A)
-#define HFI_PROPERTY_PARAM_BUFFER_SIZE_MINIMUM \
+#define HFI_PROPERTY_PARAM_BUFFER_SIZE_MINIMUM \
(HFI_PROPERTY_PARAM_OX_START + 0x00C)
#define HFI_PROPERTY_PARAM_SYNC_BASED_INTERRUPT \
(HFI_PROPERTY_PARAM_OX_START + 0x00E)
@@ -591,6 +592,21 @@ struct hfi_msg_session_flush_done_packet {
u32 flush_type;
};
+struct hfi_ubwc_cr_stats_info_type {
+ u32 cr_stats_info0;
+ u32 cr_stats_info1;
+ u32 cr_stats_info2;
+ u32 cr_stats_info3;
+ u32 cr_stats_info4;
+ u32 cr_stats_info5;
+ u32 cr_stats_info6;
+};
+
+struct hfi_frame_cr_stats_type {
+ u32 frame_index;
+ struct hfi_ubwc_cr_stats_info_type ubwc_stats_info;
+};
+
struct hfi_msg_session_empty_buffer_done_packet {
u32 size;
u32 packet_type;
@@ -601,6 +617,8 @@ struct hfi_msg_session_empty_buffer_done_packet {
u32 input_tag;
u32 packet_buffer;
u32 extra_data_buffer;
+ u32 flags;
+ struct hfi_frame_cr_stats_type ubwc_cr_stats;
u32 rgData[0];
};
@@ -761,6 +779,11 @@ struct hfi_extradata_interlace_video_payload {
u32 format;
};
+struct hfi_conceal_color_type {
+ u32 value_8bit;
+ u32 value_10bit;
+};
+
struct hfi_extradata_num_concealed_mb_payload {
u32 num_mb_concealed;
};
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
index 6863d5e..e9a5bb3 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
@@ -83,6 +83,7 @@
#define HFI_VIDEO_CODEC_VP9 0x00004000
#define HFI_VIDEO_CODEC_HEVC_HYBRID 0x80000000
+#define HFI_PROFILE_UNKNOWN 0x00000000
#define HFI_H264_PROFILE_BASELINE 0x00000001
#define HFI_H264_PROFILE_MAIN 0x00000002
#define HFI_H264_PROFILE_HIGH 0x00000004
@@ -91,6 +92,7 @@
#define HFI_H264_PROFILE_CONSTRAINED_BASE 0x00000020
#define HFI_H264_PROFILE_CONSTRAINED_HIGH 0x00000040
+#define HFI_LEVEL_UNKNOWN 0x00000000
#define HFI_H264_LEVEL_1 0x00000001
#define HFI_H264_LEVEL_1b 0x00000002
#define HFI_H264_LEVEL_11 0x00000004
@@ -249,8 +251,8 @@ struct hfi_buffer_info {
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x003)
#define HFI_PROPERTY_PARAM_VENC_RATE_CONTROL \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x004)
-#define HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE \
- (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x008)
+#define HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE \
+ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x009)
#define HFI_PROPERTY_PARAM_VENC_OPEN_GOP \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x00C)
#define HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH \
@@ -537,11 +539,13 @@ struct hfi_quality_vs_speed {
struct hfi_quantization {
u32 qp_packed;
u32 layer_id;
+ u32 reserved[4];
};
struct hfi_quantization_range {
struct hfi_quantization min_qp;
struct hfi_quantization max_qp;
+ u32 reserved[4];
};
#define HFI_LTR_MODE_DISABLE 0x0
@@ -617,10 +621,10 @@ struct hfi_picture_type {
#define HFI_COLOR_FORMAT_YUV444 (HFI_COMMON_BASE + 0xE)
#define HFI_COLOR_FORMAT_RGBA8888 (HFI_COMMON_BASE + 0x10)
-#define HFI_COLOR_FORMAT_P010 \
- (HFI_COLOR_FORMAT_10_BIT_BASE + HFI_COLOR_FORMAT_NV12)
#define HFI_COLOR_FORMAT_YUV420_TP10 \
- (HFI_COLOR_FORMAT_10_BIT_BASE + HFI_COLOR_FORMAT_NV12_4x4TILE)
+ (HFI_COLOR_FORMAT_10_BIT_BASE + HFI_COLOR_FORMAT_NV12)
+#define HFI_COLOR_FORMAT_P010 \
+ (HFI_COLOR_FORMAT_10_BIT_BASE + HFI_COLOR_FORMAT_NV12 + 0x1)
#define HFI_COLOR_FORMAT_NV12_UBWC \
(HFI_COLOR_FORMAT_UBWC_BASE + HFI_COLOR_FORMAT_NV12)
diff --git a/drivers/media/usb/siano/smsusb.c b/drivers/media/usb/siano/smsusb.c
index c2e2587..18b41b9 100644
--- a/drivers/media/usb/siano/smsusb.c
+++ b/drivers/media/usb/siano/smsusb.c
@@ -218,22 +218,30 @@ static int smsusb_start_streaming(struct smsusb_device_t *dev)
static int smsusb_sendrequest(void *context, void *buffer, size_t size)
{
struct smsusb_device_t *dev = (struct smsusb_device_t *) context;
- struct sms_msg_hdr *phdr = (struct sms_msg_hdr *) buffer;
- int dummy;
+ struct sms_msg_hdr *phdr;
+ int dummy, ret;
if (dev->state != SMSUSB_ACTIVE) {
pr_debug("Device not active yet\n");
return -ENOENT;
}
+ phdr = kmalloc(size, GFP_KERNEL);
+ if (!phdr)
+ return -ENOMEM;
+ memcpy(phdr, buffer, size);
+
pr_debug("sending %s(%d) size: %d\n",
smscore_translate_msg(phdr->msg_type), phdr->msg_type,
phdr->msg_length);
smsendian_handle_tx_message((struct sms_msg_data *) phdr);
- smsendian_handle_message_header((struct sms_msg_hdr *)buffer);
- return usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 2),
- buffer, size, &dummy, 1000);
+ smsendian_handle_message_header((struct sms_msg_hdr *)phdr);
+ ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 2),
+ phdr, size, &dummy, 1000);
+
+ kfree(phdr);
+ return ret;
}
static char *smsusb1_fw_lkup[] = {
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index df19777..f57700c 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1690,10 +1690,10 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
err = mmc_select_hs400(card);
if (err)
goto free_card;
- } else if (mmc_card_hs(card)) {
+ } else {
/* Select the desired bus width optionally */
err = mmc_select_bus_width(card);
- if (err > 0) {
+ if (err > 0 && mmc_card_hs(card)) {
err = mmc_select_hs_ddr(card);
if (err)
goto free_card;
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
index 878950a..2cf8b1d 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
@@ -1007,9 +1007,7 @@
static inline void dsaf_write_reg(void __iomem *base, u32 reg, u32 value)
{
- u8 __iomem *reg_addr = ACCESS_ONCE(base);
-
- writel(value, reg_addr + reg);
+ writel(value, base + reg);
}
#define dsaf_write_dev(a, reg, value) \
@@ -1017,9 +1015,7 @@ static inline void dsaf_write_reg(void __iomem *base, u32 reg, u32 value)
static inline u32 dsaf_read_reg(u8 __iomem *base, u32 reg)
{
- u8 __iomem *reg_addr = ACCESS_ONCE(base);
-
- return readl(reg_addr + reg);
+ return readl(base + reg);
}
static inline void dsaf_write_syscon(struct regmap *base, u32 reg, u32 value)
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
index f2e8bed..4d3ddc2 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
@@ -507,8 +507,11 @@ void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv)
return;
for (ring = 0; ring < priv->rx_ring_num; ring++) {
- if (mlx4_en_is_ring_empty(priv->rx_ring[ring]))
+ if (mlx4_en_is_ring_empty(priv->rx_ring[ring])) {
+ local_bh_disable();
napi_reschedule(&priv->rx_cq[ring]->napi);
+ local_bh_enable();
+ }
}
}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index 71382df..81d8e3b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -765,7 +765,8 @@ void mlx5e_disable_vlan_filter(struct mlx5e_priv *priv);
int mlx5e_modify_rqs_vsd(struct mlx5e_priv *priv, bool vsd);
int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int ix);
-void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv);
+void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc,
+ enum mlx5e_traffic_types tt);
int mlx5e_open_locked(struct net_device *netdev);
int mlx5e_close_locked(struct net_device *netdev);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
index 27ff401..126cfeb 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
@@ -975,15 +975,18 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
{
- struct mlx5_core_dev *mdev = priv->mdev;
void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
- int i;
+ struct mlx5_core_dev *mdev = priv->mdev;
+ int ctxlen = MLX5_ST_SZ_BYTES(tirc);
+ int tt;
MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
- mlx5e_build_tir_ctx_hash(tirc, priv);
- for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
- mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
+ for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
+ memset(tirc, 0, ctxlen);
+ mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt);
+ mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
+ }
}
static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
@@ -991,6 +994,7 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
{
struct mlx5e_priv *priv = netdev_priv(dev);
int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
+ bool hash_changed = false;
void *in;
if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
@@ -1012,14 +1016,21 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
}
- if (key)
+ if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
+ hfunc != priv->params.rss_hfunc) {
+ priv->params.rss_hfunc = hfunc;
+ hash_changed = true;
+ }
+
+ if (key) {
memcpy(priv->params.toeplitz_hash_key, key,
sizeof(priv->params.toeplitz_hash_key));
+ hash_changed = hash_changed ||
+ priv->params.rss_hfunc == ETH_RSS_HASH_TOP;
+ }
- if (hfunc != ETH_RSS_HASH_NO_CHANGE)
- priv->params.rss_hfunc = hfunc;
-
- mlx5e_modify_tirs_hash(priv, in, inlen);
+ if (hash_changed)
+ mlx5e_modify_tirs_hash(priv, in, inlen);
mutex_unlock(&priv->state_lock);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index 5dc3e24..b306713 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -1978,8 +1978,23 @@ static void mlx5e_build_tir_ctx_lro(void *tirc, struct mlx5e_priv *priv)
MLX5_SET(tirc, tirc, lro_timeout_period_usecs, priv->params.lro_timeout);
}
-void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv)
+void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc,
+ enum mlx5e_traffic_types tt)
{
+ void *hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
+
+#define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\
+ MLX5_HASH_FIELD_SEL_DST_IP)
+
+#define MLX5_HASH_IP_L4PORTS (MLX5_HASH_FIELD_SEL_SRC_IP |\
+ MLX5_HASH_FIELD_SEL_DST_IP |\
+ MLX5_HASH_FIELD_SEL_L4_SPORT |\
+ MLX5_HASH_FIELD_SEL_L4_DPORT)
+
+#define MLX5_HASH_IP_IPSEC_SPI (MLX5_HASH_FIELD_SEL_SRC_IP |\
+ MLX5_HASH_FIELD_SEL_DST_IP |\
+ MLX5_HASH_FIELD_SEL_IPSEC_SPI)
+
MLX5_SET(tirc, tirc, rx_hash_fn,
mlx5e_rx_hash_fn(priv->params.rss_hfunc));
if (priv->params.rss_hfunc == ETH_RSS_HASH_TOP) {
@@ -1991,6 +2006,88 @@ void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv)
MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
memcpy(rss_key, priv->params.toeplitz_hash_key, len);
}
+
+ switch (tt) {
+ case MLX5E_TT_IPV4_TCP:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV4);
+ MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+ MLX5_L4_PROT_TYPE_TCP);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_L4PORTS);
+ break;
+
+ case MLX5E_TT_IPV6_TCP:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV6);
+ MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+ MLX5_L4_PROT_TYPE_TCP);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_L4PORTS);
+ break;
+
+ case MLX5E_TT_IPV4_UDP:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV4);
+ MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+ MLX5_L4_PROT_TYPE_UDP);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_L4PORTS);
+ break;
+
+ case MLX5E_TT_IPV6_UDP:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV6);
+ MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+ MLX5_L4_PROT_TYPE_UDP);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_L4PORTS);
+ break;
+
+ case MLX5E_TT_IPV4_IPSEC_AH:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV4);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_IPSEC_SPI);
+ break;
+
+ case MLX5E_TT_IPV6_IPSEC_AH:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV6);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_IPSEC_SPI);
+ break;
+
+ case MLX5E_TT_IPV4_IPSEC_ESP:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV4);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_IPSEC_SPI);
+ break;
+
+ case MLX5E_TT_IPV6_IPSEC_ESP:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV6);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP_IPSEC_SPI);
+ break;
+
+ case MLX5E_TT_IPV4:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV4);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP);
+ break;
+
+ case MLX5E_TT_IPV6:
+ MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+ MLX5_L3_PROT_TYPE_IPV6);
+ MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+ MLX5_HASH_IP);
+ break;
+ default:
+ WARN_ONCE(true, "%s: bad traffic type!\n", __func__);
+ }
}
static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv)
@@ -2360,110 +2457,13 @@ void mlx5e_cleanup_nic_tx(struct mlx5e_priv *priv)
static void mlx5e_build_indir_tir_ctx(struct mlx5e_priv *priv, u32 *tirc,
enum mlx5e_traffic_types tt)
{
- void *hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
-
MLX5_SET(tirc, tirc, transport_domain, priv->mdev->mlx5e_res.td.tdn);
-#define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\
- MLX5_HASH_FIELD_SEL_DST_IP)
-
-#define MLX5_HASH_IP_L4PORTS (MLX5_HASH_FIELD_SEL_SRC_IP |\
- MLX5_HASH_FIELD_SEL_DST_IP |\
- MLX5_HASH_FIELD_SEL_L4_SPORT |\
- MLX5_HASH_FIELD_SEL_L4_DPORT)
-
-#define MLX5_HASH_IP_IPSEC_SPI (MLX5_HASH_FIELD_SEL_SRC_IP |\
- MLX5_HASH_FIELD_SEL_DST_IP |\
- MLX5_HASH_FIELD_SEL_IPSEC_SPI)
-
mlx5e_build_tir_ctx_lro(tirc, priv);
MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn);
- mlx5e_build_tir_ctx_hash(tirc, priv);
-
- switch (tt) {
- case MLX5E_TT_IPV4_TCP:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV4);
- MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
- MLX5_L4_PROT_TYPE_TCP);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_L4PORTS);
- break;
-
- case MLX5E_TT_IPV6_TCP:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV6);
- MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
- MLX5_L4_PROT_TYPE_TCP);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_L4PORTS);
- break;
-
- case MLX5E_TT_IPV4_UDP:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV4);
- MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
- MLX5_L4_PROT_TYPE_UDP);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_L4PORTS);
- break;
-
- case MLX5E_TT_IPV6_UDP:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV6);
- MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
- MLX5_L4_PROT_TYPE_UDP);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_L4PORTS);
- break;
-
- case MLX5E_TT_IPV4_IPSEC_AH:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV4);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_IPSEC_SPI);
- break;
-
- case MLX5E_TT_IPV6_IPSEC_AH:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV6);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_IPSEC_SPI);
- break;
-
- case MLX5E_TT_IPV4_IPSEC_ESP:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV4);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_IPSEC_SPI);
- break;
-
- case MLX5E_TT_IPV6_IPSEC_ESP:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV6);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP_IPSEC_SPI);
- break;
-
- case MLX5E_TT_IPV4:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV4);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP);
- break;
-
- case MLX5E_TT_IPV6:
- MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
- MLX5_L3_PROT_TYPE_IPV6);
- MLX5_SET(rx_hash_field_select, hfso, selected_fields,
- MLX5_HASH_IP);
- break;
- default:
- WARN_ONCE(true,
- "mlx5e_build_indir_tir_ctx: bad traffic type!\n");
- }
+ mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt);
}
static void mlx5e_build_direct_tir_ctx(struct mlx5e_priv *priv, u32 *tirc,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 914e546..7e20e4b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -1110,9 +1110,8 @@ static struct mlx5_flow_rule *add_rule_fg(struct mlx5_flow_group *fg,
return rule;
}
rule = add_rule_fte(fte, fg, dest);
- unlock_ref_node(&fte->node);
if (IS_ERR(rule))
- goto unlock_fg;
+ goto unlock_fte;
else
goto add_rule;
}
@@ -1130,6 +1129,7 @@ static struct mlx5_flow_rule *add_rule_fg(struct mlx5_flow_group *fg,
goto unlock_fg;
}
tree_init_node(&fte->node, 0, del_fte);
+ nested_lock_ref_node(&fte->node, FS_MUTEX_CHILD);
rule = add_rule_fte(fte, fg, dest);
if (IS_ERR(rule)) {
kfree(fte);
@@ -1142,6 +1142,8 @@ static struct mlx5_flow_rule *add_rule_fg(struct mlx5_flow_group *fg,
list_add(&fte->node.list, prev);
add_rule:
tree_add_node(&rule->node, &fte->node);
+unlock_fte:
+ unlock_ref_node(&fte->node);
unlock_fg:
unlock_ref_node(&fg->node);
return rule;
diff --git a/drivers/net/ethernet/msm/rndis_ipa.c b/drivers/net/ethernet/msm/rndis_ipa.c
index 29596f6..b8eff5a 100644
--- a/drivers/net/ethernet/msm/rndis_ipa.c
+++ b/drivers/net/ethernet/msm/rndis_ipa.c
@@ -121,8 +121,8 @@ enum rndis_ipa_operation {
};
#define RNDIS_IPA_STATE_DEBUG(ctx) \
- (RNDIS_IPA_DEBUG("Driver state: %s\n",\
- rndis_ipa_state_string((ctx)->state)))
+ RNDIS_IPA_DEBUG("Driver state: %s\n",\
+ rndis_ipa_state_string((ctx)->state))
/**
@@ -832,7 +832,7 @@ static netdev_tx_t rndis_ipa_start_xmit(struct sk_buff *skb,
netdev_tx_t status = NETDEV_TX_BUSY;
struct rndis_ipa_dev *rndis_ipa_ctx = netdev_priv(net);
- net->trans_start = jiffies;
+ netif_trans_update(net);
RNDIS_IPA_DEBUG
("Tx, len=%d, skb->protocol=%d, outstanding=%d\n",
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 7df4ff1..7d19029 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -305,8 +305,12 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
{
void __iomem *ioaddr = hw->pcsr;
u32 intr_status = readl(ioaddr + GMAC_INT_STATUS);
+ u32 intr_mask = readl(ioaddr + GMAC_INT_MASK);
int ret = 0;
+ /* Discard masked bits */
+ intr_status &= ~intr_mask;
+
/* Not used events (e.g. MMC interrupts) are not handled. */
if ((intr_status & GMAC_INT_STATUS_MMCTIS))
x->mmc_tx_irq_n++;
diff --git a/drivers/net/hyperv/netvsc.c b/drivers/net/hyperv/netvsc.c
index 720b5fa..c2ac39a 100644
--- a/drivers/net/hyperv/netvsc.c
+++ b/drivers/net/hyperv/netvsc.c
@@ -1288,6 +1288,9 @@ void netvsc_channel_cb(void *context)
ndev = hv_get_drvdata(device);
buffer = get_per_channel_state(channel);
+ /* commit_rd_index() -> hv_signal_on_read() needs this. */
+ init_cached_read_index(channel);
+
do {
desc = get_next_pkt_raw(channel);
if (desc != NULL) {
@@ -1340,6 +1343,9 @@ void netvsc_channel_cb(void *context)
bufferlen = bytes_recvd;
}
+
+ init_cached_read_index(channel);
+
} while (1);
if (bufferlen > NETVSC_PACKET_SIZE)
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 6255973..1b65f0f 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -164,6 +164,7 @@ static void loopback_setup(struct net_device *dev)
{
dev->mtu = 64 * 1024;
dev->hard_header_len = ETH_HLEN; /* 14 */
+ dev->min_header_len = ETH_HLEN; /* 14 */
dev->addr_len = ETH_ALEN; /* 6 */
dev->type = ARPHRD_LOOPBACK; /* 0x0001*/
dev->flags = IFF_LOOPBACK;
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index 6f38daf..adea6f5 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -682,7 +682,7 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,
ssize_t n;
if (q->flags & IFF_VNET_HDR) {
- vnet_hdr_len = q->vnet_hdr_sz;
+ vnet_hdr_len = READ_ONCE(q->vnet_hdr_sz);
err = -EINVAL;
if (len < vnet_hdr_len)
@@ -822,7 +822,7 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,
if (q->flags & IFF_VNET_HDR) {
struct virtio_net_hdr vnet_hdr;
- vnet_hdr_len = q->vnet_hdr_sz;
+ vnet_hdr_len = READ_ONCE(q->vnet_hdr_sz);
if (iov_iter_count(iter) < vnet_hdr_len)
return -EINVAL;
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index e5d9041..e686b70 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1187,9 +1187,11 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,
}
if (tun->flags & IFF_VNET_HDR) {
- if (len < tun->vnet_hdr_sz)
+ int vnet_hdr_sz = READ_ONCE(tun->vnet_hdr_sz);
+
+ if (len < vnet_hdr_sz)
return -EINVAL;
- len -= tun->vnet_hdr_sz;
+ len -= vnet_hdr_sz;
n = copy_from_iter(&gso, sizeof(gso), from);
if (n != sizeof(gso))
@@ -1201,7 +1203,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,
if (tun16_to_cpu(tun, gso.hdr_len) > len)
return -EINVAL;
- iov_iter_advance(from, tun->vnet_hdr_sz - sizeof(gso));
+ iov_iter_advance(from, vnet_hdr_sz - sizeof(gso));
}
if ((tun->flags & TUN_TYPE_MASK) == IFF_TAP) {
@@ -1348,7 +1350,7 @@ static ssize_t tun_put_user(struct tun_struct *tun,
vlan_hlen = VLAN_HLEN;
if (tun->flags & IFF_VNET_HDR)
- vnet_hdr_sz = tun->vnet_hdr_sz;
+ vnet_hdr_sz = READ_ONCE(tun->vnet_hdr_sz);
total = skb->len + vlan_hlen + vnet_hdr_sz;
diff --git a/drivers/net/usb/catc.c b/drivers/net/usb/catc.c
index d9ca05d..4086415 100644
--- a/drivers/net/usb/catc.c
+++ b/drivers/net/usb/catc.c
@@ -777,7 +777,7 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id
struct net_device *netdev;
struct catc *catc;
u8 broadcast[ETH_ALEN];
- int i, pktsz;
+ int pktsz, ret;
if (usb_set_interface(usbdev,
intf->altsetting->desc.bInterfaceNumber, 1)) {
@@ -812,12 +812,8 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id
if ((!catc->ctrl_urb) || (!catc->tx_urb) ||
(!catc->rx_urb) || (!catc->irq_urb)) {
dev_err(&intf->dev, "No free urbs available.\n");
- usb_free_urb(catc->ctrl_urb);
- usb_free_urb(catc->tx_urb);
- usb_free_urb(catc->rx_urb);
- usb_free_urb(catc->irq_urb);
- free_netdev(netdev);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto fail_free;
}
/* The F5U011 has the same vendor/product as the netmate but a device version of 0x130 */
@@ -845,15 +841,24 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id
catc->irq_buf, 2, catc_irq_done, catc, 1);
if (!catc->is_f5u011) {
+ u32 *buf;
+ int i;
+
dev_dbg(dev, "Checking memory size\n");
- i = 0x12345678;
- catc_write_mem(catc, 0x7a80, &i, 4);
- i = 0x87654321;
- catc_write_mem(catc, 0xfa80, &i, 4);
- catc_read_mem(catc, 0x7a80, &i, 4);
+ buf = kmalloc(4, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto fail_free;
+ }
+
+ *buf = 0x12345678;
+ catc_write_mem(catc, 0x7a80, buf, 4);
+ *buf = 0x87654321;
+ catc_write_mem(catc, 0xfa80, buf, 4);
+ catc_read_mem(catc, 0x7a80, buf, 4);
- switch (i) {
+ switch (*buf) {
case 0x12345678:
catc_set_reg(catc, TxBufCount, 8);
catc_set_reg(catc, RxBufCount, 32);
@@ -868,6 +873,8 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id
dev_dbg(dev, "32k Memory\n");
break;
}
+
+ kfree(buf);
dev_dbg(dev, "Getting MAC from SEEROM.\n");
@@ -914,16 +921,21 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id
usb_set_intfdata(intf, catc);
SET_NETDEV_DEV(netdev, &intf->dev);
- if (register_netdev(netdev) != 0) {
- usb_set_intfdata(intf, NULL);
- usb_free_urb(catc->ctrl_urb);
- usb_free_urb(catc->tx_urb);
- usb_free_urb(catc->rx_urb);
- usb_free_urb(catc->irq_urb);
- free_netdev(netdev);
- return -EIO;
- }
+ ret = register_netdev(netdev);
+ if (ret)
+ goto fail_clear_intfdata;
+
return 0;
+
+fail_clear_intfdata:
+ usb_set_intfdata(intf, NULL);
+fail_free:
+ usb_free_urb(catc->ctrl_urb);
+ usb_free_urb(catc->tx_urb);
+ usb_free_urb(catc->rx_urb);
+ usb_free_urb(catc->irq_urb);
+ free_netdev(netdev);
+ return ret;
}
static void catc_disconnect(struct usb_interface *intf)
diff --git a/drivers/net/usb/pegasus.c b/drivers/net/usb/pegasus.c
index 1434e5d..ee40ac2 100644
--- a/drivers/net/usb/pegasus.c
+++ b/drivers/net/usb/pegasus.c
@@ -126,40 +126,61 @@ static void async_ctrl_callback(struct urb *urb)
static int get_registers(pegasus_t *pegasus, __u16 indx, __u16 size, void *data)
{
+ u8 *buf;
int ret;
+ buf = kmalloc(size, GFP_NOIO);
+ if (!buf)
+ return -ENOMEM;
+
ret = usb_control_msg(pegasus->usb, usb_rcvctrlpipe(pegasus->usb, 0),
PEGASUS_REQ_GET_REGS, PEGASUS_REQT_READ, 0,
- indx, data, size, 1000);
+ indx, buf, size, 1000);
if (ret < 0)
netif_dbg(pegasus, drv, pegasus->net,
"%s returned %d\n", __func__, ret);
+ else if (ret <= size)
+ memcpy(data, buf, ret);
+ kfree(buf);
return ret;
}
-static int set_registers(pegasus_t *pegasus, __u16 indx, __u16 size, void *data)
+static int set_registers(pegasus_t *pegasus, __u16 indx, __u16 size,
+ const void *data)
{
+ u8 *buf;
int ret;
+ buf = kmemdup(data, size, GFP_NOIO);
+ if (!buf)
+ return -ENOMEM;
+
ret = usb_control_msg(pegasus->usb, usb_sndctrlpipe(pegasus->usb, 0),
PEGASUS_REQ_SET_REGS, PEGASUS_REQT_WRITE, 0,
- indx, data, size, 100);
+ indx, buf, size, 100);
if (ret < 0)
netif_dbg(pegasus, drv, pegasus->net,
"%s returned %d\n", __func__, ret);
+ kfree(buf);
return ret;
}
static int set_register(pegasus_t *pegasus, __u16 indx, __u8 data)
{
+ u8 *buf;
int ret;
+ buf = kmemdup(&data, 1, GFP_NOIO);
+ if (!buf)
+ return -ENOMEM;
+
ret = usb_control_msg(pegasus->usb, usb_sndctrlpipe(pegasus->usb, 0),
PEGASUS_REQ_SET_REG, PEGASUS_REQT_WRITE, data,
- indx, &data, 1, 1000);
+ indx, buf, 1, 1000);
if (ret < 0)
netif_dbg(pegasus, drv, pegasus->net,
"%s returned %d\n", __func__, ret);
+ kfree(buf);
return ret;
}
diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c
index 7c72bfa..dc4f7ea 100644
--- a/drivers/net/usb/rtl8150.c
+++ b/drivers/net/usb/rtl8150.c
@@ -155,16 +155,36 @@ static const char driver_name [] = "rtl8150";
*/
static int get_registers(rtl8150_t * dev, u16 indx, u16 size, void *data)
{
- return usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
- RTL8150_REQ_GET_REGS, RTL8150_REQT_READ,
- indx, 0, data, size, 500);
+ void *buf;
+ int ret;
+
+ buf = kmalloc(size, GFP_NOIO);
+ if (!buf)
+ return -ENOMEM;
+
+ ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
+ RTL8150_REQ_GET_REGS, RTL8150_REQT_READ,
+ indx, 0, buf, size, 500);
+ if (ret > 0 && ret <= size)
+ memcpy(data, buf, ret);
+ kfree(buf);
+ return ret;
}
-static int set_registers(rtl8150_t * dev, u16 indx, u16 size, void *data)
+static int set_registers(rtl8150_t * dev, u16 indx, u16 size, const void *data)
{
- return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
- RTL8150_REQ_SET_REGS, RTL8150_REQT_WRITE,
- indx, 0, data, size, 500);
+ void *buf;
+ int ret;
+
+ buf = kmemdup(data, size, GFP_NOIO);
+ if (!buf)
+ return -ENOMEM;
+
+ ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
+ RTL8150_REQ_SET_REGS, RTL8150_REQT_WRITE,
+ indx, 0, buf, size, 500);
+ kfree(buf);
+ return ret;
}
static void async_set_reg_cb(struct urb *urb)
diff --git a/drivers/net/wireless/ath/wil6210/Kconfig b/drivers/net/wireless/ath/wil6210/Kconfig
index 6dfedc8..9e3961c 100644
--- a/drivers/net/wireless/ath/wil6210/Kconfig
+++ b/drivers/net/wireless/ath/wil6210/Kconfig
@@ -40,3 +40,12 @@
option if you are interested in debugging the driver.
If unsure, say Y to make it easier to debug problems.
+
+config WIL6210_PLATFORM_MSM
+ bool "wil6210 MSM platform specific support"
+ depends on WIL6210
+ depends on ARCH_QCOM
+ default y
+ ---help---
+ Say Y here to enable wil6210 driver support for MSM
+ platform specific features
diff --git a/drivers/net/wireless/ath/wil6210/Makefile b/drivers/net/wireless/ath/wil6210/Makefile
index 11b544b..81651c7 100644
--- a/drivers/net/wireless/ath/wil6210/Makefile
+++ b/drivers/net/wireless/ath/wil6210/Makefile
@@ -24,3 +24,6 @@
CFLAGS_trace.o := -I$(src)
subdir-ccflags-y += -D__CHECK_ENDIAN__
+
+MSM_11AD_PATH = drivers/platform/msm/msm_11ad
+CFLAGS_wil_platform.o := -I$(MSM_11AD_PATH)
diff --git a/drivers/net/wireless/ath/wil6210/ioctl.c b/drivers/net/wireless/ath/wil6210/ioctl.c
index 6303800..47058cc 100644
--- a/drivers/net/wireless/ath/wil6210/ioctl.c
+++ b/drivers/net/wireless/ath/wil6210/ioctl.c
@@ -24,6 +24,14 @@
DUMP_PREFIX_OFFSET, 16, 1, buf, len, true)
#define wil_dbg_ioctl(wil, fmt, arg...) wil_dbg(wil, "DBG[IOC ]" fmt, ##arg)
+#define WIL_PRIV_DATA_MAX_LEN 8192
+#define CMD_SET_AP_WPS_P2P_IE "SET_AP_WPS_P2P_IE"
+
+struct wil_android_priv_data {
+ char *buf;
+ int used_len;
+ int total_len;
+};
static void __iomem *wil_ioc_addr(struct wil6210_priv *wil, uint32_t addr,
uint32_t size, enum wil_memio_op op)
{
@@ -159,6 +167,52 @@ static int wil_ioc_memio_block(struct wil6210_priv *wil, void __user *data)
return rc;
}
+static int wil_ioc_android(struct wil6210_priv *wil, void __user *data)
+{
+ int rc = 0;
+ char *command;
+ struct wil_android_priv_data priv_data;
+
+ wil_dbg_ioctl(wil, "%s()\n", __func__);
+
+ if (copy_from_user(&priv_data, data, sizeof(priv_data)))
+ return -EFAULT;
+
+ if (priv_data.total_len <= 0 ||
+ priv_data.total_len >= WIL_PRIV_DATA_MAX_LEN) {
+ wil_err(wil, "%s: invalid data len %d\n",
+ __func__, priv_data.total_len);
+ return -EINVAL;
+ }
+
+ command = kmalloc(priv_data.total_len + 1, GFP_KERNEL);
+ if (!command)
+ return -ENOMEM;
+
+ if (copy_from_user(command, priv_data.buf, priv_data.total_len)) {
+ rc = -EFAULT;
+ goto out_free;
+ }
+
+ /* Make sure the command is NUL-terminated */
+ command[priv_data.total_len] = '\0';
+
+ wil_dbg_ioctl(wil, "%s(command = %s)\n", __func__, command);
+
+ /* P2P not supported, but WPS is (in AP mode).
+ * Ignore those in order not to block WPS functionality
+ * in non-P2P mode.
+ */
+ if (strncasecmp(command, CMD_SET_AP_WPS_P2P_IE,
+ strlen(CMD_SET_AP_WPS_P2P_IE)) == 0)
+ rc = 0;
+ else
+ rc = -ENOIOCTLCMD;
+
+out_free:
+ kfree(command);
+ return rc;
+}
int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd)
{
int ret;
@@ -170,6 +224,9 @@ int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd)
case WIL_IOCTL_MEMIO_BLOCK:
ret = wil_ioc_memio_block(wil, data);
break;
+ case (SIOCDEVPRIVATE + 1):
+ ret = wil_ioc_android(wil, data);
+ break;
default:
wil_dbg_ioctl(wil, "Unsupported IOCTL 0x%04x\n", cmd);
return -ENOIOCTLCMD;
diff --git a/drivers/net/wireless/ath/wil6210/netdev.c b/drivers/net/wireless/ath/wil6210/netdev.c
index 61de5e9..7545f58 100644
--- a/drivers/net/wireless/ath/wil6210/netdev.c
+++ b/drivers/net/wireless/ath/wil6210/netdev.c
@@ -14,10 +14,15 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <linux/moduleparam.h>
#include <linux/etherdevice.h>
#include "wil6210.h"
#include "txrx.h"
+static bool alt_ifname; /* = false; */
+module_param(alt_ifname, bool, 0444);
+MODULE_PARM_DESC(alt_ifname, " use an alternate interface name wigigN instead of wlanN");
+
static int wil_open(struct net_device *ndev)
{
struct wil6210_priv *wil = ndev_to_wil(ndev);
@@ -136,6 +141,7 @@ void *wil_if_alloc(struct device *dev)
struct wil6210_priv *wil;
struct ieee80211_channel *ch;
int rc = 0;
+ const char *ifname = alt_ifname ? "wigig%d" : "wlan%d";
wdev = wil_cfg80211_init(dev);
if (IS_ERR(wdev)) {
@@ -160,7 +166,7 @@ void *wil_if_alloc(struct device *dev)
ch = wdev->wiphy->bands[NL80211_BAND_60GHZ]->channels;
cfg80211_chandef_create(&wdev->preset_chandef, ch, NL80211_CHAN_NO_HT);
- ndev = alloc_netdev(0, "wlan%d", NET_NAME_UNKNOWN, wil_dev_setup);
+ ndev = alloc_netdev(0, ifname, NET_NAME_UNKNOWN, wil_dev_setup);
if (!ndev) {
dev_err(dev, "alloc_netdev_mqs failed\n");
rc = -ENOMEM;
diff --git a/drivers/net/wireless/ath/wil6210/wil_platform.c b/drivers/net/wireless/ath/wil6210/wil_platform.c
index 4eed05bd..47cab37 100644
--- a/drivers/net/wireless/ath/wil6210/wil_platform.c
+++ b/drivers/net/wireless/ath/wil6210/wil_platform.c
@@ -16,14 +16,16 @@
#include <linux/device.h>
#include "wil_platform.h"
+#include "msm_11ad.h"
int __init wil_platform_modinit(void)
{
- return 0;
+ return msm_11ad_modinit();
}
void wil_platform_modexit(void)
{
+ msm_11ad_modexit();
}
/**
@@ -36,7 +38,7 @@ void wil_platform_modexit(void)
void *wil_platform_init(struct device *dev, struct wil_platform_ops *ops,
const struct wil_platform_rops *rops, void *wil_handle)
{
- void *handle = ops; /* to return some non-NULL for 'void' impl. */
+ void *handle;
if (!ops) {
dev_err(dev,
@@ -44,7 +46,7 @@ void *wil_platform_init(struct device *dev, struct wil_platform_ops *ops,
return NULL;
}
- /* platform specific init functions should be called here */
+ handle = msm_11ad_dev_init(dev, ops, rops, wil_handle);
return handle;
}
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c
index 8b6e37c..20bfb37 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c
@@ -96,7 +96,7 @@ int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
- char *fw_name = "rtlwifi/rtl8192cfwU.bin";
+ char *fw_name;
rtl8192ce_bt_reg_init(hw);
@@ -168,8 +168,13 @@ int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
}
/* request fw */
- if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version))
+ if (IS_VENDOR_UMC_A_CUT(rtlhal->version) &&
+ !IS_92C_SERIAL(rtlhal->version))
+ fw_name = "rtlwifi/rtl8192cfwU.bin";
+ else if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version))
fw_name = "rtlwifi/rtl8192cfwU_B.bin";
+ else
+ fw_name = "rtlwifi/rtl8192cfw.bin";
rtlpriv->max_fw_size = 0x4000;
pr_info("Using firmware %s\n", fw_name);
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index bf2744e..0cdcb21 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -1397,6 +1397,8 @@ static void xennet_disconnect_backend(struct netfront_info *info)
for (i = 0; i < num_queues && info->queues; ++i) {
struct netfront_queue *queue = &info->queues[i];
+ del_timer_sync(&queue->rx_refill_timer);
+
if (queue->tx_irq && (queue->tx_irq == queue->rx_irq))
unbind_from_irqhandler(queue->tx_irq, queue);
if (queue->tx_irq && (queue->tx_irq != queue->rx_irq)) {
@@ -1751,7 +1753,6 @@ static void xennet_destroy_queues(struct netfront_info *info)
if (netif_running(info->netdev))
napi_disable(&queue->napi);
- del_timer_sync(&queue->rx_refill_timer);
netif_napi_del(&queue->napi);
}
diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c
index 4eb8adb..c234ee43 100644
--- a/drivers/ntb/ntb_transport.c
+++ b/drivers/ntb/ntb_transport.c
@@ -1799,7 +1799,7 @@ ntb_transport_create_queue(void *data, struct device *client_dev,
node = dev_to_node(&ndev->dev);
- free_queue = ffs(nt->qp_bitmap);
+ free_queue = ffs(nt->qp_bitmap_free);
if (!free_queue)
goto err;
@@ -2270,9 +2270,8 @@ module_init(ntb_transport_init);
static void __exit ntb_transport_exit(void)
{
- debugfs_remove_recursive(nt_debugfs_dir);
-
ntb_unregister_client(&ntb_transport_client);
bus_unregister(&ntb_transport_bus);
+ debugfs_remove_recursive(nt_debugfs_dir);
}
module_exit(ntb_transport_exit);
diff --git a/drivers/ntb/test/ntb_perf.c b/drivers/ntb/test/ntb_perf.c
index e75d4fd..434e1d4 100644
--- a/drivers/ntb/test/ntb_perf.c
+++ b/drivers/ntb/test/ntb_perf.c
@@ -265,6 +265,8 @@ static ssize_t perf_copy(struct pthr_ctx *pctx, char __iomem *dst,
if (dma_submit_error(cookie))
goto err_set_unmap;
+ dmaengine_unmap_put(unmap);
+
atomic_inc(&pctx->dma_sync);
dma_async_issue_pending(chan);
diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_devs.c
index 1480734..aefca64 100644
--- a/drivers/nvdimm/namespace_devs.c
+++ b/drivers/nvdimm/namespace_devs.c
@@ -962,8 +962,8 @@ static ssize_t __size_store(struct device *dev, unsigned long long val)
struct nvdimm_drvdata *ndd;
struct nd_label_id label_id;
u32 flags = 0, remainder;
+ int rc, i, id = -1;
u8 *uuid = NULL;
- int rc, i;
if (dev->driver || ndns->claim)
return -EBUSY;
@@ -972,11 +972,13 @@ static ssize_t __size_store(struct device *dev, unsigned long long val)
struct nd_namespace_pmem *nspm = to_nd_namespace_pmem(dev);
uuid = nspm->uuid;
+ id = nspm->id;
} else if (is_namespace_blk(dev)) {
struct nd_namespace_blk *nsblk = to_nd_namespace_blk(dev);
uuid = nsblk->uuid;
flags = NSLABEL_FLAG_LOCAL;
+ id = nsblk->id;
}
/*
@@ -1039,10 +1041,11 @@ static ssize_t __size_store(struct device *dev, unsigned long long val)
/*
* Try to delete the namespace if we deleted all of its
- * allocation, this is not the seed device for the region, and
- * it is not actively claimed by a btt instance.
+ * allocation, this is not the seed or 0th device for the
+ * region, and it is not actively claimed by a btt, pfn, or dax
+ * instance.
*/
- if (val == 0 && nd_region->ns_seed != dev && !ndns->claim)
+ if (val == 0 && id != 0 && nd_region->ns_seed != dev && !ndns->claim)
nd_device_unregister(dev, ND_ASYNC);
return rc;
diff --git a/drivers/nvdimm/pfn_devs.c b/drivers/nvdimm/pfn_devs.c
index a2ac9e6..6c033c9 100644
--- a/drivers/nvdimm/pfn_devs.c
+++ b/drivers/nvdimm/pfn_devs.c
@@ -627,15 +627,12 @@ static int nd_pfn_init(struct nd_pfn *nd_pfn)
size = resource_size(&nsio->res);
npfns = (size - start_pad - end_trunc - SZ_8K) / SZ_4K;
if (nd_pfn->mode == PFN_MODE_PMEM) {
- unsigned long memmap_size;
-
/*
* vmemmap_populate_hugepages() allocates the memmap array in
* HPAGE_SIZE chunks.
*/
- memmap_size = ALIGN(64 * npfns, HPAGE_SIZE);
- offset = ALIGN(start + SZ_8K + memmap_size + dax_label_reserve,
- nd_pfn->align) - start;
+ offset = ALIGN(start + SZ_8K + 64 * npfns + dax_label_reserve,
+ max(nd_pfn->align, HPAGE_SIZE)) - start;
} else if (nd_pfn->mode == PFN_MODE_RAM)
offset = ALIGN(start + SZ_8K + dax_label_reserve,
nd_pfn->align) - start;
diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
index 884bad5..4b70349 100644
--- a/drivers/pci/pcie/pme.c
+++ b/drivers/pci/pcie/pme.c
@@ -448,6 +448,17 @@ static int pcie_pme_resume(struct pcie_device *srv)
return 0;
}
+/**
+ * pcie_pme_remove - Prepare PCIe PME service device for removal.
+ * @srv - PCIe service device to remove.
+ */
+static void pcie_pme_remove(struct pcie_device *srv)
+{
+ pcie_pme_suspend(srv);
+ free_irq(srv->irq, srv);
+ kfree(get_service_data(srv));
+}
+
static struct pcie_port_service_driver pcie_pme_driver = {
.name = "pcie_pme",
.port_type = PCI_EXP_TYPE_ROOT_PORT,
@@ -456,6 +467,7 @@ static struct pcie_port_service_driver pcie_pme_driver = {
.probe = pcie_pme_probe,
.suspend = pcie_pme_suspend,
.resume = pcie_pme_resume,
+ .remove = pcie_pme_remove,
};
/**
diff --git a/drivers/platform/msm/Kconfig b/drivers/platform/msm/Kconfig
index 6265515..54a9cb2 100644
--- a/drivers/platform/msm/Kconfig
+++ b/drivers/platform/msm/Kconfig
@@ -113,6 +113,7 @@
numbers in the kernel log along with the PMIC option status. The PMIC
type is mapped to a QTI chip part number and logged as well.
+
config MSM_MHI_DEV
tristate "Modem Device Interface Driver"
depends on EP_PCIE && IPA
@@ -130,4 +131,17 @@
Enabling this option adds USB BAM Driver.
USB BAM driver was added to supports SPS Peripheral-to-Peripheral
transfers between the USB and other peripheral.
+
+config MSM_11AD
+ tristate "Platform driver for 11ad chip"
+ depends on PCI
+ depends on PCI_MSM
+ default n
+ ---help---
+ This module adds required platform support for wireless adapter based on
+ Qualcomm Technologies, Inc. 11ad chip, integrated into MSM platform
+
+ If you choose to build it as a module, it will be called
+ msm_11ad_proxy.
+
endmenu
diff --git a/drivers/platform/msm/Makefile b/drivers/platform/msm/Makefile
index fe7ae10..0bf87f4 100644
--- a/drivers/platform/msm/Makefile
+++ b/drivers/platform/msm/Makefile
@@ -9,3 +9,4 @@
obj-$(CONFIG_QPNP_REVID) += qpnp-revid.o
obj-$(CONFIG_MSM_MHI_DEV) += mhi_dev/
obj-$(CONFIG_USB_BAM) += usb_bam.o
+obj-$(CONFIG_MSM_11AD) += msm_11ad/
\ No newline at end of file
diff --git a/drivers/platform/msm/gsi/gsi.c b/drivers/platform/msm/gsi/gsi.c
index 23b0428..f48182c 100644
--- a/drivers/platform/msm/gsi/gsi.c
+++ b/drivers/platform/msm/gsi/gsi.c
@@ -22,7 +22,7 @@
#include "gsi_reg.h"
#define GSI_CMD_TIMEOUT (5*HZ)
-#define GSI_STOP_CMD_TIMEOUT_MS 1
+#define GSI_STOP_CMD_TIMEOUT_MS 10
#define GSI_MAX_CH_LOW_WEIGHT 15
#define GSI_MHI_ER_START 10
#define GSI_MHI_ER_END 16
diff --git a/drivers/platform/msm/ipa/ipa_api.c b/drivers/platform/msm/ipa/ipa_api.c
index 06881d3..aa81bdc 100644
--- a/drivers/platform/msm/ipa/ipa_api.c
+++ b/drivers/platform/msm/ipa/ipa_api.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2510,15 +2510,15 @@ EXPORT_SYMBOL(ipa_create_wdi_mapping);
/**
* ipa_get_gsi_ep_info() - provide gsi ep information
- * @ipa_ep_idx: IPA endpoint index
+ * @client: IPA client type
*
* Return value: pointer to ipa_gsi_ep_info
*/
-struct ipa_gsi_ep_config *ipa_get_gsi_ep_info(int ipa_ep_idx)
+const struct ipa_gsi_ep_config *ipa_get_gsi_ep_info(enum ipa_client_type client)
{
if (!ipa_api_ctrl || !ipa_api_ctrl->ipa_get_gsi_ep_info)
return NULL;
- return ipa_api_ctrl->ipa_get_gsi_ep_info(ipa_ep_idx);
+ return ipa_api_ctrl->ipa_get_gsi_ep_info(client);
}
EXPORT_SYMBOL(ipa_get_gsi_ep_info);
diff --git a/drivers/platform/msm/ipa/ipa_api.h b/drivers/platform/msm/ipa/ipa_api.h
index 171c9fb..1b8e3d6 100644
--- a/drivers/platform/msm/ipa/ipa_api.h
+++ b/drivers/platform/msm/ipa/ipa_api.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -331,7 +331,8 @@ struct ipa_api_controller {
int (*ipa_create_wdi_mapping)(u32 num_buffers,
struct ipa_wdi_buffer_info *info);
- struct ipa_gsi_ep_config *(*ipa_get_gsi_ep_info)(int ipa_ep_idx);
+ const struct ipa_gsi_ep_config *(*ipa_get_gsi_ep_info)
+ (enum ipa_client_type client);
int (*ipa_register_ipa_ready_cb)(void (*ipa_ready_cb)(void *user_data),
void *user_data);
diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa.c b/drivers/platform/msm/ipa/ipa_v2/ipa.c
index feec2aa..4d735df 100644
--- a/drivers/platform/msm/ipa/ipa_v2/ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa.c
@@ -1827,7 +1827,7 @@ static int ipa_q6_clean_q6_tables(void)
u32 max_cmds = ipa_get_max_flt_rt_cmds(ipa_ctx->ipa_num_pipes);
mem.base = dma_alloc_coherent(ipa_ctx->pdev, 4, &mem.phys_base,
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!mem.base) {
IPAERR("failed to alloc DMA buff of size 4\n");
return -ENOMEM;
diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c b/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c
index 4fdd84b..dd12169 100644
--- a/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c
@@ -4929,7 +4929,8 @@ int ipa2_disable_apps_wan_cons_deaggr(uint32_t agg_size, uint32_t agg_count)
return res;
}
-static struct ipa_gsi_ep_config *ipa2_get_gsi_ep_info(int ipa_ep_idx)
+static const struct ipa_gsi_ep_config *ipa2_get_gsi_ep_info
+ (enum ipa_client_type client)
{
IPAERR("Not supported for IPA 2.x\n");
return NULL;
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa.c b/drivers/platform/msm/ipa/ipa_v3/ipa.c
index e0ae1c6..6024876 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa.c
@@ -1974,7 +1974,7 @@ static int ipa3_q6_clean_q6_flt_tbls(enum ipa_ip_type ip,
}
retval = ipahal_flt_generate_empty_img(1, lcl_hdr_sz, lcl_hdr_sz,
- 0, &mem);
+ 0, &mem, true);
if (retval) {
IPAERR("failed to generate flt single tbl empty img\n");
goto free_cmd_pyld;
@@ -2081,7 +2081,7 @@ static int ipa3_q6_clean_q6_rt_tbls(enum ipa_ip_type ip,
retval = ipahal_rt_generate_empty_img(
modem_rt_index_hi - modem_rt_index_lo + 1,
- lcl_hdr_sz, lcl_hdr_sz, &mem);
+ lcl_hdr_sz, lcl_hdr_sz, &mem, true);
if (retval) {
IPAERR("fail generate empty rt img\n");
return -ENOMEM;
@@ -2554,7 +2554,7 @@ int _ipa_init_rt4_v3(void)
rc = ipahal_rt_generate_empty_img(IPA_MEM_PART(v4_rt_num_index),
IPA_MEM_PART(v4_rt_hash_size), IPA_MEM_PART(v4_rt_nhash_size),
- &mem);
+ &mem, false);
if (rc) {
IPAERR("fail generate empty v4 rt img\n");
return rc;
@@ -2621,7 +2621,7 @@ int _ipa_init_rt6_v3(void)
rc = ipahal_rt_generate_empty_img(IPA_MEM_PART(v6_rt_num_index),
IPA_MEM_PART(v6_rt_hash_size), IPA_MEM_PART(v6_rt_nhash_size),
- &mem);
+ &mem, false);
if (rc) {
IPAERR("fail generate empty v6 rt img\n");
return rc;
@@ -2682,7 +2682,7 @@ int _ipa_init_flt4_v3(void)
rc = ipahal_flt_generate_empty_img(ipa3_ctx->ep_flt_num,
IPA_MEM_PART(v4_flt_hash_size),
IPA_MEM_PART(v4_flt_nhash_size), ipa3_ctx->ep_flt_bitmap,
- &mem);
+ &mem, false);
if (rc) {
IPAERR("fail generate empty v4 flt img\n");
return rc;
@@ -2742,7 +2742,7 @@ int _ipa_init_flt6_v3(void)
rc = ipahal_flt_generate_empty_img(ipa3_ctx->ep_flt_num,
IPA_MEM_PART(v6_flt_hash_size),
IPA_MEM_PART(v6_flt_nhash_size), ipa3_ctx->ep_flt_bitmap,
- &mem);
+ &mem, false);
if (rc) {
IPAERR("fail generate empty v6 flt img\n");
return rc;
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_client.c b/drivers/platform/msm/ipa/ipa_v3/ipa_client.c
index 75b2824..d293a9d 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_client.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_client.c
@@ -1152,8 +1152,7 @@ int ipa3_request_gsi_channel(struct ipa_request_gsi_channel_params *params,
struct ipahal_reg_ep_cfg_status ep_status;
unsigned long gsi_dev_hdl;
enum gsi_status gsi_res;
- struct ipa_gsi_ep_config gsi_ep_cfg;
- struct ipa_gsi_ep_config *gsi_ep_cfg_ptr = &gsi_ep_cfg;
+ const struct ipa_gsi_ep_config *gsi_ep_cfg_ptr;
IPADBG("entry\n");
if (params == NULL || out_params == NULL ||
@@ -1227,8 +1226,7 @@ int ipa3_request_gsi_channel(struct ipa_request_gsi_channel_params *params,
goto write_evt_scratch_fail;
}
- memset(gsi_ep_cfg_ptr, 0, sizeof(struct ipa_gsi_ep_config));
- gsi_ep_cfg_ptr = ipa_get_gsi_ep_info(ipa_ep_idx);
+ gsi_ep_cfg_ptr = ipa3_get_gsi_ep_info(ep->client);
params->chan_params.evt_ring_hdl = ep->gsi_evt_ring_hdl;
params->chan_params.ch_id = gsi_ep_cfg_ptr->ipa_gsi_chan_num;
gsi_res = gsi_alloc_channel(¶ms->chan_params, gsi_dev_hdl,
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c b/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
index 34c7227..2bcc365 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
@@ -474,8 +474,7 @@ int ipa3_send(struct ipa3_sys_context *sys,
int fail_dma_wrap = 0;
uint size;
u32 mem_flag = GFP_ATOMIC;
- int ipa_ep_idx;
- struct ipa_gsi_ep_config *gsi_ep_cfg;
+ const struct ipa_gsi_ep_config *gsi_ep_cfg;
if (unlikely(!in_atomic))
mem_flag = GFP_KERNEL;
@@ -483,16 +482,10 @@ int ipa3_send(struct ipa3_sys_context *sys,
size = num_desc * sizeof(struct sps_iovec);
if (ipa3_ctx->transport_prototype == IPA_TRANSPORT_TYPE_GSI) {
- ipa_ep_idx = ipa3_get_ep_mapping(sys->ep->client);
- if (unlikely(ipa_ep_idx < 0)) {
- IPAERR("invalid ep_index of client = %d\n",
- sys->ep->client);
- return -EFAULT;
- }
- gsi_ep_cfg = ipa3_get_gsi_ep_info(ipa_ep_idx);
+ gsi_ep_cfg = ipa3_get_gsi_ep_info(sys->ep->client);
if (unlikely(!gsi_ep_cfg)) {
- IPAERR("failed to get gsi EP config of ep_idx=%d\n",
- ipa_ep_idx);
+ IPAERR("failed to get gsi EP config for client=%d\n",
+ sys->ep->client);
return -EFAULT;
}
if (unlikely(num_desc > gsi_ep_cfg->ipa_if_tlv)) {
@@ -1723,7 +1716,7 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb,
struct ipa3_sys_context *sys;
int src_ep_idx;
int num_frags, f;
- struct ipa_gsi_ep_config *gsi_ep;
+ const struct ipa_gsi_ep_config *gsi_ep;
if (unlikely(!ipa3_ctx)) {
IPAERR("IPA3 driver was not initialized\n");
@@ -1777,7 +1770,7 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb,
* 2 descriptors are needed for IP_PACKET_INIT and TAG_STATUS.
* 1 descriptor needed for the linear portion of skb.
*/
- gsi_ep = ipa3_get_gsi_ep_info(src_ep_idx);
+ gsi_ep = ipa3_get_gsi_ep_info(ipa3_ctx->ep[src_ep_idx].client);
if (gsi_ep && (num_frags + 3 > gsi_ep->ipa_if_tlv)) {
if (skb_linearize(skb)) {
IPAERR("Failed to linear skb with %d frags\n",
@@ -3958,7 +3951,7 @@ static int ipa_gsi_setup_channel(struct ipa_sys_connect_params *in,
struct gsi_evt_ring_props gsi_evt_ring_props;
struct gsi_chan_props gsi_channel_props;
union __packed gsi_channel_scratch ch_scratch;
- struct ipa_gsi_ep_config *gsi_ep_info;
+ const struct ipa_gsi_ep_config *gsi_ep_info;
dma_addr_t dma_addr;
dma_addr_t evt_dma_addr;
int result;
@@ -4021,9 +4014,10 @@ static int ipa_gsi_setup_channel(struct ipa_sys_connect_params *in,
gsi_channel_props.max_re_expected = ep->sys->rx_pool_sz;
}
- gsi_ep_info = ipa3_get_gsi_ep_info(ipa3_get_ep_mapping(ep->client));
+ gsi_ep_info = ipa3_get_gsi_ep_info(ep->client);
if (!gsi_ep_info) {
- IPAERR("Invalid ep number\n");
+ IPAERR("Failed getting GSI EP info for client=%d\n",
+ ep->client);
result = -EINVAL;
goto fail_get_gsi_ep_info;
} else
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_i.h b/drivers/platform/msm/ipa/ipa_v3/ipa_i.h
index acad448..9f5fa1b 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_i.h
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_i.h
@@ -1995,7 +1995,8 @@ int ipa3_uc_mhi_stop_event_update_channel(int channelHandle);
int ipa3_uc_mhi_print_stats(char *dbg_buff, int size);
int ipa3_uc_memcpy(phys_addr_t dest, phys_addr_t src, int len);
void ipa3_tag_destroy_imm(void *user1, int user2);
-struct ipa_gsi_ep_config *ipa3_get_gsi_ep_info(int ipa_ep_idx);
+const struct ipa_gsi_ep_config *ipa3_get_gsi_ep_info
+ (enum ipa_client_type client);
void ipa3_uc_rg10_write_reg(enum ipahal_reg_name reg, u32 n, u32 val);
u32 ipa3_get_num_pipes(void);
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c b/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c
index 9e2ffe7..77ddffa 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c
@@ -197,14 +197,14 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client,
struct gsi_chan_props ch_props;
union __packed gsi_channel_scratch ch_scratch;
struct ipa3_ep_context *ep;
- struct ipa_gsi_ep_config *ep_cfg;
+ const struct ipa_gsi_ep_config *ep_cfg;
IPA_MHI_FUNC_ENTRY();
ep = &ipa3_ctx->ep[ipa_ep_idx];
msi = params->msi;
- ep_cfg = ipa_get_gsi_ep_info(ipa_ep_idx);
+ ep_cfg = ipa3_get_gsi_ep_info(client);
if (!ep_cfg) {
IPA_MHI_ERR("Wrong parameter, ep_cfg is NULL\n");
return -EPERM;
@@ -332,7 +332,7 @@ int ipa3_mhi_init_engine(struct ipa_mhi_init_engine *params)
{
int res;
struct gsi_device_scratch gsi_scratch;
- struct ipa_gsi_ep_config *gsi_ep_info;
+ const struct ipa_gsi_ep_config *gsi_ep_info;
IPA_MHI_FUNC_ENTRY();
@@ -342,8 +342,7 @@ int ipa3_mhi_init_engine(struct ipa_mhi_init_engine *params)
}
/* Initialize IPA MHI engine */
- gsi_ep_info = ipa_get_gsi_ep_info(
- ipa_get_ep_mapping(IPA_CLIENT_MHI_PROD));
+ gsi_ep_info = ipa3_get_gsi_ep_info(IPA_CLIENT_MHI_PROD);
if (!gsi_ep_info) {
IPAERR("MHI PROD has no ep allocated\n");
ipa_assert();
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_uc.c b/drivers/platform/msm/ipa/ipa_v3/ipa_uc.c
index 6167301..352ed88 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_uc.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_uc.c
@@ -844,13 +844,14 @@ int ipa3_uc_reset_pipe(enum ipa_client_type ipa_client)
int ipa3_uc_is_gsi_channel_empty(enum ipa_client_type ipa_client)
{
- struct ipa_gsi_ep_config *gsi_ep_info;
+ const struct ipa_gsi_ep_config *gsi_ep_info;
union IpaHwChkChEmptyCmdData_t cmd;
int ret;
- gsi_ep_info = ipa3_get_gsi_ep_info(ipa3_get_ep_mapping(ipa_client));
+ gsi_ep_info = ipa3_get_gsi_ep_info(ipa_client);
if (!gsi_ep_info) {
- IPAERR("Invalid IPA ep index\n");
+ IPAERR("Failed getting GSI EP info for client=%d\n",
+ ipa_client);
return 0;
}
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
index 4c1f2b35..5f7b763 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
@@ -95,8 +95,9 @@
#define QMB_MASTER_SELECT_PCIE (1)
#define IPA_CLIENT_NOT_USED \
- {IPA_EP_NOT_ALLOCATED, IPA_EP_NOT_ALLOCATED, false, \
- IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR}
+ { IPA_EP_NOT_ALLOCATED, IPA_EP_NOT_ALLOCATED, false, \
+ IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, \
+ { -1, -1, -1, -1, -1 } }
/* Resource Group index*/
#define IPA_v3_0_GROUP_UL (0)
@@ -111,12 +112,12 @@
#define IPA_v3_0_GROUP_Q6ZIP_ENGINE IPA_v3_0_GROUP_UC_RX_Q
#define IPA_v3_0_GROUP_MAX (6)
-#define IPA_v3_5_1_GROUP_LWA_DL (0)
-#define IPA_v3_5_1_GROUP_UL_DL (1)
-#define IPA_v3_5_1_GROUP_DMA (2)
-#define IPA_v3_5_1_GROUP_UC_RX_Q (3)
-#define IPA_v3_5_1_SRC_GROUP_MAX (4)
-#define IPA_v3_5_1_DST_GROUP_MAX (3)
+#define IPA_v3_5_GROUP_LWA_DL (0)
+#define IPA_v3_5_GROUP_UL_DL (1)
+#define IPA_v3_5_GROUP_DMA (2)
+#define IPA_v3_5_GROUP_UC_RX_Q (3)
+#define IPA_v3_5_SRC_GROUP_MAX (4)
+#define IPA_v3_5_DST_GROUP_MAX (3)
#define IPA_GROUP_MAX IPA_v3_0_GROUP_MAX
@@ -131,12 +132,12 @@ enum ipa_rsrc_grp_type_src {
IPA_v3_0_RSRC_GRP_TYPE_SRC_ACK_ENTRIES,
IPA_v3_0_RSRC_GRP_TYPE_SRC_MAX,
- IPA_v3_5_1_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS = 0,
- IPA_v3_5_1_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS,
- IPA_v3_5_1_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF,
- IPA_v3_5_1_RSRC_GRP_TYPE_SRC_HPS_DMARS,
- IPA_v3_5_1_RSRC_GRP_TYPE_SRC_ACK_ENTRIES,
- IPA_v3_5_1_RSRC_GRP_TYPE_SRC_MAX
+ IPA_v3_5_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS = 0,
+ IPA_v3_5_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS,
+ IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF,
+ IPA_v3_5_RSRC_GRP_TYPE_SRC_HPS_DMARS,
+ IPA_v3_5_RSRC_GRP_TYPE_SRC_ACK_ENTRIES,
+ IPA_v3_5_RSRC_GRP_TYPE_SRC_MAX
};
#define IPA_RSRC_GRP_TYPE_SRC_MAX IPA_v3_0_RSRC_GRP_TYPE_SRC_MAX
@@ -147,9 +148,9 @@ enum ipa_rsrc_grp_type_dst {
IPA_v3_0_RSRC_GRP_TYPE_DST_DPS_DMARS,
IPA_v3_0_RSRC_GRP_TYPE_DST_MAX,
- IPA_v3_5_1_RSRC_GRP_TYPE_DST_DATA_SECTORS = 0,
- IPA_v3_5_1_RSRC_GRP_TYPE_DST_DPS_DMARS,
- IPA_v3_5_1_RSRC_GRP_TYPE_DST_MAX,
+ IPA_v3_5_RSRC_GRP_TYPE_DST_DATA_SECTORS = 0,
+ IPA_v3_5_RSRC_GRP_TYPE_DST_DPS_DMARS,
+ IPA_v3_5_RSRC_GRP_TYPE_DST_MAX,
};
#define IPA_RSRC_GRP_TYPE_DST_MAX IPA_v3_0_RSRC_GRP_TYPE_DST_MAX
@@ -192,15 +193,15 @@ static const struct rsrc_min_max ipa3_rsrc_src_grp_config
},
[IPA_3_5_1] = {
/* LWA_DL UL_DL not used UC_RX_Q, other are invalid */
- [IPA_v3_5_1_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {
{1, 255}, {1, 255}, {0, 0}, {1, 255}, {0, 0}, {0, 0} },
- [IPA_v3_5_1_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {
{10, 10}, {10, 10}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },
- [IPA_v3_5_1_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {
{12, 12}, {14, 14}, {0, 0}, {8, 8}, {0, 0}, {0, 0} },
- [IPA_v3_5_1_RSRC_GRP_TYPE_SRC_HPS_DMARS] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_SRC_HPS_DMARS] = {
{0, 255}, {0, 255}, {0, 255}, {0, 255}, {0, 0}, {0, 0} },
- [IPA_v3_5_1_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = {
{14, 14}, {20, 20}, {0, 0}, {14, 14}, {0, 0}, {0, 0} },
}
};
@@ -218,9 +219,9 @@ static const struct rsrc_min_max ipa3_rsrc_dst_grp_config
},
[IPA_3_5_1] = {
/*LWA_DL UL/DL/DPL not used, other are invalid */
- [IPA_v3_5_1_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {
{4, 4}, {4, 4}, {3, 3}, {0, 0}, {0, 0}, {0, 0} },
- [IPA_v3_5_1_RSRC_GRP_TYPE_DST_DPS_DMARS] = {
+ [IPA_v3_5_RSRC_GRP_TYPE_DST_DPS_DMARS] = {
{2, 255}, {1, 255}, {1, 2}, {0, 0}, {0, 0}, {0, 0} },
}
};
@@ -238,12 +239,19 @@ static const struct rsrc_min_max ipa3_rsrc_rx_grp_config
},
};
+enum ipa_ees {
+ IPA_EE_AP = 0,
+ IPA_EE_Q6 = 1,
+ IPA_EE_UC = 3,
+};
+
struct ipa_ep_configuration {
int pipe_num;
int group_num;
bool support_flt;
int sequencer_type;
u8 qmb_master_sel;
+ struct ipa_gsi_ep_config ipa_gsi_ep_info;
};
static const struct ipa_ep_configuration ipa3_ep_mapping
@@ -252,7 +260,8 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
[IPA_3_0][IPA_CLIENT_WLAN1_PROD] = {
10, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 10, 1, 8, 16, IPA_EE_UC } },
[IPA_3_0][IPA_CLIENT_HSIC2_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_USB2_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_HSIC3_PROD] = IPA_CLIENT_NOT_USED,
@@ -263,188 +272,227 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
[IPA_3_0][IPA_CLIENT_USB_PROD] = {
1, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_UC_USB_PROD] = {
- 2, IPA_v3_0_GROUP_UL, true,
- IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 1, 3, 8, 16, IPA_EE_AP } },
+ [IPA_3_0][IPA_CLIENT_UC_USB_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_A5_WLAN_AMPDU_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_A2_EMBEDDED_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_A2_TETHERED_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_APPS_LAN_WAN_PROD] = {
14, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_APPS_CMD_PROD]
- = {22, IPA_v3_0_GROUP_IMM_CMD, false,
+ QMB_MASTER_SELECT_DDR,
+ { 14, 11, 8, 16, IPA_EE_AP } },
+ [IPA_3_0][IPA_CLIENT_APPS_CMD_PROD] = {
+ 22, IPA_v3_0_GROUP_IMM_CMD, false,
IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 22, 6, 18, 28, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_ODU_PROD] = {
12, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 12, 9, 8, 16, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_MHI_PROD] = {
0, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_PCIE},
+ QMB_MASTER_SELECT_PCIE,
+ { 0, 0, 8, 16, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_Q6_LAN_PROD] = {
9, IPA_v3_0_GROUP_UL, false,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 9, 4, 8, 12, IPA_EE_Q6 } },
[IPA_3_0][IPA_CLIENT_Q6_WAN_PROD] = {
- 5, IPA_v3_0_GROUP_DL,
- true, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_Q6_CMD_PROD]
- = {6, IPA_v3_0_GROUP_IMM_CMD, false,
+ 5, IPA_v3_0_GROUP_DL, true,
IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_Q6_DECOMP_PROD] = {7, IPA_v3_0_GROUP_Q6ZIP,
+ QMB_MASTER_SELECT_DDR,
+ { 5, 0, 16, 32, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_Q6_CMD_PROD] = {
+ 6, IPA_v3_0_GROUP_IMM_CMD, false,
+ IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
+ QMB_MASTER_SELECT_DDR,
+ { 6, 1, 18, 28, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_Q6_DECOMP_PROD] = {
+ 7, IPA_v3_0_GROUP_Q6ZIP,
false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_Q6_DECOMP2_PROD] = {8, IPA_v3_0_GROUP_Q6ZIP,
+ QMB_MASTER_SELECT_DDR,
+ { 7, 2, 0, 0, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_Q6_DECOMP2_PROD] = {
+ 8, IPA_v3_0_GROUP_Q6ZIP,
false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_SYNC_PROD]
- = {12, IPA_v3_0_GROUP_DMA, false,
+ QMB_MASTER_SELECT_DDR,
+ { 8, 3, 0, 0, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_SYNC_PROD] = {
+ 12, IPA_v3_0_GROUP_DMA, false,
IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,
- QMB_MASTER_SELECT_PCIE},
- [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD]
- = {13, IPA_v3_0_GROUP_DMA, false,
+ QMB_MASTER_SELECT_PCIE,
+ { 12, 9, 8, 16, IPA_EE_AP } },
+ [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD] = {
+ 13, IPA_v3_0_GROUP_DMA, false,
IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,
- QMB_MASTER_SELECT_PCIE},
+ QMB_MASTER_SELECT_PCIE,
+ { 13, 10, 8, 16, IPA_EE_AP } },
/* Only for test purpose */
[IPA_3_0][IPA_CLIENT_TEST_PROD] = {
1, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 1, 3, 8, 16, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST1_PROD] = {
1, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 1, 3, 8, 16, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST2_PROD] = {
3, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 3, 5, 16, 32, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST3_PROD] = {
12, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 12, 9, 8, 16, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST4_PROD] = {
13, IPA_v3_0_GROUP_UL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 13, 10, 8, 16, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_HSIC1_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_WLAN1_CONS] = {
25, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 25, 4, 8, 8, IPA_EE_UC } },
[IPA_3_0][IPA_CLIENT_HSIC2_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_USB2_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_WLAN2_CONS] = {
27, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 27, 4, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_HSIC3_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_USB3_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_WLAN3_CONS] = {
28, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 28, 13, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_HSIC4_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_USB4_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_WLAN4_CONS] = {
29, IPA_v3_0_GROUP_DL, false,
- IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ IPA_DPS_HPS_SEQ_TYPE_INVALID,
+ QMB_MASTER_SELECT_DDR,
+ { 29, 14, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_HSIC5_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_USB_CONS] = {
26, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 26, 12, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_USB_DPL_CONS] = {
17, IPA_v3_0_GROUP_DPL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 17, 2, 8, 12, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_A2_EMBEDDED_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_A2_TETHERED_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_A5_LAN_WAN_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_APPS_LAN_CONS] = {
15, IPA_v3_0_GROUP_UL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 15, 7, 8, 12, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_APPS_WAN_CONS] = {
16, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 16, 8, 8, 12, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_ODU_EMB_CONS] = {
23, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 23, 1, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_ODU_TETH_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_0][IPA_CLIENT_MHI_CONS] = {
23, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_PCIE},
+ QMB_MASTER_SELECT_PCIE,
+ { 23, 1, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_Q6_LAN_CONS] = {
19, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 19, 6, 8, 12, IPA_EE_Q6 } },
[IPA_3_0][IPA_CLIENT_Q6_WAN_CONS] = {
18, IPA_v3_0_GROUP_UL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 18, 5, 8, 12, IPA_EE_Q6 } },
[IPA_3_0][IPA_CLIENT_Q6_DUN_CONS] = {
- 30, IPA_v3_0_GROUP_DIAG,
- false, IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_Q6_DECOMP_CONS]
- = {21, IPA_v3_0_GROUP_Q6ZIP, false,
+ 30, IPA_v3_0_GROUP_DIAG, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_Q6_DECOMP2_CONS]
- = {4, IPA_v3_0_GROUP_Q6ZIP, false,
+ QMB_MASTER_SELECT_DDR,
+ { 30, 7, 4, 4, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_Q6_DECOMP_CONS] = {
+ 21, IPA_v3_0_GROUP_Q6ZIP, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS]
- = {28, IPA_v3_0_GROUP_DMA, false,
+ QMB_MASTER_SELECT_DDR,
+ { 21, 8, 4, 4, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_Q6_DECOMP2_CONS] = {
+ 4, IPA_v3_0_GROUP_Q6ZIP, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_PCIE},
- [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS]
- = {29, IPA_v3_0_GROUP_DMA, false,
+ QMB_MASTER_SELECT_DDR,
+ { 4, 9, 4, 4, IPA_EE_Q6 } },
+ [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS] = {
+ 28, IPA_v3_0_GROUP_DMA, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_PCIE},
+ QMB_MASTER_SELECT_PCIE,
+ { 28, 13, 8, 8, IPA_EE_AP } },
+ [IPA_3_0][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS] = {
+ 29, IPA_v3_0_GROUP_DMA, false,
+ IPA_DPS_HPS_SEQ_TYPE_INVALID,
+ QMB_MASTER_SELECT_PCIE,
+ { 29, 14, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS] = IPA_CLIENT_NOT_USED,
/* Only for test purpose */
[IPA_3_0][IPA_CLIENT_TEST_CONS] = {
26, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 26, 12, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST1_CONS] = {
26, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 26, 12, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST2_CONS] = {
27, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 27, 4, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST3_CONS] = {
28, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 28, 13, 8, 8, IPA_EE_AP } },
[IPA_3_0][IPA_CLIENT_TEST4_CONS] = {
29, IPA_v3_0_GROUP_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 29, 14, 8, 8, IPA_EE_AP } },
+
/* IPA_3_5_1 */
[IPA_3_5_1][IPA_CLIENT_HSIC1_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_WLAN1_PROD] = {
- 7, IPA_v3_5_1_GROUP_UL_DL,
- true,
+ 7, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 7, 1, 8, 16, IPA_EE_UC } },
[IPA_3_5_1][IPA_CLIENT_HSIC2_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_USB2_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_HSIC3_PROD] = IPA_CLIENT_NOT_USED,
@@ -453,244 +501,169 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
[IPA_3_5_1][IPA_CLIENT_USB4_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_HSIC5_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_USB_PROD] = {
- 0, IPA_v3_5_1_GROUP_UL_DL,
- true,
+ 0, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 0, 0, 8, 16, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_UC_USB_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_A5_WLAN_AMPDU_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_A2_EMBEDDED_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_A2_TETHERED_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_APPS_LAN_WAN_PROD] = {
- 8, IPA_v3_5_1_GROUP_UL_DL,
- true,
+ 8, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 8, 7, 8, 16, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_APPS_CMD_PROD] = {
- 5, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 5, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 5, 4, 20, 23, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_ODU_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_MHI_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_Q6_LAN_PROD] = {
- 3, IPA_v3_5_1_GROUP_UL_DL,
- true, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR },
- [IPA_3_5_1][IPA_CLIENT_Q6_WAN_PROD] = {
- 6, IPA_v3_5_1_GROUP_UL_DL,
- true, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_5_1][IPA_CLIENT_Q6_CMD_PROD]
- = {4, IPA_v3_5_1_GROUP_UL_DL, false,
+ 3, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 3, 0, 16, 32, IPA_EE_Q6 } },
+ [IPA_3_5_1][IPA_CLIENT_Q6_WAN_PROD] = {
+ 6, IPA_v3_5_GROUP_UL_DL, true,
+ IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
+ QMB_MASTER_SELECT_DDR,
+ { 6, 4, 12, 30, IPA_EE_Q6 } },
+ [IPA_3_5_1][IPA_CLIENT_Q6_CMD_PROD] = {
+ 4, IPA_v3_5_GROUP_UL_DL, false,
+ IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
+ QMB_MASTER_SELECT_DDR,
+ { 4, 1, 20, 23, IPA_EE_Q6 } },
[IPA_3_5_1][IPA_CLIENT_Q6_DECOMP_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_Q6_DECOMP2_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_MEMCPY_DMA_SYNC_PROD] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD] = IPA_CLIENT_NOT_USED,
/* Only for test purpose */
[IPA_3_5_1][IPA_CLIENT_TEST_PROD] = {
- 0, IPA_v3_5_1_GROUP_UL_DL, true,
+ 0, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 0, 0, 8, 16, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST1_PROD] = {
- 0, IPA_v3_5_1_GROUP_UL_DL, true,
+ 0, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 0, 0, 8, 16, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST2_PROD] = {
- 2, IPA_v3_5_1_GROUP_UL_DL, true,
+ 2, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 2, 3, 16, 32, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST3_PROD] = {
- 4, IPA_v3_5_1_GROUP_UL_DL, true,
+ 4, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 4, 1, 20, 23, IPA_EE_Q6 } },
[IPA_3_5_1][IPA_CLIENT_TEST4_PROD] = {
- 1, IPA_v3_5_1_GROUP_UL_DL, true,
+ 1, IPA_v3_5_GROUP_UL_DL, true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 1, 0, 8, 16, IPA_EE_UC } },
[IPA_3_5_1][IPA_CLIENT_HSIC1_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_WLAN1_CONS] = {
- 16, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 16, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 16, 3, 8, 8, IPA_EE_UC } },
[IPA_3_5_1][IPA_CLIENT_HSIC2_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_USB2_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_WLAN2_CONS] = {
- 18, IPA_v3_5_1_GROUP_UL_DL, false,
+ 18, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 18, 9, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_HSIC3_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_USB3_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_WLAN3_CONS] = {
- 19, IPA_v3_5_1_GROUP_UL_DL, false,
+ 19, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 19, 10, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_HSIC4_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_USB4_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_WLAN4_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_HSIC5_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_USB_CONS] = {
- 17, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 17, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 17, 8, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_USB_DPL_CONS] = {
- 11, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 11, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 11, 2, 4, 6, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_A2_EMBEDDED_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_A2_TETHERED_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_A5_LAN_WAN_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_APPS_LAN_CONS] = {
- 9, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 9, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 9, 5, 8, 12, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_APPS_WAN_CONS] = {
- 10, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 10, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 10, 6, 8, 12, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_ODU_EMB_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_ODU_TETH_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_MHI_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_Q6_LAN_CONS] = {
- 13, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 13, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 13, 3, 8, 12, IPA_EE_Q6 } },
[IPA_3_5_1][IPA_CLIENT_Q6_WAN_CONS] = {
- 12, IPA_v3_5_1_GROUP_UL_DL,
- false,
+ 12, IPA_v3_5_GROUP_UL_DL, false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
- [IPA_3_5_1][IPA_CLIENT_Q6_DUN_CONS] = IPA_CLIENT_NOT_USED,
- [IPA_3_5_1][IPA_CLIENT_Q6_DECOMP_CONS] = IPA_CLIENT_NOT_USED,
- [IPA_3_5_1][IPA_CLIENT_Q6_DECOMP2_CONS] = IPA_CLIENT_NOT_USED,
- [IPA_3_5_1][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS] = IPA_CLIENT_NOT_USED,
+ QMB_MASTER_SELECT_DDR,
+ { 12, 2, 8, 12, IPA_EE_Q6 } },
+ [IPA_3_5_1][IPA_CLIENT_Q6_DUN_CONS] = IPA_CLIENT_NOT_USED,
+ [IPA_3_5_1][IPA_CLIENT_Q6_DECOMP_CONS] = IPA_CLIENT_NOT_USED,
+ [IPA_3_5_1][IPA_CLIENT_Q6_DECOMP2_CONS] = IPA_CLIENT_NOT_USED,
+ [IPA_3_5_1][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS] = IPA_CLIENT_NOT_USED,
[IPA_3_5_1][IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS] = IPA_CLIENT_NOT_USED,
/* Only for test purpose */
[IPA_3_5_1][IPA_CLIENT_TEST_CONS] = {
- 17, IPA_v3_5_1_GROUP_UL_DL,
+ 17, IPA_v3_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 17, 8, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST1_CONS] = {
- 17, IPA_v3_5_1_GROUP_UL_DL,
+ 17, IPA_v3_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 17, 8, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST2_CONS] = {
- 18, IPA_v3_5_1_GROUP_UL_DL,
+ 18, IPA_v3_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 18, 9, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST3_CONS] = {
- 19, IPA_v3_5_1_GROUP_UL_DL,
+ 19, IPA_v3_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
+ QMB_MASTER_SELECT_DDR,
+ { 19, 10, 8, 8, IPA_EE_AP } },
[IPA_3_5_1][IPA_CLIENT_TEST4_CONS] = {
- 11, IPA_v3_5_1_GROUP_UL_DL,
+ 11, IPA_v3_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
- QMB_MASTER_SELECT_DDR},
-};
-
-enum ipa_ees {
- IPA_EE_AP = 0,
- IPA_EE_Q6 = 1,
- IPA_EE_UC = 3,
-};
-
-static struct ipa_gsi_ep_config
- ipa_gsi_ep_info[IPA_VER_MAX][IPA3_MAX_NUM_PIPES] = {
- /* IPA_3_0 - valid also for IPAv3.1 */
- [IPA_3_0] = {
- /* {ipa_ep_num, ipa_gsi_chan_num, ipa_if_tlv, ipa_if_aos, ee} */
- {0, 0, 8, 16, IPA_EE_AP},
- {1, 3, 8, 16, IPA_EE_AP},
- {3, 5, 16, 32, IPA_EE_AP},
- {4, 9, 4, 4, IPA_EE_Q6},
- {5, 0, 16, 32, IPA_EE_Q6},
- {6, 1, 18, 28, IPA_EE_Q6},
- {7, 2, 0, 0, IPA_EE_Q6},
- {8, 3, 0, 0, IPA_EE_Q6},
- {9, 4, 8, 12, IPA_EE_Q6},
- {10, 1, 8, 16, IPA_EE_UC},
- {12, 9, 8, 16, IPA_EE_AP},
- {13, 10, 8, 16, IPA_EE_AP},
- {14, 11, 8, 16, IPA_EE_AP},
- {15, 7, 8, 12, IPA_EE_AP},
- {16, 8, 8, 12, IPA_EE_AP},
- {17, 2, 8, 12, IPA_EE_AP},
- {18, 5, 8, 12, IPA_EE_Q6},
- {19, 6, 8, 12, IPA_EE_Q6},
- {21, 8, 4, 4, IPA_EE_Q6},
- {22, 6, 18, 28, IPA_EE_AP},
- {23, 1, 8, 8, IPA_EE_AP},
- {25, 4, 8, 8, IPA_EE_UC},
- {26, 12, 8, 8, IPA_EE_AP},
- {27, 4, 8, 8, IPA_EE_AP},
- {28, 13, 8, 8, IPA_EE_AP},
- {29, 14, 8, 8, IPA_EE_AP},
- {30, 7, 4, 4, IPA_EE_Q6},
- {-1, -1, -1, -1, -1}
- },
- [IPA_3_5] = {
- /* {ipa_ep_num, ipa_gsi_chan_num, ipa_if_tlv, ipa_if_aos, ee} */
- {0, 7, 8, 16, IPA_EE_AP},
- {1, 0, 8, 16, IPA_EE_UC},
- {2, 3, 16, 32, IPA_EE_AP},
- {3, 0, 16, 32, IPA_EE_Q6},
- {4, 1, 20, 23, IPA_EE_Q6},
- {5, 4, 20, 23, IPA_EE_AP},
- {6, 4, 12, 30, IPA_EE_Q6},
- {7, 1, 8, 16, IPA_EE_UC},
- {8, 9, 8, 16, IPA_EE_AP},
- {9, 5, 8, 12, IPA_EE_AP},
- {10, 6, 8, 12, IPA_EE_AP},
- {11, 2, 4, 6, IPA_EE_AP},
- {12, 2, 8, 12, IPA_EE_Q6},
- {13, 3, 8, 12, IPA_EE_Q6},
- {14, 10, 4, 6, IPA_EE_AP},
- {15, 2, 8, 8, IPA_EE_UC},
- {16, 3, 8, 8, IPA_EE_UC},
- {17, 11, 8, 8, IPA_EE_AP},
- {18, 12, 8, 8, IPA_EE_AP},
- {19, 13, 8, 8, IPA_EE_AP},
- {-1, -1, -1, -1, -1}
- },
- [IPA_3_5_1] = {
- /* {ipa_ep_num, ipa_gsi_chan_num, ipa_if_tlv, ipa_if_aos, ee} */
- {0, 0, 8, 16, IPA_EE_AP},
- {1, 0, 8, 16, IPA_EE_UC},
- {2, 3, 16, 32, IPA_EE_AP},
- {3, 0, 16, 32, IPA_EE_Q6},
- {4, 1, 20, 23, IPA_EE_Q6},
- {5, 4, 20, 23, IPA_EE_AP},
- {6, 4, 12, 30, IPA_EE_Q6},
- {7, 1, 8, 16, IPA_EE_UC},
- {8, 7, 8, 16, IPA_EE_AP},
- {9, 5, 8, 12, IPA_EE_AP},
- {10, 6, 8, 12, IPA_EE_AP},
- {11, 2, 4, 6, IPA_EE_AP},
- {12, 2, 8, 12, IPA_EE_Q6},
- {13, 3, 8, 12, IPA_EE_Q6},
- {14, 5, 8, 8, IPA_EE_Q6},
- {15, 2, 8, 8, IPA_EE_UC},
- {16, 3, 8, 8, IPA_EE_UC},
- {17, 8, 8, 8, IPA_EE_AP},
- {18, 9, 8, 8, IPA_EE_AP},
- {19, 10, 8, 8, IPA_EE_AP},
- {-1, -1, -1, -1, -1}
- },
+ QMB_MASTER_SELECT_DDR,
+ { 11, 2, 4, 6, IPA_EE_AP } },
};
static struct msm_bus_vectors ipa_init_vectors_v3_0[] = {
@@ -1253,27 +1226,20 @@ int ipa3_get_ep_mapping(enum ipa_client_type client)
/**
* ipa3_get_gsi_ep_info() - provide gsi ep information
- * @ipa_ep_idx: IPA endpoint index
+ * @client: IPA client value
*
* Return value: pointer to ipa_gsi_ep_info
*/
-struct ipa_gsi_ep_config *ipa3_get_gsi_ep_info(int ipa_ep_idx)
+const struct ipa_gsi_ep_config *ipa3_get_gsi_ep_info
+ (enum ipa_client_type client)
{
- int i;
- u8 hw_index;
-
- hw_index = ipa3_get_hw_type_index();
-
- for (i = 0; ; i++) {
- if (ipa_gsi_ep_info[hw_index][i].ipa_ep_num < 0)
- break;
-
- if (ipa_gsi_ep_info[hw_index][i].ipa_ep_num ==
- ipa_ep_idx)
- return &(ipa_gsi_ep_info[hw_index][i]);
+ if (client >= IPA_CLIENT_MAX || client < 0) {
+ IPAERR("Bad client number! client =%d\n", client);
+ return NULL;
}
- return NULL;
+ return &(ipa3_ep_mapping[ipa3_get_hw_type_index()]
+ [client].ipa_gsi_ep_info);
}
/**
@@ -3633,14 +3599,14 @@ static void ipa3_write_rsrc_grp_type_reg(int group_index,
case IPA_3_5_1:
if (src) {
switch (group_index) {
- case IPA_v3_5_1_GROUP_LWA_DL:
- case IPA_v3_5_1_GROUP_UL_DL:
+ case IPA_v3_5_GROUP_LWA_DL:
+ case IPA_v3_5_GROUP_UL_DL:
ipahal_write_reg_n_fields(
IPA_SRC_RSRC_GRP_01_RSRC_TYPE_n,
n, val);
break;
- case IPA_v3_5_1_GROUP_DMA:
- case IPA_v3_5_1_GROUP_UC_RX_Q:
+ case IPA_v3_5_GROUP_DMA:
+ case IPA_v3_5_GROUP_UC_RX_Q:
ipahal_write_reg_n_fields(
IPA_SRC_RSRC_GRP_23_RSRC_TYPE_n,
n, val);
@@ -3653,13 +3619,13 @@ static void ipa3_write_rsrc_grp_type_reg(int group_index,
}
} else {
switch (group_index) {
- case IPA_v3_5_1_GROUP_LWA_DL:
- case IPA_v3_5_1_GROUP_UL_DL:
+ case IPA_v3_5_GROUP_LWA_DL:
+ case IPA_v3_5_GROUP_UL_DL:
ipahal_write_reg_n_fields(
IPA_DST_RSRC_GRP_01_RSRC_TYPE_n,
n, val);
break;
- case IPA_v3_5_1_GROUP_DMA:
+ case IPA_v3_5_GROUP_DMA:
ipahal_write_reg_n_fields(
IPA_DST_RSRC_GRP_23_RSRC_TYPE_n,
n, val);
@@ -3739,10 +3705,10 @@ void ipa3_set_resorce_groups_min_max_limits(void)
dst_grp_idx_max = IPA_v3_0_GROUP_MAX;
break;
case IPA_3_5_1:
- src_rsrc_type_max = IPA_v3_5_1_RSRC_GRP_TYPE_SRC_MAX;
- dst_rsrc_type_max = IPA_v3_5_1_RSRC_GRP_TYPE_DST_MAX;
- src_grp_idx_max = IPA_v3_5_1_SRC_GROUP_MAX;
- dst_grp_idx_max = IPA_v3_5_1_DST_GROUP_MAX;
+ src_rsrc_type_max = IPA_v3_5_RSRC_GRP_TYPE_SRC_MAX;
+ dst_rsrc_type_max = IPA_v3_5_RSRC_GRP_TYPE_DST_MAX;
+ src_grp_idx_max = IPA_v3_5_SRC_GROUP_MAX;
+ dst_grp_idx_max = IPA_v3_5_DST_GROUP_MAX;
break;
default:
IPAERR("invalid hw type index\n");
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c
index 67b3cb3..053a581 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2553,16 +2553,19 @@ u32 ipahal_get_low_rule_id(void)
* @hash_hdr_size: SRAM buf size of the hash tbls hdr. Used for space check
* @nhash_hdr_size: SRAM buf size of the nhash tbls hdr. Used for space check
* @mem: mem object that points to DMA mem representing the hdr structure
+ * @atomic: should DMA allocation be executed with atomic flag
*/
int ipahal_rt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
- u32 nhash_hdr_size, struct ipa_mem_buffer *mem)
+ u32 nhash_hdr_size, struct ipa_mem_buffer *mem, bool atomic)
{
int i;
u64 addr;
struct ipahal_fltrt_obj *obj;
+ int flag;
IPAHAL_DBG("Entry\n");
+ flag = atomic ? GFP_ATOMIC : GFP_KERNEL;
obj = &ipahal_fltrt_objs[ipahal_ctx->hw_type];
if (!tbls_num || !nhash_hdr_size || !mem) {
@@ -2589,7 +2592,7 @@ int ipahal_rt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
mem->size = tbls_num * obj->tbl_hdr_width;
mem->base = dma_alloc_coherent(ipahal_ctx->ipa_pdev, mem->size,
- &mem->phys_base, GFP_KERNEL);
+ &mem->phys_base, flag);
if (!mem->base) {
IPAHAL_ERR("fail to alloc DMA buff of size %d\n", mem->size);
return -ENOMEM;
@@ -2615,18 +2618,22 @@ int ipahal_rt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
* should be: bit0->EP0, bit1->EP1
* If bitmap is zero -> create tbl without bitmap entry
* @mem: mem object that points to DMA mem representing the hdr structure
+ * @atomic: should DMA allocation be executed with atomic flag
*/
int ipahal_flt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
- u32 nhash_hdr_size, u64 ep_bitmap, struct ipa_mem_buffer *mem)
+ u32 nhash_hdr_size, u64 ep_bitmap, struct ipa_mem_buffer *mem,
+ bool atomic)
{
int flt_spc;
u64 flt_bitmap;
int i;
u64 addr;
struct ipahal_fltrt_obj *obj;
+ int flag;
IPAHAL_DBG("Entry - ep_bitmap 0x%llx\n", ep_bitmap);
+ flag = atomic ? GFP_ATOMIC : GFP_KERNEL;
obj = &ipahal_fltrt_objs[ipahal_ctx->hw_type];
if (!tbls_num || !nhash_hdr_size || !mem) {
@@ -2667,7 +2674,7 @@ int ipahal_flt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
if (ep_bitmap)
mem->size += obj->tbl_hdr_width;
mem->base = dma_alloc_coherent(ipahal_ctx->ipa_pdev, mem->size,
- &mem->phys_base, GFP_KERNEL);
+ &mem->phys_base, flag);
if (!mem->base) {
IPAHAL_ERR("fail to alloc DMA buff of size %d\n", mem->size);
return -ENOMEM;
@@ -2721,7 +2728,7 @@ static int ipa_fltrt_alloc_init_tbl_hdr(
params->nhash_hdr.base = dma_alloc_coherent(ipahal_ctx->ipa_pdev,
params->nhash_hdr.size,
¶ms->nhash_hdr.phys_base, GFP_KERNEL);
- if (!params->nhash_hdr.size) {
+ if (!params->nhash_hdr.base) {
IPAHAL_ERR("fail to alloc DMA buff of size %d\n",
params->nhash_hdr.size);
goto nhash_alloc_fail;
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.h b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.h
index ee2704d6..3ee883b 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.h
+++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -171,9 +171,10 @@ u32 ipahal_get_low_rule_id(void);
* @hash_hdr_size: SRAM buf size of the hash tbls hdr. Used for space check
* @nhash_hdr_size: SRAM buf size of the nhash tbls hdr. Used for space check
* @mem: mem object that points to DMA mem representing the hdr structure
+ * @atomic: should DMA allocation be executed with atomic flag
*/
int ipahal_rt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
- u32 nhash_hdr_size, struct ipa_mem_buffer *mem);
+ u32 nhash_hdr_size, struct ipa_mem_buffer *mem, bool atomic);
/*
* ipahal_flt_generate_empty_img() - Generate empty filter image
@@ -185,9 +186,11 @@ int ipahal_rt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
* @ep_bitmap: Bitmap representing the EP that has flt tables. The format
* should be: bit0->EP0, bit1->EP1
* @mem: mem object that points to DMA mem representing the hdr structure
+ * @atomic: should DMA allocation be executed with atomic flag
*/
int ipahal_flt_generate_empty_img(u32 tbls_num, u32 hash_hdr_size,
- u32 nhash_hdr_size, u64 ep_bitmap, struct ipa_mem_buffer *mem);
+ u32 nhash_hdr_size, u64 ep_bitmap, struct ipa_mem_buffer *mem,
+ bool atomic);
/*
* ipahal_fltrt_allocate_hw_tbl_imgs() - Allocate tbl images DMA structures
diff --git a/drivers/platform/msm/ipa/test/Makefile b/drivers/platform/msm/ipa/test/Makefile
index e1686e6..c20fd2b 100644
--- a/drivers/platform/msm/ipa/test/Makefile
+++ b/drivers/platform/msm/ipa/test/Makefile
@@ -1,2 +1,2 @@
obj-$(CONFIG_IPA_UT) += ipa_ut_mod.o
-ipa_ut_mod-y := ipa_ut_framework.o ipa_test_example.o ipa_test_mhi.o
+ipa_ut_mod-y := ipa_ut_framework.o ipa_test_example.o ipa_test_mhi.o ipa_test_dma.o
diff --git a/drivers/platform/msm/ipa/test/ipa_test_dma.c b/drivers/platform/msm/ipa/test/ipa_test_dma.c
new file mode 100644
index 0000000..78393a3
--- /dev/null
+++ b/drivers/platform/msm/ipa/test/ipa_test_dma.c
@@ -0,0 +1,931 @@
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/ipa.h>
+#include "../ipa_v3/ipa_i.h"
+#include "ipa_ut_framework.h"
+
+#define IPA_TEST_DMA_WQ_NAME_BUFF_SZ 64
+#define IPA_TEST_DMA_MT_TEST_NUM_WQ 500
+#define IPA_TEST_DMA_MEMCPY_BUFF_SIZE 16384
+#define IPA_TEST_DMA_MAX_PKT_SIZE 0xFF00
+#define IPA_DMA_TEST_LOOP_NUM 1000
+#define IPA_DMA_TEST_INT_LOOP_NUM 50
+#define IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM 128
+#define IPA_DMA_RUN_TEST_UNIT_IN_LOOP(test_unit, iters, rc, args...) \
+ do { \
+ int __i; \
+ for (__i = 0; __i < iters; __i++) { \
+ IPA_UT_LOG(#test_unit " START iter %d\n", __i); \
+ rc = test_unit(args); \
+ if (!rc) \
+ continue; \
+ IPA_UT_LOG(#test_unit " failed %d\n", rc); \
+ break; \
+ } \
+ } while (0)
+
+/**
+ * struct ipa_test_dma_async_user_data - user_data structure for async memcpy
+ * @src_mem: source memory buffer
+ * @dest_mem: destination memory buffer
+ * @call_serial_number: Id of the caller
+ * @copy_done: Completion object
+ */
+struct ipa_test_dma_async_user_data {
+ struct ipa_mem_buffer src_mem;
+ struct ipa_mem_buffer dest_mem;
+ int call_serial_number;
+ struct completion copy_done;
+};
+
+/**
+ * ipa_test_dma_setup() - Suite setup function
+ */
+static int ipa_test_dma_setup(void **ppriv)
+{
+ int rc;
+
+ IPA_UT_DBG("Start Setup\n");
+
+ if (!ipa3_ctx) {
+ IPA_UT_ERR("No IPA ctx\n");
+ return -EINVAL;
+ }
+
+ rc = ipa_dma_init();
+ if (rc)
+ IPA_UT_ERR("Fail to init ipa_dma - return code %d\n", rc);
+ else
+ IPA_UT_DBG("ipa_dma_init() Completed successfully!\n");
+
+ *ppriv = NULL;
+
+ return rc;
+}
+
+/**
+ * ipa_test_dma_teardown() - Suite teardown function
+ */
+static int ipa_test_dma_teardown(void *priv)
+{
+ IPA_UT_DBG("Start Teardown\n");
+ ipa_dma_destroy();
+ return 0;
+}
+
+static int ipa_test_dma_alloc_buffs(struct ipa_mem_buffer *src,
+ struct ipa_mem_buffer *dest,
+ int size)
+{
+ int i;
+ static int val = 1;
+ int rc;
+
+ val++;
+ src->size = size;
+ src->base = dma_alloc_coherent(ipa3_ctx->pdev, src->size,
+ &src->phys_base, GFP_KERNEL);
+ if (!src->base) {
+ IPA_UT_LOG("fail to alloc dma mem %d bytes\n", size);
+ IPA_UT_TEST_FAIL_REPORT("fail to alloc dma mem");
+ return -ENOMEM;
+ }
+
+ dest->size = size;
+ dest->base = dma_alloc_coherent(ipa3_ctx->pdev, dest->size,
+ &dest->phys_base, GFP_KERNEL);
+ if (!dest->base) {
+ IPA_UT_LOG("fail to alloc dma mem %d bytes\n", size);
+ IPA_UT_TEST_FAIL_REPORT("fail to alloc dma mem");
+ rc = -ENOMEM;
+ goto fail_alloc_dest;
+ }
+
+ memset(dest->base, 0, dest->size);
+ for (i = 0; i < src->size; i++)
+ memset(src->base + i, (val + i) & 0xFF, 1);
+ rc = memcmp(dest->base, src->base, dest->size);
+ if (rc == 0) {
+ IPA_UT_LOG("dest & src buffers are equal\n");
+ IPA_UT_TEST_FAIL_REPORT("dest & src buffers are equal");
+ rc = -EFAULT;
+ goto fail_buf_cmp;
+ }
+
+ return 0;
+
+fail_buf_cmp:
+ dma_free_coherent(ipa3_ctx->pdev, dest->size, dest->base,
+ dest->phys_base);
+fail_alloc_dest:
+ dma_free_coherent(ipa3_ctx->pdev, src->size, src->base,
+ src->phys_base);
+ return rc;
+}
+
+static void ipa_test_dma_destroy_buffs(struct ipa_mem_buffer *src,
+ struct ipa_mem_buffer *dest)
+{
+ dma_free_coherent(ipa3_ctx->pdev, src->size, src->base,
+ src->phys_base);
+ dma_free_coherent(ipa3_ctx->pdev, dest->size, dest->base,
+ dest->phys_base);
+}
+
+/**
+ * ipa_test_dma_memcpy_sync() - memcpy in sync mode
+ *
+ * @size: buffer size
+ * @expect_fail: test expects the memcpy to fail
+ *
+ * To be run during tests
+ * 1. Alloc src and dst buffers
+ * 2. sync memcpy src to dst via dma
+ * 3. compare src and dts if memcpy succeeded as expected
+ */
+static int ipa_test_dma_memcpy_sync(int size, bool expect_fail)
+{
+ int rc = 0;
+ int i;
+ struct ipa_mem_buffer src_mem;
+ struct ipa_mem_buffer dest_mem;
+ u8 *src;
+ u8 *dest;
+
+ rc = ipa_test_dma_alloc_buffs(&src_mem, &dest_mem, size);
+ if (rc) {
+ IPA_UT_LOG("fail to alloc buffers\n");
+ IPA_UT_TEST_FAIL_REPORT("fail to alloc buffers");
+ return rc;
+ }
+
+ rc = ipa_dma_sync_memcpy(dest_mem.phys_base, src_mem.phys_base, size);
+ if (!expect_fail && rc) {
+ IPA_UT_LOG("fail to sync memcpy - rc = %d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("sync memcpy failed");
+ goto free_buffs;
+ }
+ if (expect_fail && !rc) {
+ IPA_UT_LOG("sync memcpy succeeded while expected to fail\n");
+ IPA_UT_TEST_FAIL_REPORT(
+ "sync memcpy succeeded while expected to fail");
+ rc = -EFAULT;
+ goto free_buffs;
+ }
+
+ if (!rc) {
+ /* if memcpy succeeded, compare the buffers */
+ rc = memcmp(dest_mem.base, src_mem.base, size);
+ if (rc) {
+ IPA_UT_LOG("BAD memcpy - buffs are not equals\n");
+ IPA_UT_TEST_FAIL_REPORT(
+ "BAD memcpy - buffs are not equals");
+ src = src_mem.base;
+ dest = dest_mem.base;
+ for (i = 0; i < size; i++) {
+ if (*(src + i) != *(dest + i)) {
+ IPA_UT_LOG("byte: %d 0x%x != 0x%x\n",
+ i, *(src + i), *(dest + i));
+ }
+ }
+ }
+ } else {
+ /* if memcpy failed as expected, update the rc */
+ rc = 0;
+ }
+
+free_buffs:
+ ipa_test_dma_destroy_buffs(&src_mem, &dest_mem);
+ return rc;
+}
+
+static void ipa_test_dma_async_memcpy_cb(void *comp_obj)
+{
+ struct completion *xfer_done;
+
+ if (!comp_obj) {
+ IPA_UT_ERR("Invalid Input\n");
+ return;
+ }
+ xfer_done = (struct completion *)comp_obj;
+ complete(xfer_done);
+}
+
+static void ipa_test_dma_async_memcpy_cb_user_data(void *user_param)
+{
+ int rc;
+ int i;
+ u8 *src;
+ u8 *dest;
+ struct ipa_test_dma_async_user_data *udata =
+ (struct ipa_test_dma_async_user_data *)user_param;
+
+ if (!udata) {
+ IPA_UT_ERR("Invalid user param\n");
+ return;
+ }
+
+ rc = memcmp(udata->dest_mem.base, udata->src_mem.base,
+ udata->src_mem.size);
+ if (rc) {
+ IPA_UT_LOG("BAD memcpy - buffs are not equal sn=%d\n",
+ udata->call_serial_number);
+ IPA_UT_TEST_FAIL_REPORT(
+ "BAD memcpy - buffs are not equal");
+ src = udata->src_mem.base;
+ dest = udata->dest_mem.base;
+ for (i = 0; i < udata->src_mem.size; i++) {
+ if (*(src + i) != *(dest + i)) {
+ IPA_UT_ERR("byte: %d 0x%x != 0x%x\n", i,
+ *(src + i), *(dest + i));
+ }
+ }
+ return;
+ }
+
+ IPA_UT_LOG("Notify on async memcopy sn=%d\n",
+ udata->call_serial_number);
+ complete(&(udata->copy_done));
+}
+
+/**
+ * ipa_test_dma_memcpy_async() - memcpy in async mode
+ *
+ * @size: buffer size
+ * @expect_fail: test expected the memcpy to fail
+ *
+ * To be run during tests
+ * 1. Alloc src and dst buffers
+ * 2. async memcpy src to dst via dma and wait for completion
+ * 3. compare src and dts if memcpy succeeded as expected
+ */
+static int ipa_test_dma_memcpy_async(int size, bool expect_fail)
+{
+ int rc = 0;
+ int i;
+ struct ipa_mem_buffer src_mem;
+ struct ipa_mem_buffer dest_mem;
+ u8 *src;
+ u8 *dest;
+ struct completion xfer_done;
+
+ rc = ipa_test_dma_alloc_buffs(&src_mem, &dest_mem, size);
+ if (rc) {
+ IPA_UT_LOG("fail to alloc buffers\n");
+ IPA_UT_TEST_FAIL_REPORT("fail to alloc buffers");
+ return rc;
+ }
+
+ init_completion(&xfer_done);
+ rc = ipa_dma_async_memcpy(dest_mem.phys_base, src_mem.phys_base, size,
+ ipa_test_dma_async_memcpy_cb, &xfer_done);
+ if (!expect_fail && rc) {
+ IPA_UT_LOG("fail to initiate async memcpy - rc=%d\n",
+ rc);
+ IPA_UT_TEST_FAIL_REPORT("async memcpy initiate failed");
+ goto free_buffs;
+ }
+ if (expect_fail && !rc) {
+ IPA_UT_LOG("async memcpy succeeded while expected to fail\n");
+ IPA_UT_TEST_FAIL_REPORT(
+ "async memcpy succeeded while expected to fail");
+ rc = -EFAULT;
+ goto free_buffs;
+ }
+
+ if (!rc) {
+ /* if memcpy succeeded, compare the buffers */
+ wait_for_completion(&xfer_done);
+ rc = memcmp(dest_mem.base, src_mem.base, size);
+ if (rc) {
+ IPA_UT_LOG("BAD memcpy - buffs are not equals\n");
+ IPA_UT_TEST_FAIL_REPORT(
+ "BAD memcpy - buffs are not equals");
+ src = src_mem.base;
+ dest = dest_mem.base;
+ for (i = 0; i < size; i++) {
+ if (*(src + i) != *(dest + i)) {
+ IPA_UT_LOG("byte: %d 0x%x != 0x%x\n",
+ i, *(src + i), *(dest + i));
+ }
+ }
+ }
+ } else {
+ /* if memcpy failed as expected, update the rc */
+ rc = 0;
+ }
+
+free_buffs:
+ ipa_test_dma_destroy_buffs(&src_mem, &dest_mem);
+ return rc;
+}
+
+/**
+ * ipa_test_dma_sync_async_memcpy() - memcpy in sync and then async mode
+ *
+ * @size: buffer size
+ *
+ * To be run during tests
+ * 1. several sync memcopy in row
+ * 2. several async memcopy -
+ * back-to-back (next async try initiated after prev is completed)
+ */
+static int ipa_test_dma_sync_async_memcpy(int size)
+{
+ int rc;
+
+ IPA_DMA_RUN_TEST_UNIT_IN_LOOP(ipa_test_dma_memcpy_sync,
+ IPA_DMA_TEST_INT_LOOP_NUM, rc, size, false);
+ if (rc) {
+ IPA_UT_LOG("sync memcopy fail rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("sync memcopy fail");
+ return rc;
+ }
+
+ IPA_DMA_RUN_TEST_UNIT_IN_LOOP(ipa_test_dma_memcpy_async,
+ IPA_DMA_TEST_INT_LOOP_NUM, rc, size, false);
+ if (rc) {
+ IPA_UT_LOG("async memcopy fail rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("async memcopy fail");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: test control API - enable/disable dma
+ * 1. enable dma
+ * 2. disable dma
+ */
+static int ipa_test_dma_control_api(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: memcpy before dma enable
+ *
+ * 1. sync memcpy - should fail
+ * 2. async memcpy - should fail
+ */
+static int ipa_test_dma_memcpy_before_enable(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_test_dma_memcpy_sync(IPA_TEST_DMA_MEMCPY_BUFF_SIZE, true);
+ if (rc) {
+ IPA_UT_LOG("sync memcpy succeeded unexpectedly rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("sync memcpy succeeded unexpectedly");
+ return rc;
+ }
+
+ rc = ipa_test_dma_memcpy_async(IPA_TEST_DMA_MEMCPY_BUFF_SIZE, true);
+ if (rc) {
+ IPA_UT_LOG("async memcpy succeeded unexpectedly rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("sync memcpy succeeded unexpectedly");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: Sync memory copy
+ *
+ * 1. dma enable
+ * 2. sync memcpy
+ * 3. dma disable
+ */
+static int ipa_test_dma_sync_memcpy(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ rc = ipa_test_dma_memcpy_sync(IPA_TEST_DMA_MEMCPY_BUFF_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("sync memcpy failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("sync memcpy failed");
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: Async memory copy
+ *
+ * 1. dma enable
+ * 2. async memcpy
+ * 3. dma disable
+ */
+static int ipa_test_dma_async_memcpy(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ rc = ipa_test_dma_memcpy_async(IPA_TEST_DMA_MEMCPY_BUFF_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("async memcpy failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("async memcpy failed");
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: Iteration of sync memory copy
+ *
+ * 1. dma enable
+ * 2. sync memcpy in loop - in row
+ * 3. dma disable
+ */
+static int ipa_test_dma_sync_memcpy_in_loop(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ IPA_DMA_RUN_TEST_UNIT_IN_LOOP(ipa_test_dma_memcpy_sync,
+ IPA_DMA_TEST_LOOP_NUM, rc,
+ IPA_TEST_DMA_MEMCPY_BUFF_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("Iterations of sync memcpy failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("Iterations of sync memcpy failed");
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: Iteration of async memory copy
+ *
+ * 1. dma enable
+ * 2. async memcpy in loop - back-to-back
+ * next async copy is initiated once previous one completed
+ * 3. dma disable
+ */
+static int ipa_test_dma_async_memcpy_in_loop(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ IPA_DMA_RUN_TEST_UNIT_IN_LOOP(ipa_test_dma_memcpy_async,
+ IPA_DMA_TEST_LOOP_NUM, rc,
+ IPA_TEST_DMA_MEMCPY_BUFF_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("Iterations of async memcpy failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("Iterations of async memcpy failed");
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: Iteration of interleaved sync and async memory copy
+ *
+ * 1. dma enable
+ * 2. sync and async memcpy in loop - interleaved
+ * 3. dma disable
+ */
+static int ipa_test_dma_interleaved_sync_async_memcpy_in_loop(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ IPA_DMA_RUN_TEST_UNIT_IN_LOOP(ipa_test_dma_sync_async_memcpy,
+ IPA_DMA_TEST_INT_LOOP_NUM, rc,
+ IPA_TEST_DMA_MEMCPY_BUFF_SIZE);
+ if (rc) {
+ IPA_UT_LOG(
+ "Iterations of interleaved sync async memcpy failed rc=%d\n"
+ , rc);
+ IPA_UT_TEST_FAIL_REPORT(
+ "Iterations of interleaved sync async memcpy failed");
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+static atomic_t ipa_test_dma_mt_test_pass;
+
+static void ipa_test_dma_wrapper_test_one_sync(struct work_struct *work)
+{
+ int rc;
+
+ rc = ipa_test_dma_memcpy_sync(IPA_TEST_DMA_MEMCPY_BUFF_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("fail sync memcpy from thread rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail sync memcpy from thread");
+ return;
+ }
+ atomic_inc(&ipa_test_dma_mt_test_pass);
+}
+
+static void ipa_test_dma_wrapper_test_one_async(struct work_struct *work)
+{
+ int rc;
+
+ rc = ipa_test_dma_memcpy_async(IPA_TEST_DMA_MEMCPY_BUFF_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("fail async memcpy from thread rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail async memcpy from thread");
+ return;
+ }
+ atomic_inc(&ipa_test_dma_mt_test_pass);
+}
+
+/**
+ * TEST: Multiple threads running sync and sync mem copy
+ *
+ * 1. dma enable
+ * 2. In-loop
+ * 2.1 create wq for sync memcpy
+ * 2.2 create wq for async memcpy
+ * 2.3 queue sync memcpy work
+ * 2.4 queue async memcoy work
+ * 3. In-loop
+ * 3.1 flush and destroy wq sync
+ * 3.2 flush and destroy wq async
+ * 3. dma disable
+ */
+static int ipa_test_dma_mt_sync_async(void *priv)
+{
+ int rc;
+ int i;
+ static struct workqueue_struct *wq_sync[IPA_TEST_DMA_MT_TEST_NUM_WQ];
+ static struct workqueue_struct *wq_async[IPA_TEST_DMA_MT_TEST_NUM_WQ];
+ static struct work_struct work_async[IPA_TEST_DMA_MT_TEST_NUM_WQ];
+ static struct work_struct work_sync[IPA_TEST_DMA_MT_TEST_NUM_WQ];
+ char buff[IPA_TEST_DMA_WQ_NAME_BUFF_SZ];
+
+ memset(wq_sync, 0, sizeof(wq_sync));
+ memset(wq_sync, 0, sizeof(wq_async));
+ memset(work_async, 0, sizeof(work_async));
+ memset(work_sync, 0, sizeof(work_sync));
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ atomic_set(&ipa_test_dma_mt_test_pass, 0);
+ for (i = 0; i < IPA_TEST_DMA_MT_TEST_NUM_WQ; i++) {
+ snprintf(buff, sizeof(buff), "ipa_test_dmaSwq%d", i);
+ wq_sync[i] = create_singlethread_workqueue(buff);
+ if (!wq_sync[i]) {
+ IPA_UT_ERR("failed to create sync wq#%d\n", i);
+ rc = -EFAULT;
+ goto fail_create_wq;
+ }
+ snprintf(buff, IPA_RESOURCE_NAME_MAX, "ipa_test_dmaAwq%d", i);
+ wq_async[i] = create_singlethread_workqueue(buff);
+ if (!wq_async[i]) {
+ IPA_UT_ERR("failed to create async wq#%d\n", i);
+ rc = -EFAULT;
+ goto fail_create_wq;
+ }
+
+ INIT_WORK(&work_sync[i], ipa_test_dma_wrapper_test_one_sync);
+ queue_work(wq_sync[i], &work_sync[i]);
+ INIT_WORK(&work_async[i], ipa_test_dma_wrapper_test_one_async);
+ queue_work(wq_async[i], &work_async[i]);
+ }
+
+ for (i = 0; i < IPA_TEST_DMA_MT_TEST_NUM_WQ; i++) {
+ flush_workqueue(wq_sync[i]);
+ destroy_workqueue(wq_sync[i]);
+ flush_workqueue(wq_async[i]);
+ destroy_workqueue(wq_async[i]);
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ if ((2 * IPA_TEST_DMA_MT_TEST_NUM_WQ) !=
+ atomic_read(&ipa_test_dma_mt_test_pass)) {
+ IPA_UT_LOG(
+ "Multi-threaded sync/async memcopy failed passed=%d\n"
+ , atomic_read(&ipa_test_dma_mt_test_pass));
+ IPA_UT_TEST_FAIL_REPORT(
+ "Multi-threaded sync/async memcopy failed");
+ return -EFAULT;
+ }
+
+ return 0;
+
+fail_create_wq:
+ (void)ipa_dma_disable();
+ for (i = 0; i < IPA_TEST_DMA_MT_TEST_NUM_WQ; i++) {
+ if (wq_sync[i])
+ destroy_workqueue(wq_sync[i]);
+ if (wq_async[i])
+ destroy_workqueue(wq_async[i]);
+ }
+
+ return rc;
+}
+
+/**
+ * TEST: Several parallel async memory copy iterations
+ *
+ * 1. create several user_data structures - one per iteration
+ * 2. allocate buffs. Give slice for each iteration
+ * 3. iterations of async mem copy
+ * 4. wait for all to complete
+ * 5. dma disable
+ */
+static int ipa_test_dma_parallel_async_memcpy_in_loop(void *priv)
+{
+ int rc;
+ struct ipa_test_dma_async_user_data *udata;
+ struct ipa_mem_buffer all_src_mem;
+ struct ipa_mem_buffer all_dest_mem;
+ int i;
+ bool is_fail = false;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ udata = kzalloc(IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM *
+ sizeof(struct ipa_test_dma_async_user_data), GFP_KERNEL);
+ if (!udata) {
+ IPA_UT_ERR("fail allocate user_data array\n");
+ (void)ipa_dma_disable();
+ return -ENOMEM;
+ }
+
+ rc = ipa_test_dma_alloc_buffs(&all_src_mem, &all_dest_mem,
+ IPA_TEST_DMA_MEMCPY_BUFF_SIZE);
+ if (rc) {
+ IPA_UT_LOG("fail to alloc buffers\n");
+ IPA_UT_TEST_FAIL_REPORT("fail to alloc buffers");
+ kfree(udata);
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ for (i = 0 ; i < IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM ; i++) {
+ udata[i].src_mem.size =
+ IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM;
+ udata[i].src_mem.base = all_src_mem.base + i *
+ (IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM);
+ udata[i].src_mem.phys_base = all_src_mem.phys_base + i *
+ (IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM);
+
+ udata[i].dest_mem.size =
+ (IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM);
+ udata[i].dest_mem.base = all_dest_mem.base + i *
+ (IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM);
+ udata[i].dest_mem.phys_base = all_dest_mem.phys_base + i *
+ (IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM);
+
+ udata[i].call_serial_number = i + 1;
+ init_completion(&(udata[i].copy_done));
+ rc = ipa_dma_async_memcpy(udata[i].dest_mem.phys_base,
+ udata[i].src_mem.phys_base,
+ (IPA_TEST_DMA_MEMCPY_BUFF_SIZE /
+ IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM),
+ ipa_test_dma_async_memcpy_cb_user_data, &udata[i]);
+ if (rc) {
+ IPA_UT_LOG("async memcpy initiation fail i=%d rc=%d\n",
+ i, rc);
+ is_fail = true;
+ }
+ }
+
+ for (i = 0; i < IPA_DMA_TEST_ASYNC_PARALLEL_LOOP_NUM ; i++)
+ wait_for_completion(&udata[i].copy_done);
+
+ ipa_test_dma_destroy_buffs(&all_src_mem, &all_dest_mem);
+ kfree(udata);
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ if (is_fail) {
+ IPA_UT_LOG("async memcopy failed\n");
+ IPA_UT_TEST_FAIL_REPORT("async memcopy failed");
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+/**
+ * TEST: Sync memory copy
+ *
+ * 1. dma enable
+ * 2. sync memcpy with max packet size
+ * 3. dma disable
+ */
+static int ipa_test_dma_sync_memcpy_max_pkt_size(void *priv)
+{
+ int rc;
+
+ IPA_UT_LOG("Test Start\n");
+
+ rc = ipa_dma_enable();
+ if (rc) {
+ IPA_UT_LOG("DMA enable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail enable dma");
+ return rc;
+ }
+
+ rc = ipa_test_dma_memcpy_sync(IPA_TEST_DMA_MAX_PKT_SIZE, false);
+ if (rc) {
+ IPA_UT_LOG("sync memcpy failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("sync memcpy failed");
+ (void)ipa_dma_disable();
+ return rc;
+ }
+
+ rc = ipa_dma_disable();
+ if (rc) {
+ IPA_UT_LOG("DMA disable failed rc=%d\n", rc);
+ IPA_UT_TEST_FAIL_REPORT("fail disable dma");
+ return rc;
+ }
+
+ return 0;
+}
+
+/* Suite definition block */
+IPA_UT_DEFINE_SUITE_START(dma, "DMA for GSI",
+ ipa_test_dma_setup, ipa_test_dma_teardown)
+{
+ IPA_UT_ADD_TEST(control_api,
+ "Control API",
+ ipa_test_dma_control_api,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(memcpy_before_enable,
+ "Call memcpy before dma enable and expect it to fail",
+ ipa_test_dma_memcpy_before_enable,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(sync_memcpy,
+ "Sync memory copy",
+ ipa_test_dma_sync_memcpy,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(async_memcpy,
+ "Async memory copy",
+ ipa_test_dma_async_memcpy,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(sync_memcpy_in_loop,
+ "Several sync memory copy iterations",
+ ipa_test_dma_sync_memcpy_in_loop,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(async_memcpy_in_loop,
+ "Several async memory copy iterations",
+ ipa_test_dma_async_memcpy_in_loop,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(interleaved_sync_async_memcpy_in_loop,
+ "Several interleaved sync and async memory copy iterations",
+ ipa_test_dma_interleaved_sync_async_memcpy_in_loop,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(multi_threaded_multiple_sync_async_memcpy,
+ "Several multi-threaded sync and async memory copy iterations",
+ ipa_test_dma_mt_sync_async,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(parallel_async_memcpy_in_loop,
+ "Several parallel async memory copy iterations",
+ ipa_test_dma_parallel_async_memcpy_in_loop,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+ IPA_UT_ADD_TEST(sync_memcpy_max_pkt_size,
+ "Sync memory copy with max packet size",
+ ipa_test_dma_sync_memcpy_max_pkt_size,
+ true, IPA_HW_v3_0, IPA_HW_MAX),
+} IPA_UT_DEFINE_SUITE_END(dma);
diff --git a/drivers/platform/msm/ipa/test/ipa_ut_suite_list.h b/drivers/platform/msm/ipa/test/ipa_ut_suite_list.h
index 944800f..4a9d3b0 100644
--- a/drivers/platform/msm/ipa/test/ipa_ut_suite_list.h
+++ b/drivers/platform/msm/ipa/test/ipa_ut_suite_list.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,6 +21,7 @@
* No importance for order.
*/
IPA_UT_DECLARE_SUITE(mhi);
+IPA_UT_DECLARE_SUITE(dma);
IPA_UT_DECLARE_SUITE(example);
@@ -31,6 +32,7 @@ IPA_UT_DECLARE_SUITE(example);
IPA_UT_DEFINE_ALL_SUITES_START
{
IPA_UT_REGISTER_SUITE(mhi),
+ IPA_UT_REGISTER_SUITE(dma),
IPA_UT_REGISTER_SUITE(example),
} IPA_UT_DEFINE_ALL_SUITES_END;
diff --git a/drivers/platform/msm/msm_11ad/Makefile b/drivers/platform/msm/msm_11ad/Makefile
new file mode 100644
index 0000000..4771045
--- /dev/null
+++ b/drivers/platform/msm/msm_11ad/Makefile
@@ -0,0 +1,9 @@
+obj-$(CONFIG_MSM_11AD) += msm_11ad_proxy.o
+
+msm_11ad_proxy-y := msm_11ad.o
+subdir-ccflags-y += -D__CHECK_ENDIAN__
+
+# need to locate wil_platform.h
+WIL_11AD_PATH = drivers/net/wireless/ath/wil6210
+subdir-ccflags-y += -I$(WIL_11AD_PATH)
+
diff --git a/drivers/platform/msm/msm_11ad/msm_11ad.c b/drivers/platform/msm/msm_11ad/msm_11ad.c
new file mode 100644
index 0000000..bdf4071
--- /dev/null
+++ b/drivers/platform/msm/msm_11ad/msm_11ad.c
@@ -0,0 +1,1221 @@
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/msm_pcie.h>
+#include <asm/dma-iommu.h>
+#include <linux/msm-bus.h>
+#include <linux/iommu.h>
+#include <linux/version.h>
+#include <linux/delay.h>
+#include <soc/qcom/subsystem_restart.h>
+#include <soc/qcom/subsystem_notif.h>
+#include <soc/qcom/ramdump.h>
+#include <soc/qcom/memory_dump.h>
+#include <linux/regulator/consumer.h>
+#include <linux/clk.h>
+#include "wil_platform.h"
+#include "msm_11ad.h"
+
+#define WIGIG_VENDOR (0x1ae9)
+#define WIGIG_DEVICE (0x0310)
+
+#define SMMU_BASE 0x10000000 /* Device address range base */
+#define SMMU_SIZE ((SZ_1G * 4ULL) - SMMU_BASE)
+
+#define WIGIG_ENABLE_DELAY 50
+#define PM_OPT_SUSPEND (MSM_PCIE_CONFIG_NO_CFG_RESTORE | \
+ MSM_PCIE_CONFIG_LINKDOWN)
+#define PM_OPT_RESUME MSM_PCIE_CONFIG_NO_CFG_RESTORE
+
+#define WIGIG_SUBSYS_NAME "WIGIG"
+#define WIGIG_RAMDUMP_SIZE 0x200000 /* maximum ramdump size */
+#define WIGIG_DUMP_FORMAT_VER 0x1
+#define WIGIG_DUMP_MAGIC_VER_V1 0x57474947
+#define VDD_MIN_UV 1028000
+#define VDD_MAX_UV 1028000
+#define VDD_MAX_UA 575000
+#define VDDIO_MIN_UV 1950000
+#define VDDIO_MAX_UV 2040000
+#define VDDIO_MAX_UA 70300
+
+struct device;
+
+static const char * const gpio_en_name = "qcom,wigig-en";
+static const char * const sleep_clk_en_name = "qcom,sleep-clk-en";
+
+struct msm11ad_vreg {
+ const char *name;
+ struct regulator *reg;
+ int max_uA;
+ int min_uV;
+ int max_uV;
+ bool enabled;
+};
+
+struct msm11ad_clk {
+ const char *name;
+ struct clk *clk;
+ bool enabled;
+};
+
+struct msm11ad_ctx {
+ struct list_head list;
+ struct device *dev; /* for platform device */
+ int gpio_en; /* card enable */
+ int sleep_clk_en; /* sleep clock enable for low PM management */
+
+ /* pci device */
+ u32 rc_index; /* PCIE root complex index */
+ struct pci_dev *pcidev;
+ struct pci_saved_state *pristine_state;
+
+ /* SMMU */
+ bool use_smmu; /* have SMMU enabled? */
+ int smmu_bypass;
+ int smmu_fast_map;
+ struct dma_iommu_mapping *mapping;
+
+ /* bus frequency scaling */
+ struct msm_bus_scale_pdata *bus_scale;
+ u32 msm_bus_handle;
+
+ /* subsystem restart */
+ struct wil_platform_rops rops;
+ void *wil_handle;
+ struct subsys_desc subsysdesc;
+ struct subsys_device *subsys;
+ void *subsys_handle;
+ bool recovery_in_progress;
+
+ /* ramdump */
+ void *ramdump_addr;
+ struct msm_dump_data dump_data;
+ struct ramdump_device *ramdump_dev;
+
+ /* external vregs and clocks */
+ struct msm11ad_vreg vdd;
+ struct msm11ad_vreg vddio;
+ struct msm11ad_clk rf_clk3;
+ struct msm11ad_clk rf_clk3_pin;
+};
+
+static LIST_HEAD(dev_list);
+
+static struct msm11ad_ctx *pcidev2ctx(struct pci_dev *pcidev)
+{
+ struct msm11ad_ctx *ctx;
+
+ list_for_each_entry(ctx, &dev_list, list) {
+ if (ctx->pcidev == pcidev)
+ return ctx;
+ }
+ return NULL;
+}
+
+static int msm_11ad_init_vreg(struct device *dev,
+ struct msm11ad_vreg *vreg, const char *name)
+{
+ int rc = 0;
+
+ if (!vreg)
+ return 0;
+
+ vreg->name = kstrdup(name, GFP_KERNEL);
+ if (!vreg->name)
+ return -ENOMEM;
+
+ vreg->reg = devm_regulator_get(dev, name);
+ if (IS_ERR_OR_NULL(vreg->reg)) {
+ rc = PTR_ERR(vreg->reg);
+ dev_err(dev, "%s: failed to get %s, rc=%d\n",
+ __func__, name, rc);
+ kfree(vreg->name);
+ vreg->reg = NULL;
+ goto out;
+ }
+
+ dev_info(dev, "%s: %s initialized successfully\n", __func__, name);
+
+out:
+ return rc;
+}
+
+static int msm_11ad_release_vreg(struct device *dev, struct msm11ad_vreg *vreg)
+{
+ if (!vreg || !vreg->reg)
+ return 0;
+
+ dev_info(dev, "%s: %s released\n", __func__, vreg->name);
+
+ devm_regulator_put(vreg->reg);
+ vreg->reg = NULL;
+ kfree(vreg->name);
+
+ return 0;
+}
+
+static int msm_11ad_init_clk(struct device *dev, struct msm11ad_clk *clk,
+ const char *name)
+{
+ int rc = 0;
+
+ clk->name = kstrdup(name, GFP_KERNEL);
+ if (!clk->name)
+ return -ENOMEM;
+
+ clk->clk = devm_clk_get(dev, name);
+ if (IS_ERR(clk->clk)) {
+ rc = PTR_ERR(clk->clk);
+ if (rc == -ENOENT)
+ rc = -EPROBE_DEFER;
+ dev_err(dev, "%s: failed to get %s rc %d",
+ __func__, name, rc);
+ kfree(clk->name);
+ clk->clk = NULL;
+ goto out;
+ }
+
+ dev_info(dev, "%s: %s initialized successfully\n", __func__, name);
+
+out:
+ return rc;
+}
+
+static int msm_11ad_release_clk(struct device *dev, struct msm11ad_clk *clk)
+{
+ if (!clk || !clk->clk)
+ return 0;
+
+ dev_info(dev, "%s: %s released\n", __func__, clk->name);
+
+ devm_clk_put(dev, clk->clk);
+ clk->clk = NULL;
+
+ kfree(clk->name);
+
+ return 0;
+}
+
+static int msm_11ad_init_vregs(struct msm11ad_ctx *ctx)
+{
+ int rc;
+ struct device *dev = ctx->dev;
+
+ if (!of_property_read_bool(dev->of_node, "qcom,use-ext-supply"))
+ return 0;
+
+ rc = msm_11ad_init_vreg(dev, &ctx->vdd, "vdd");
+ if (rc)
+ goto out;
+
+ ctx->vdd.max_uV = VDD_MAX_UV;
+ ctx->vdd.min_uV = VDD_MIN_UV;
+ ctx->vdd.max_uA = VDD_MAX_UA;
+
+ rc = msm_11ad_init_vreg(dev, &ctx->vddio, "vddio");
+ if (rc)
+ goto vddio_fail;
+
+ ctx->vddio.max_uV = VDDIO_MAX_UV;
+ ctx->vddio.min_uV = VDDIO_MIN_UV;
+ ctx->vddio.max_uA = VDDIO_MAX_UA;
+
+ return rc;
+
+vddio_fail:
+ msm_11ad_release_vreg(dev, &ctx->vdd);
+out:
+ return rc;
+}
+
+static void msm_11ad_release_vregs(struct msm11ad_ctx *ctx)
+{
+ msm_11ad_release_vreg(ctx->dev, &ctx->vdd);
+ msm_11ad_release_vreg(ctx->dev, &ctx->vddio);
+}
+
+static int msm_11ad_cfg_vreg(struct device *dev,
+ struct msm11ad_vreg *vreg, bool on)
+{
+ int rc = 0;
+ int min_uV;
+ int uA_load;
+
+ if (!vreg || !vreg->reg)
+ goto out;
+
+ if (regulator_count_voltages(vreg->reg) > 0) {
+ min_uV = on ? vreg->min_uV : 0;
+ rc = regulator_set_voltage(vreg->reg, min_uV, vreg->max_uV);
+ if (rc) {
+ dev_err(dev, "%s: %s set voltage failed, err=%d\n",
+ __func__, vreg->name, rc);
+ goto out;
+ }
+ uA_load = on ? vreg->max_uA : 0;
+ rc = regulator_set_load(vreg->reg, uA_load);
+ if (rc >= 0) {
+ /*
+ * regulator_set_load() returns new regulator
+ * mode upon success.
+ */
+ dev_dbg(dev,
+ "%s: %s regulator_set_load rc(%d)\n",
+ __func__, vreg->name, rc);
+ rc = 0;
+ } else {
+ dev_err(dev,
+ "%s: %s set load(uA_load=%d) failed, rc=%d\n",
+ __func__, vreg->name, uA_load, rc);
+ goto out;
+ }
+ }
+
+out:
+ return rc;
+}
+
+static int msm_11ad_enable_vreg(struct msm11ad_ctx *ctx,
+ struct msm11ad_vreg *vreg)
+{
+ struct device *dev = ctx->dev;
+ int rc = 0;
+
+ if (!vreg || !vreg->reg || vreg->enabled)
+ goto out;
+
+ rc = msm_11ad_cfg_vreg(dev, vreg, true);
+ if (rc)
+ goto out;
+
+ rc = regulator_enable(vreg->reg);
+ if (rc) {
+ dev_err(dev, "%s: %s enable failed, rc=%d\n",
+ __func__, vreg->name, rc);
+ goto enable_fail;
+ }
+
+ vreg->enabled = true;
+
+ dev_info(dev, "%s: %s enabled\n", __func__, vreg->name);
+
+ return rc;
+
+enable_fail:
+ msm_11ad_cfg_vreg(dev, vreg, false);
+out:
+ return rc;
+}
+
+static int msm_11ad_disable_vreg(struct msm11ad_ctx *ctx,
+ struct msm11ad_vreg *vreg)
+{
+ struct device *dev = ctx->dev;
+ int rc = 0;
+
+ if (!vreg || !vreg->reg || !vreg->enabled)
+ goto out;
+
+ rc = regulator_disable(vreg->reg);
+ if (rc) {
+ dev_err(dev, "%s: %s disable failed, rc=%d\n",
+ __func__, vreg->name, rc);
+ goto out;
+ }
+
+ /* ignore errors on applying disable config */
+ msm_11ad_cfg_vreg(dev, vreg, false);
+ vreg->enabled = false;
+
+ dev_info(dev, "%s: %s disabled\n", __func__, vreg->name);
+
+out:
+ return rc;
+}
+
+static int msm_11ad_enable_vregs(struct msm11ad_ctx *ctx)
+{
+ int rc = 0;
+
+ rc = msm_11ad_enable_vreg(ctx, &ctx->vdd);
+ if (rc)
+ goto out;
+
+ rc = msm_11ad_enable_vreg(ctx, &ctx->vddio);
+ if (rc)
+ goto vddio_fail;
+
+ return rc;
+
+vddio_fail:
+ msm_11ad_disable_vreg(ctx, &ctx->vdd);
+out:
+ return rc;
+}
+
+static int msm_11ad_disable_vregs(struct msm11ad_ctx *ctx)
+{
+ if (!ctx->vdd.reg && !ctx->vddio.reg)
+ goto out;
+
+ /* ignore errors on disable vreg */
+ msm_11ad_disable_vreg(ctx, &ctx->vdd);
+ msm_11ad_disable_vreg(ctx, &ctx->vddio);
+
+out:
+ return 0;
+}
+
+static int msm_11ad_enable_clk(struct msm11ad_ctx *ctx,
+ struct msm11ad_clk *clk)
+{
+ struct device *dev = ctx->dev;
+ int rc = 0;
+
+ if (!clk || !clk->clk || clk->enabled)
+ goto out;
+
+ rc = clk_prepare_enable(clk->clk);
+ if (rc) {
+ dev_err(dev, "%s: failed to enable %s, rc(%d)\n",
+ __func__, clk->name, rc);
+ goto out;
+ }
+ clk->enabled = true;
+
+ dev_dbg(dev, "%s: %s enabled\n", __func__, clk->name);
+
+out:
+ return rc;
+}
+
+static void msm_11ad_disable_clk(struct msm11ad_ctx *ctx,
+ struct msm11ad_clk *clk)
+{
+ struct device *dev = ctx->dev;
+
+ if (!clk || !clk->clk || !clk->enabled)
+ goto out;
+
+ clk_disable_unprepare(clk->clk);
+ clk->enabled = false;
+
+ dev_dbg(dev, "%s: %s disabled\n", __func__, clk->name);
+
+out:
+ return;
+}
+
+static int msm_11ad_enable_clocks(struct msm11ad_ctx *ctx)
+{
+ int rc;
+
+ rc = msm_11ad_enable_clk(ctx, &ctx->rf_clk3);
+ if (rc)
+ return rc;
+
+ rc = msm_11ad_enable_clk(ctx, &ctx->rf_clk3_pin);
+ if (rc)
+ msm_11ad_disable_clk(ctx, &ctx->rf_clk3);
+
+ return rc;
+}
+
+static int msm_11ad_init_clocks(struct msm11ad_ctx *ctx)
+{
+ int rc;
+ struct device *dev = ctx->dev;
+
+ if (!of_property_read_bool(dev->of_node, "qcom,use-ext-clocks"))
+ return 0;
+
+ rc = msm_11ad_init_clk(dev, &ctx->rf_clk3, "rf_clk3_clk");
+ if (rc)
+ return rc;
+
+ rc = msm_11ad_init_clk(dev, &ctx->rf_clk3_pin, "rf_clk3_pin_clk");
+ if (rc)
+ msm_11ad_release_clk(ctx->dev, &ctx->rf_clk3);
+
+ return rc;
+}
+
+static void msm_11ad_release_clocks(struct msm11ad_ctx *ctx)
+{
+ msm_11ad_release_clk(ctx->dev, &ctx->rf_clk3_pin);
+ msm_11ad_release_clk(ctx->dev, &ctx->rf_clk3);
+}
+
+static void msm_11ad_disable_clocks(struct msm11ad_ctx *ctx)
+{
+ msm_11ad_disable_clk(ctx, &ctx->rf_clk3_pin);
+ msm_11ad_disable_clk(ctx, &ctx->rf_clk3);
+}
+
+static int ops_suspend(void *handle)
+{
+ int rc;
+ struct msm11ad_ctx *ctx = handle;
+ struct pci_dev *pcidev;
+
+ pr_info("%s(%p)\n", __func__, handle);
+ if (!ctx) {
+ pr_err("No context\n");
+ return -ENODEV;
+ }
+ pcidev = ctx->pcidev;
+ rc = pci_save_state(pcidev);
+ if (rc) {
+ dev_err(ctx->dev, "pci_save_state failed :%d\n", rc);
+ return rc;
+ }
+ rc = msm_pcie_pm_control(MSM_PCIE_SUSPEND, pcidev->bus->number,
+ pcidev, NULL, PM_OPT_SUSPEND);
+ if (rc) {
+ dev_err(ctx->dev, "msm_pcie_pm_control(SUSPEND) failed :%d\n",
+ rc);
+ return rc;
+ }
+ if (ctx->gpio_en >= 0)
+ gpio_direction_output(ctx->gpio_en, 0);
+
+ if (ctx->sleep_clk_en >= 0)
+ gpio_direction_output(ctx->sleep_clk_en, 0);
+
+ msm_11ad_disable_clocks(ctx);
+
+ msm_11ad_disable_vregs(ctx);
+
+ return rc;
+}
+
+static int ops_resume(void *handle)
+{
+ int rc;
+ struct msm11ad_ctx *ctx = handle;
+ struct pci_dev *pcidev;
+
+ pr_info("%s(%p)\n", __func__, handle);
+ if (!ctx) {
+ pr_err("No context\n");
+ return -ENODEV;
+ }
+
+ rc = msm_11ad_enable_vregs(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_enable_vregs failed :%d\n",
+ rc);
+ return rc;
+ }
+
+ rc = msm_11ad_enable_clocks(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_enable_clocks failed :%d\n", rc);
+ goto err_disable_vregs;
+ }
+
+ if (ctx->sleep_clk_en >= 0)
+ gpio_direction_output(ctx->sleep_clk_en, 1);
+
+ pcidev = ctx->pcidev;
+ if (ctx->gpio_en >= 0) {
+ gpio_direction_output(ctx->gpio_en, 1);
+ msleep(WIGIG_ENABLE_DELAY);
+ }
+
+ rc = msm_pcie_pm_control(MSM_PCIE_RESUME, pcidev->bus->number,
+ pcidev, NULL, PM_OPT_RESUME);
+ if (rc) {
+ dev_err(ctx->dev, "msm_pcie_pm_control(RESUME) failed :%d\n",
+ rc);
+ goto err_disable_power;
+ }
+ rc = msm_pcie_recover_config(pcidev);
+ if (rc) {
+ dev_err(ctx->dev, "msm_pcie_recover_config failed :%d\n",
+ rc);
+ goto err_suspend_rc;
+ }
+
+ return 0;
+
+err_suspend_rc:
+ msm_pcie_pm_control(MSM_PCIE_SUSPEND, pcidev->bus->number,
+ pcidev, NULL, PM_OPT_SUSPEND);
+err_disable_power:
+ if (ctx->gpio_en >= 0)
+ gpio_direction_output(ctx->gpio_en, 0);
+
+ if (ctx->sleep_clk_en >= 0)
+ gpio_direction_output(ctx->sleep_clk_en, 0);
+
+ msm_11ad_disable_clocks(ctx);
+err_disable_vregs:
+ msm_11ad_disable_vregs(ctx);
+
+ return rc;
+}
+
+static int msm_11ad_smmu_init(struct msm11ad_ctx *ctx)
+{
+ int atomic_ctx = 1;
+ int rc;
+
+ if (!ctx->use_smmu)
+ return 0;
+
+ dev_info(ctx->dev, "Initialize SMMU, bypass = %d, fastmap = %d\n",
+ ctx->smmu_bypass, ctx->smmu_fast_map);
+
+ ctx->mapping = arm_iommu_create_mapping(&platform_bus_type,
+ SMMU_BASE, SMMU_SIZE);
+ if (IS_ERR_OR_NULL(ctx->mapping)) {
+ rc = PTR_ERR(ctx->mapping) ?: -ENODEV;
+ dev_err(ctx->dev, "Failed to create IOMMU mapping (%d)\n", rc);
+ return rc;
+ }
+
+ rc = iommu_domain_set_attr(ctx->mapping->domain,
+ DOMAIN_ATTR_ATOMIC,
+ &atomic_ctx);
+ if (rc) {
+ dev_err(ctx->dev, "Set atomic attribute to SMMU failed (%d)\n",
+ rc);
+ goto release_mapping;
+ }
+
+ if (ctx->smmu_bypass) {
+ rc = iommu_domain_set_attr(ctx->mapping->domain,
+ DOMAIN_ATTR_S1_BYPASS,
+ &ctx->smmu_bypass);
+ if (rc) {
+ dev_err(ctx->dev, "Set bypass attribute to SMMU failed (%d)\n",
+ rc);
+ goto release_mapping;
+ }
+ } else if (ctx->smmu_fast_map) {
+ rc = iommu_domain_set_attr(ctx->mapping->domain,
+ DOMAIN_ATTR_FAST,
+ &ctx->smmu_fast_map);
+ if (rc) {
+ dev_err(ctx->dev, "Set fast attribute to SMMU failed (%d)\n",
+ rc);
+ goto release_mapping;
+ }
+ }
+
+ rc = arm_iommu_attach_device(&ctx->pcidev->dev, ctx->mapping);
+ if (rc) {
+ dev_err(ctx->dev, "arm_iommu_attach_device failed (%d)\n", rc);
+ goto release_mapping;
+ }
+ dev_info(ctx->dev, "attached to IOMMU\n");
+
+ return 0;
+release_mapping:
+ arm_iommu_release_mapping(ctx->mapping);
+ ctx->mapping = NULL;
+ return rc;
+}
+
+static int msm_11ad_ssr_shutdown(const struct subsys_desc *subsys,
+ bool force_stop)
+{
+ pr_info("%s(%p,%d)\n", __func__, subsys, force_stop);
+ /* nothing is done in shutdown. We do full recovery in powerup */
+ return 0;
+}
+
+static int msm_11ad_ssr_powerup(const struct subsys_desc *subsys)
+{
+ int rc = 0;
+ struct platform_device *pdev;
+ struct msm11ad_ctx *ctx;
+
+ pr_info("%s(%p)\n", __func__, subsys);
+
+ pdev = to_platform_device(subsys->dev);
+ ctx = platform_get_drvdata(pdev);
+
+ if (!ctx)
+ return -ENODEV;
+
+ if (ctx->recovery_in_progress) {
+ if (ctx->rops.fw_recovery && ctx->wil_handle) {
+ dev_info(ctx->dev, "requesting FW recovery\n");
+ rc = ctx->rops.fw_recovery(ctx->wil_handle);
+ }
+ ctx->recovery_in_progress = false;
+ }
+
+ return rc;
+}
+
+static int msm_11ad_ssr_ramdump(int enable, const struct subsys_desc *subsys)
+{
+ int rc;
+ struct ramdump_segment segment;
+ struct platform_device *pdev;
+ struct msm11ad_ctx *ctx;
+
+ pdev = to_platform_device(subsys->dev);
+ ctx = platform_get_drvdata(pdev);
+
+ if (!ctx)
+ return -ENODEV;
+
+ if (!enable)
+ return 0;
+
+ if (ctx->rops.ramdump && ctx->wil_handle) {
+ rc = ctx->rops.ramdump(ctx->wil_handle, ctx->ramdump_addr,
+ WIGIG_RAMDUMP_SIZE);
+ if (rc) {
+ dev_err(ctx->dev, "ramdump failed : %d\n", rc);
+ return -EINVAL;
+ }
+ }
+
+ memset(&segment, 0, sizeof(segment));
+ segment.v_address = ctx->ramdump_addr;
+ segment.size = WIGIG_RAMDUMP_SIZE;
+
+ return do_ramdump(ctx->ramdump_dev, &segment, 1);
+}
+
+static void msm_11ad_ssr_crash_shutdown(const struct subsys_desc *subsys)
+{
+ int rc;
+ struct platform_device *pdev;
+ struct msm11ad_ctx *ctx;
+
+ pdev = to_platform_device(subsys->dev);
+ ctx = platform_get_drvdata(pdev);
+
+ if (!ctx) {
+ pr_err("%s: no context\n", __func__);
+ return;
+ }
+
+ if (ctx->rops.ramdump && ctx->wil_handle) {
+ rc = ctx->rops.ramdump(ctx->wil_handle, ctx->ramdump_addr,
+ WIGIG_RAMDUMP_SIZE);
+ if (rc)
+ dev_err(ctx->dev, "ramdump failed : %d\n", rc);
+ /* continue */
+ }
+
+ ctx->dump_data.version = WIGIG_DUMP_FORMAT_VER;
+ strlcpy(ctx->dump_data.name, WIGIG_SUBSYS_NAME,
+ sizeof(ctx->dump_data.name));
+
+ ctx->dump_data.magic = WIGIG_DUMP_MAGIC_VER_V1;
+}
+
+static void msm_11ad_ssr_deinit(struct msm11ad_ctx *ctx)
+{
+ if (ctx->ramdump_dev) {
+ destroy_ramdump_device(ctx->ramdump_dev);
+ ctx->ramdump_dev = NULL;
+ }
+
+ kfree(ctx->ramdump_addr);
+ ctx->ramdump_addr = NULL;
+
+ if (ctx->subsys_handle) {
+ subsystem_put(ctx->subsys_handle);
+ ctx->subsys_handle = NULL;
+ }
+
+ if (ctx->subsys) {
+ subsys_unregister(ctx->subsys);
+ ctx->subsys = NULL;
+ }
+}
+
+static int msm_11ad_ssr_init(struct msm11ad_ctx *ctx)
+{
+ int rc;
+ struct msm_dump_entry dump_entry;
+
+ ctx->subsysdesc.name = "WIGIG";
+ ctx->subsysdesc.owner = THIS_MODULE;
+ ctx->subsysdesc.shutdown = msm_11ad_ssr_shutdown;
+ ctx->subsysdesc.powerup = msm_11ad_ssr_powerup;
+ ctx->subsysdesc.ramdump = msm_11ad_ssr_ramdump;
+ ctx->subsysdesc.crash_shutdown = msm_11ad_ssr_crash_shutdown;
+ ctx->subsysdesc.dev = ctx->dev;
+ ctx->subsys = subsys_register(&ctx->subsysdesc);
+ if (IS_ERR(ctx->subsys)) {
+ rc = PTR_ERR(ctx->subsys);
+ dev_err(ctx->dev, "subsys_register failed :%d\n", rc);
+ goto out_rc;
+ }
+
+ /* register ramdump area */
+ ctx->ramdump_addr = kmalloc(WIGIG_RAMDUMP_SIZE, GFP_KERNEL);
+ if (!ctx->ramdump_addr) {
+ rc = -ENOMEM;
+ goto out_rc;
+ }
+
+ ctx->dump_data.addr = virt_to_phys(ctx->ramdump_addr);
+ ctx->dump_data.len = WIGIG_RAMDUMP_SIZE;
+ dump_entry.id = MSM_DUMP_DATA_WIGIG;
+ dump_entry.addr = virt_to_phys(&ctx->dump_data);
+
+ rc = msm_dump_data_register(MSM_DUMP_TABLE_APPS, &dump_entry);
+ if (rc) {
+ dev_err(ctx->dev, "Dump table setup failed: %d\n", rc);
+ goto out_rc;
+ }
+
+ ctx->ramdump_dev = create_ramdump_device(ctx->subsysdesc.name,
+ ctx->subsysdesc.dev);
+ if (!ctx->ramdump_dev) {
+ dev_err(ctx->dev, "Create ramdump device failed: %d\n", rc);
+ rc = -ENOMEM;
+ goto out_rc;
+ }
+
+ return 0;
+
+out_rc:
+ msm_11ad_ssr_deinit(ctx);
+ return rc;
+}
+
+static int msm_11ad_probe(struct platform_device *pdev)
+{
+ struct msm11ad_ctx *ctx;
+ struct device *dev = &pdev->dev;
+ struct device_node *of_node = dev->of_node;
+ struct device_node *rc_node;
+ struct pci_dev *pcidev = NULL;
+ int rc;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ ctx->dev = dev;
+
+ /*== parse ==*/
+
+ /* Information pieces:
+ * - of_node stands for "wil6210":
+ * wil6210: qcom,wil6210 {
+ * compatible = "qcom,wil6210";
+ * qcom,pcie-parent = <&pcie1>;
+ * qcom,wigig-en = <&tlmm 94 0>; (ctx->gpio_en)
+ * qcom,sleep-clk-en = <&pm8994_gpios 18 0>; (ctx->sleep_clk_en)
+ * qcom,msm-bus,name = "wil6210";
+ * qcom,msm-bus,num-cases = <2>;
+ * qcom,msm-bus,num-paths = <1>;
+ * qcom,msm-bus,vectors-KBps =
+ * <100 512 0 0>,
+ * <100 512 600000 800000>;
+ * qcom,smmu-support;
+ *};
+ * rc_node stands for "qcom,pcie", selected entries:
+ * cell-index = <1>; (ctx->rc_index)
+ * iommus = <&anoc0_smmu>;
+ * qcom,smmu-exist;
+ */
+
+ /* wigig-en is optional property */
+ ctx->gpio_en = of_get_named_gpio(of_node, gpio_en_name, 0);
+ if (ctx->gpio_en < 0)
+ dev_warn(ctx->dev, "GPIO <%s> not found, enable GPIO not used\n",
+ gpio_en_name);
+ ctx->sleep_clk_en = of_get_named_gpio(of_node, sleep_clk_en_name, 0);
+ if (ctx->sleep_clk_en < 0)
+ dev_warn(ctx->dev, "GPIO <%s> not found, sleep clock not used\n",
+ sleep_clk_en_name);
+ rc_node = of_parse_phandle(of_node, "qcom,pcie-parent", 0);
+ if (!rc_node) {
+ dev_err(ctx->dev, "Parent PCIE device not found\n");
+ return -EINVAL;
+ }
+ rc = of_property_read_u32(rc_node, "cell-index", &ctx->rc_index);
+ if (rc < 0) {
+ dev_err(ctx->dev, "Parent PCIE device index not found\n");
+ return -EINVAL;
+ }
+ ctx->use_smmu = of_property_read_bool(of_node, "qcom,smmu-support");
+ ctx->bus_scale = msm_bus_cl_get_pdata(pdev);
+
+ ctx->smmu_bypass = 1;
+ ctx->smmu_fast_map = 0;
+
+ /*== execute ==*/
+ /* turn device on */
+ rc = msm_11ad_init_vregs(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_init_vregs failed: %d\n", rc);
+ return rc;
+ }
+ rc = msm_11ad_enable_vregs(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_enable_vregs failed: %d\n", rc);
+ goto out_vreg_clk;
+ }
+
+ rc = msm_11ad_init_clocks(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_init_clocks failed: %d\n", rc);
+ goto out_vreg_clk;
+ }
+
+ rc = msm_11ad_enable_clocks(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_enable_clocks failed: %d\n", rc);
+ goto out_vreg_clk;
+ }
+
+ if (ctx->gpio_en >= 0) {
+ rc = gpio_request(ctx->gpio_en, gpio_en_name);
+ if (rc < 0) {
+ dev_err(ctx->dev, "failed to request GPIO %d <%s>\n",
+ ctx->gpio_en, gpio_en_name);
+ goto out_req;
+ }
+ rc = gpio_direction_output(ctx->gpio_en, 1);
+ if (rc < 0) {
+ dev_err(ctx->dev, "failed to set GPIO %d <%s>\n",
+ ctx->gpio_en, gpio_en_name);
+ goto out_set;
+ }
+ msleep(WIGIG_ENABLE_DELAY);
+ }
+
+ /* enumerate it on PCIE */
+ rc = msm_pcie_enumerate(ctx->rc_index);
+ if (rc < 0) {
+ dev_err(ctx->dev, "Parent PCIE enumeration failed\n");
+ goto out_rc;
+ }
+ /* search for PCIE device in our domain */
+ do {
+ pcidev = pci_get_device(WIGIG_VENDOR, WIGIG_DEVICE, pcidev);
+ if (!pcidev)
+ break;
+
+ if (pci_domain_nr(pcidev->bus) == ctx->rc_index)
+ break;
+ } while (true);
+ if (!pcidev) {
+ rc = -ENODEV;
+ dev_err(ctx->dev, "Wigig device %4x:%4x not found\n",
+ WIGIG_VENDOR, WIGIG_DEVICE);
+ goto out_rc;
+ }
+ ctx->pcidev = pcidev;
+ rc = pci_save_state(pcidev);
+ if (rc) {
+ dev_err(ctx->dev, "pci_save_state failed :%d\n", rc);
+ goto out_rc;
+ }
+ ctx->pristine_state = pci_store_saved_state(pcidev);
+
+ if (ctx->sleep_clk_en >= 0) {
+ rc = gpio_request(ctx->sleep_clk_en, "msm_11ad");
+ if (rc < 0) {
+ dev_err(ctx->dev,
+ "failed to request GPIO %d <%s>, sleep clock disabled\n",
+ ctx->sleep_clk_en, sleep_clk_en_name);
+ ctx->sleep_clk_en = -EINVAL;
+ } else {
+ gpio_direction_output(ctx->sleep_clk_en, 0);
+ }
+ }
+
+ /* register for subsystem restart */
+ rc = msm_11ad_ssr_init(ctx);
+ if (rc) {
+ dev_err(ctx->dev, "msm_11ad_ssr_init failed: %d\n", rc);
+ goto out_rc;
+ }
+
+ /* report */
+ dev_info(ctx->dev, "msm_11ad discovered. %p {\n"
+ " gpio_en = %d\n"
+ " sleep_clk_en = %d\n"
+ " rc_index = %d\n"
+ " use_smmu = %d\n"
+ " pcidev = %p\n"
+ "}\n", ctx, ctx->gpio_en, ctx->sleep_clk_en, ctx->rc_index,
+ ctx->use_smmu, ctx->pcidev);
+
+ platform_set_drvdata(pdev, ctx);
+ device_disable_async_suspend(&pcidev->dev);
+
+ list_add_tail(&ctx->list, &dev_list);
+ ops_suspend(ctx);
+
+ return 0;
+out_rc:
+ if (ctx->gpio_en >= 0)
+ gpio_direction_output(ctx->gpio_en, 0);
+out_set:
+ if (ctx->gpio_en >= 0)
+ gpio_free(ctx->gpio_en);
+out_req:
+ ctx->gpio_en = -EINVAL;
+out_vreg_clk:
+ msm_11ad_disable_clocks(ctx);
+ msm_11ad_release_clocks(ctx);
+ msm_11ad_disable_vregs(ctx);
+ msm_11ad_release_vregs(ctx);
+
+ return rc;
+}
+
+static int msm_11ad_remove(struct platform_device *pdev)
+{
+ struct msm11ad_ctx *ctx = platform_get_drvdata(pdev);
+
+ msm_11ad_ssr_deinit(ctx);
+ list_del(&ctx->list);
+ dev_info(ctx->dev, "%s: pdev %p pcidev %p\n", __func__, pdev,
+ ctx->pcidev);
+ kfree(ctx->pristine_state);
+
+ msm_bus_cl_clear_pdata(ctx->bus_scale);
+ pci_dev_put(ctx->pcidev);
+ if (ctx->gpio_en >= 0) {
+ gpio_direction_output(ctx->gpio_en, 0);
+ gpio_free(ctx->gpio_en);
+ }
+ if (ctx->sleep_clk_en >= 0)
+ gpio_free(ctx->sleep_clk_en);
+
+ msm_11ad_disable_clocks(ctx);
+ msm_11ad_release_clocks(ctx);
+ msm_11ad_disable_vregs(ctx);
+ msm_11ad_release_vregs(ctx);
+
+ return 0;
+}
+
+static const struct of_device_id msm_11ad_of_match[] = {
+ { .compatible = "qcom,wil6210", },
+ {},
+};
+
+static struct platform_driver msm_11ad_driver = {
+ .driver = {
+ .name = "msm_11ad",
+ .of_match_table = msm_11ad_of_match,
+ },
+ .probe = msm_11ad_probe,
+ .remove = msm_11ad_remove,
+};
+module_platform_driver(msm_11ad_driver);
+
+/* hooks for the wil6210 driver */
+static int ops_bus_request(void *handle, u32 kbps /* KBytes/Sec */)
+{
+ struct msm11ad_ctx *ctx = (struct msm11ad_ctx *)handle;
+ int rc, i;
+ int vote = 0; /* vote 0 in case requested kbps cannot be satisfied */
+ struct msm_bus_paths *usecase;
+ u32 usecase_kbps;
+ u32 min_kbps = ~0;
+
+ /* find the lowest usecase that is bigger than requested kbps */
+ for (i = 0; i < ctx->bus_scale->num_usecases; i++) {
+ usecase = &ctx->bus_scale->usecase[i];
+ /*
+ * assume we have single path (vectors[0]). If we ever
+ * have multiple paths, need to define the behavior
+ */
+ usecase_kbps = div64_u64(usecase->vectors[0].ib, 1000);
+ if (usecase_kbps >= kbps && usecase_kbps < min_kbps) {
+ min_kbps = usecase_kbps;
+ vote = i;
+ }
+ }
+
+ rc = msm_bus_scale_client_update_request(ctx->msm_bus_handle, vote);
+ if (rc)
+ dev_err(ctx->dev,
+ "Failed msm_bus voting. kbps=%d vote=%d, rc=%d\n",
+ kbps, vote, rc);
+
+ return rc;
+}
+
+static void ops_uninit(void *handle)
+{
+ struct msm11ad_ctx *ctx = (struct msm11ad_ctx *)handle;
+
+ if (ctx->msm_bus_handle) {
+ msm_bus_scale_unregister_client(ctx->msm_bus_handle);
+ ctx->msm_bus_handle = 0;
+ }
+
+ if (ctx->use_smmu) {
+ arm_iommu_detach_device(&ctx->pcidev->dev);
+ arm_iommu_release_mapping(ctx->mapping);
+ ctx->mapping = NULL;
+ }
+
+ memset(&ctx->rops, 0, sizeof(ctx->rops));
+ ctx->wil_handle = NULL;
+
+ ops_suspend(ctx);
+}
+
+static int msm_11ad_notify_crash(struct msm11ad_ctx *ctx)
+{
+ int rc;
+
+ if (ctx->subsys) {
+ dev_info(ctx->dev, "SSR requested\n");
+ ctx->recovery_in_progress = true;
+ rc = subsystem_restart_dev(ctx->subsys);
+ if (rc) {
+ dev_err(ctx->dev,
+ "subsystem_restart_dev fail: %d\n", rc);
+ ctx->recovery_in_progress = false;
+ }
+ }
+
+ return 0;
+}
+
+static int ops_notify(void *handle, enum wil_platform_event evt)
+{
+ struct msm11ad_ctx *ctx = (struct msm11ad_ctx *)handle;
+ int rc = 0;
+
+ switch (evt) {
+ case WIL_PLATFORM_EVT_FW_CRASH:
+ rc = msm_11ad_notify_crash(ctx);
+ break;
+ case WIL_PLATFORM_EVT_PRE_RESET:
+ /*
+ * TODO: Enable rf_clk3 clock before resetting the device to
+ * ensure stable ref clock during the device reset
+ */
+ break;
+ case WIL_PLATFORM_EVT_FW_RDY:
+ /*
+ * TODO: Disable rf_clk3 clock after the device is up to allow
+ * the device to control it via its GPIO for power saving
+ */
+ break;
+ default:
+ pr_debug("%s: Unhandled event %d\n", __func__, evt);
+ break;
+ }
+
+ return rc;
+}
+
+void *msm_11ad_dev_init(struct device *dev, struct wil_platform_ops *ops,
+ const struct wil_platform_rops *rops, void *wil_handle)
+{
+ struct pci_dev *pcidev = to_pci_dev(dev);
+ struct msm11ad_ctx *ctx = pcidev2ctx(pcidev);
+
+ if (!ctx) {
+ pr_err("Context not found for pcidev %p\n", pcidev);
+ return NULL;
+ }
+
+ /* bus scale */
+ ctx->msm_bus_handle =
+ msm_bus_scale_register_client(ctx->bus_scale);
+ if (!ctx->msm_bus_handle) {
+ dev_err(ctx->dev, "Failed msm_bus registration\n");
+ return NULL;
+ }
+ dev_info(ctx->dev, "msm_bus handle 0x%x\n", ctx->msm_bus_handle);
+ /* smmu */
+ if (msm_11ad_smmu_init(ctx)) {
+ msm_bus_scale_unregister_client(ctx->msm_bus_handle);
+ ctx->msm_bus_handle = 0;
+ return NULL;
+ }
+
+ /* subsystem restart */
+ if (rops) {
+ ctx->rops = *rops;
+ ctx->wil_handle = wil_handle;
+ }
+
+ /* fill ops */
+ memset(ops, 0, sizeof(*ops));
+ ops->bus_request = ops_bus_request;
+ ops->suspend = ops_suspend;
+ ops->resume = ops_resume;
+ ops->uninit = ops_uninit;
+ ops->notify = ops_notify;
+
+ return ctx;
+}
+EXPORT_SYMBOL(msm_11ad_dev_init);
+
+int msm_11ad_modinit(void)
+{
+ struct msm11ad_ctx *ctx = list_first_entry_or_null(&dev_list,
+ struct msm11ad_ctx,
+ list);
+
+ if (!ctx) {
+ pr_err("Context not found\n");
+ return -EINVAL;
+ }
+
+ if (ctx->pristine_state) {
+ /* in old kernels, pci_load_saved_state() is not exported;
+ * so use pci_load_and_free_saved_state()
+ * and re-allocate ctx->saved_state again
+ */
+ pci_load_and_free_saved_state(ctx->pcidev,
+ &ctx->pristine_state);
+ ctx->pristine_state = pci_store_saved_state(ctx->pcidev);
+ }
+
+ ctx->subsys_handle = subsystem_get(ctx->subsysdesc.name);
+
+ return ops_resume(ctx);
+}
+EXPORT_SYMBOL(msm_11ad_modinit);
+
+void msm_11ad_modexit(void)
+{
+ struct msm11ad_ctx *ctx = list_first_entry_or_null(&dev_list,
+ struct msm11ad_ctx,
+ list);
+
+ if (!ctx) {
+ pr_err("Context not found\n");
+ return;
+ }
+
+ if (ctx->subsys_handle) {
+ subsystem_put(ctx->subsys_handle);
+ ctx->subsys_handle = NULL;
+ }
+}
+EXPORT_SYMBOL(msm_11ad_modexit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Platform driver for Qualcomm Technologies, Inc. 11ad card");
+
diff --git a/drivers/platform/msm/msm_11ad/msm_11ad.h b/drivers/platform/msm/msm_11ad/msm_11ad.h
new file mode 100644
index 0000000..b15d512
--- /dev/null
+++ b/drivers/platform/msm/msm_11ad/msm_11ad.h
@@ -0,0 +1,40 @@
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MSM_11AD_H__
+#define __MSM_11AD_H__
+
+struct device;
+struct wil_platform_ops;
+struct wil_platform_rops;
+
+/* msm_11ad_dev_init - call when binding to device, during probe()
+ * @dev: device structure of pci device
+ * @ops: pointer to operations supported by platform driver
+ * Will be filled by this function call
+ * @rops: pointer to callback functions provided by wil device driver.
+ * the platform driver copies the structure contents to its
+ * internal storage. May be NULL if device driver does not
+ * support rops.
+ * @wil_handle: context for wil device driver, will be provided
+ * when platform driver invokes any of the callback
+ * functions in rops. May be NULL if rops is also NULL
+ */
+void *msm_11ad_dev_init(struct device *dev, struct wil_platform_ops *ops,
+ const struct wil_platform_rops *rops, void *wil_handle);
+
+/* call on insmod */
+int msm_11ad_modinit(void);
+
+/* call on rmmod */
+void msm_11ad_modexit(void);
+
+#endif /* __MSM_11AD_H__ */
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index 75f820ca..27ff38f 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -1583,7 +1583,7 @@ static void zfcp_fsf_open_wka_port_handler(struct zfcp_fsf_req *req)
int zfcp_fsf_open_wka_port(struct zfcp_fc_wka_port *wka_port)
{
struct zfcp_qdio *qdio = wka_port->adapter->qdio;
- struct zfcp_fsf_req *req = NULL;
+ struct zfcp_fsf_req *req;
int retval = -EIO;
spin_lock_irq(&qdio->req_q_lock);
@@ -1612,7 +1612,7 @@ int zfcp_fsf_open_wka_port(struct zfcp_fc_wka_port *wka_port)
zfcp_fsf_req_free(req);
out:
spin_unlock_irq(&qdio->req_q_lock);
- if (req && !IS_ERR(req))
+ if (!retval)
zfcp_dbf_rec_run_wka("fsowp_1", wka_port, req->req_id);
return retval;
}
@@ -1638,7 +1638,7 @@ static void zfcp_fsf_close_wka_port_handler(struct zfcp_fsf_req *req)
int zfcp_fsf_close_wka_port(struct zfcp_fc_wka_port *wka_port)
{
struct zfcp_qdio *qdio = wka_port->adapter->qdio;
- struct zfcp_fsf_req *req = NULL;
+ struct zfcp_fsf_req *req;
int retval = -EIO;
spin_lock_irq(&qdio->req_q_lock);
@@ -1667,7 +1667,7 @@ int zfcp_fsf_close_wka_port(struct zfcp_fc_wka_port *wka_port)
zfcp_fsf_req_free(req);
out:
spin_unlock_irq(&qdio->req_q_lock);
- if (req && !IS_ERR(req))
+ if (!retval)
zfcp_dbf_rec_run_wka("fscwp_1", wka_port, req->req_id);
return retval;
}
diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c
index 341ea32..792d3e7 100644
--- a/drivers/scsi/aacraid/comminit.c
+++ b/drivers/scsi/aacraid/comminit.c
@@ -50,9 +50,13 @@ struct aac_common aac_config = {
static inline int aac_is_msix_mode(struct aac_dev *dev)
{
- u32 status;
+ u32 status = 0;
- status = src_readl(dev, MUnit.OMR);
+ if (dev->pdev->device == PMC_DEVICE_S6 ||
+ dev->pdev->device == PMC_DEVICE_S7 ||
+ dev->pdev->device == PMC_DEVICE_S8) {
+ status = src_readl(dev, MUnit.OMR);
+ }
return (status & AAC_INT_MODE_MSIX);
}
diff --git a/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c b/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c
index e3b911c..91dfd58 100644
--- a/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c
+++ b/drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c
@@ -3929,6 +3929,7 @@ static struct configfs_attribute *ibmvscsis_tpg_attrs[] = {
static const struct target_core_fabric_ops ibmvscsis_ops = {
.module = THIS_MODULE,
.name = "ibmvscsis",
+ .max_data_sg_nents = MAX_TXU / PAGE_SIZE,
.get_fabric_name = ibmvscsis_get_fabric_name,
.tpg_get_wwn = ibmvscsis_get_fabric_wwn,
.tpg_get_tag = ibmvscsis_get_tag,
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
index f84a608..8a7941b 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
@@ -51,6 +51,7 @@
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <linux/pci.h>
+#include <linux/pci-aspm.h>
#include <linux/interrupt.h>
#include <linux/aer.h>
#include <linux/raid_class.h>
@@ -8706,6 +8707,8 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
switch (hba_mpi_version) {
case MPI2_VERSION:
+ pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S |
+ PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
/* Use mpt2sas driver host template for SAS 2.0 HBA's */
shost = scsi_host_alloc(&mpt2sas_driver_template,
sizeof(struct MPT3SAS_ADAPTER));
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 078d797..bea819e 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -1459,7 +1459,7 @@ qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
/* Don't abort commands in adapter during EEH
* recovery as it's not accessible/responding.
*/
- if (!ha->flags.eeh_busy) {
+ if (GET_CMD_SP(sp) && !ha->flags.eeh_busy) {
/* Get a reference to the sp and drop the lock.
* The reference ensures this sp->done() call
* - and not the call in qla2xxx_eh_abort() -
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index 935f782..9318829 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -1035,7 +1035,8 @@ int scsi_init_io(struct scsi_cmnd *cmd)
bool is_mq = (rq->mq_ctx != NULL);
int error;
- BUG_ON(!rq->nr_phys_segments);
+ if (WARN_ON_ONCE(!rq->nr_phys_segments))
+ return -EINVAL;
error = scsi_init_sgtable(rq, &cmd->sdb);
if (error)
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index 8251f6e..c05cf3b 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -1754,6 +1754,10 @@ sg_start_req(Sg_request *srp, unsigned char *cmd)
return res;
iov_iter_truncate(&i, hp->dxfer_len);
+ if (!iov_iter_count(&i)) {
+ kfree(iov);
+ return -EINVAL;
+ }
res = blk_rq_map_user_iov(q, rq, md, &i, GFP_ATOMIC);
kfree(iov);
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index aa7ff12..80b5874 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -1390,8 +1390,10 @@ static int connect_port_ch(struct slim_controller *ctrl, u8 ch, u32 ph,
txn.mc = SLIM_MSG_MC_CONNECT_SINK;
buf[0] = pn;
buf[1] = ctrl->chans[ch].chan;
- if (la == SLIM_LA_MANAGER)
+ if (la == SLIM_LA_MANAGER) {
ctrl->ports[pn].flow = flow;
+ ctrl->ports[pn].ch = &ctrl->chans[ch].prop;
+ }
ret = slim_processtxn(ctrl, &txn, false);
if (!ret && la == SLIM_LA_MANAGER)
ctrl->ports[pn].state = SLIM_P_CFG;
@@ -1467,7 +1469,6 @@ int slim_connect_src(struct slim_device *sb, u32 srch, u16 chanh)
ret = -EALREADY;
goto connect_src_err;
}
- ctrl->ports[pn].ch = &slc->prop;
ret = connect_port_ch(ctrl, chan, srch, SLIM_SRC);
if (!ret)
@@ -1522,16 +1523,15 @@ int slim_connect_sink(struct slim_device *sb, u32 *sinkh, int nsink, u16 chanh)
u8 la = SLIM_HDL_TO_LA(sinkh[j]);
u8 pn = SLIM_HDL_TO_PORT(sinkh[j]);
- if (la != SLIM_LA_MANAGER && flow != SLIM_SINK) {
+ if (la != SLIM_LA_MANAGER && flow != SLIM_SINK)
ret = -EINVAL;
- } else if (la == SLIM_LA_MANAGER &&
+ else if (la == SLIM_LA_MANAGER &&
(pn >= ctrl->nports ||
- ctrl->ports[pn].state != SLIM_P_UNCFG)) {
+ ctrl->ports[pn].state != SLIM_P_UNCFG))
ret = -EINVAL;
- } else {
- ctrl->ports[pn].ch = &slc->prop;
+ else
ret = connect_port_ch(ctrl, chan, sinkh[j], SLIM_SINK);
- }
+
if (ret) {
for (j = j - 1; j >= 0; j--)
disconnect_port_ch(ctrl, sinkh[j]);
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index aa51411..a072d35 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -525,6 +525,15 @@
for the platforms that use APRv2.
Say M if you want to enable this module.
+config MSM_CDSP_LOADER
+ tristate "CDSP loader support"
+ depends on MSM_GLINK
+ help
+ Enable CDSP image loader.
+ The CDSP loader brings CDSP out of reset
+ for platforms that have compute DSP.
+ Say M if you want to enable this module.
+
config MSM_AVTIMER
tristate "Avtimer Driver"
depends on MSM_QDSP6_APRV2_GLINK || MSM_QDSP6_APRV3_GLINK
diff --git a/drivers/soc/qcom/qdsp6v2/Makefile b/drivers/soc/qcom/qdsp6v2/Makefile
index f3505ba..8c5b0d0 100644
--- a/drivers/soc/qcom/qdsp6v2/Makefile
+++ b/drivers/soc/qcom/qdsp6v2/Makefile
@@ -7,3 +7,4 @@
obj-$(CONFIG_MSM_QDSP6_SSR) += audio_ssr.o
obj-$(CONFIG_MSM_QDSP6_PDR) += audio_pdr.o
obj-$(CONFIG_MSM_QDSP6_NOTIFIER) += audio_notifier.o
+obj-$(CONFIG_MSM_CDSP_LOADER) += cdsp-loader.o
diff --git a/drivers/soc/qcom/qdsp6v2/cdsp-loader.c b/drivers/soc/qcom/qdsp6v2/cdsp-loader.c
new file mode 100644
index 0000000..9bb4eb0
--- /dev/null
+++ b/drivers/soc/qcom/qdsp6v2/cdsp-loader.c
@@ -0,0 +1,271 @@
+/*
+ * Copyright (c) 2012-2014, 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/of_device.h>
+#include <linux/sysfs.h>
+#include <soc/qcom/subsystem_restart.h>
+
+#define BOOT_CMD 1
+#define IMAGE_UNLOAD_CMD 0
+
+#define CDSP_SUBSYS_DOWN 0
+#define CDSP_SUBSYS_LOADED 1
+
+static ssize_t cdsp_boot_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t count);
+
+struct cdsp_loader_private {
+ void *pil_h;
+ struct kobject *boot_cdsp_obj;
+ struct attribute_group *attr_group;
+};
+
+static struct kobj_attribute cdsp_boot_attribute =
+ __ATTR(boot, 0220, NULL, cdsp_boot_store);
+
+static struct attribute *attrs[] = {
+ &cdsp_boot_attribute.attr,
+ NULL,
+};
+
+static u32 cdsp_state = CDSP_SUBSYS_DOWN;
+static struct platform_device *cdsp_private;
+static void cdsp_loader_unload(struct platform_device *pdev);
+
+static int cdsp_loader_do(struct platform_device *pdev)
+{
+ struct cdsp_loader_private *priv = NULL;
+
+ int rc = 0;
+ const char *img_name;
+
+ if (!pdev) {
+ dev_err(&pdev->dev, "%s: Platform device null\n", __func__);
+ goto fail;
+ }
+
+ if (!pdev->dev.of_node) {
+ dev_err(&pdev->dev,
+ "%s: Device tree information missing\n", __func__);
+
+ goto fail;
+ }
+
+ rc = of_property_read_string(pdev->dev.of_node,
+ "qcom,proc-img-to-load",
+ &img_name);
+ if (rc)
+ goto fail;
+
+ if (!strcmp(img_name, "cdsp")) {
+ /* cdsp_state always returns "0".*/
+ if (cdsp_state == CDSP_SUBSYS_DOWN) {
+ priv = platform_get_drvdata(pdev);
+ if (!priv) {
+ dev_err(&pdev->dev,
+ " %s: Private data get failed\n", __func__);
+ goto fail;
+ }
+
+ priv->pil_h = subsystem_get("cdsp");
+ if (IS_ERR(priv->pil_h)) {
+ dev_err(&pdev->dev, "%s: pil get failed,\n",
+ __func__);
+ goto fail;
+ }
+
+ /* Set the state of the CDSP.*/
+ cdsp_state = CDSP_SUBSYS_LOADED;
+ } else if (cdsp_state == CDSP_SUBSYS_LOADED) {
+ dev_dbg(&pdev->dev,
+ "%s: CDSP state = %x\n", __func__, cdsp_state);
+ }
+
+ dev_dbg(&pdev->dev, "%s: CDSP image is loaded\n", __func__);
+ return rc;
+ }
+
+fail:
+ dev_err(&pdev->dev, "%s: CDSP image loading failed\n", __func__);
+ return rc;
+}
+
+
+static ssize_t cdsp_boot_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf,
+ size_t count)
+{
+ int boot = 0, ret = 0;
+
+ ret = sscanf(buf, "%du", &boot);
+
+ if (ret != 1)
+ pr_debug("%s: invalid arguments for cdsp_loader.\n", __func__);
+
+ if (boot == BOOT_CMD) {
+ pr_debug("%s: going to call cdsp_loader_do\n", __func__);
+ cdsp_loader_do(cdsp_private);
+ } else if (boot == IMAGE_UNLOAD_CMD) {
+ pr_debug("%s: going to call adsp_unloader\n", __func__);
+ cdsp_loader_unload(cdsp_private);
+ }
+ return count;
+}
+
+static void cdsp_loader_unload(struct platform_device *pdev)
+{
+ struct cdsp_loader_private *priv = NULL;
+
+ priv = platform_get_drvdata(pdev);
+
+ if (!priv)
+ return;
+
+ if (priv->pil_h) {
+ dev_dbg(&pdev->dev, "%s: calling subsystem put\n", __func__);
+ subsystem_put(priv->pil_h);
+ priv->pil_h = NULL;
+ }
+}
+
+static int cdsp_loader_init_sysfs(struct platform_device *pdev)
+{
+ int ret = -EINVAL;
+ struct cdsp_loader_private *priv = NULL;
+
+ cdsp_private = NULL;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv) {
+ ret = -ENOMEM;
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, priv);
+
+ priv->pil_h = NULL;
+ priv->boot_cdsp_obj = NULL;
+ priv->attr_group = devm_kzalloc(&pdev->dev,
+ sizeof(*(priv->attr_group)),
+ GFP_KERNEL);
+ if (!priv->attr_group) {
+ dev_err(&pdev->dev, "%s: malloc attr_group failed\n",
+ __func__);
+ ret = -ENOMEM;
+ goto error_return;
+ }
+
+ priv->attr_group->attrs = attrs;
+
+ priv->boot_cdsp_obj = kobject_create_and_add("boot_cdsp", kernel_kobj);
+ if (!priv->boot_cdsp_obj) {
+ dev_err(&pdev->dev, "%s: sysfs create and add failed\n",
+ __func__);
+ ret = -ENOMEM;
+ goto error_return;
+ }
+
+ ret = sysfs_create_group(priv->boot_cdsp_obj, priv->attr_group);
+ if (ret) {
+ dev_err(&pdev->dev, "%s: sysfs create group failed %d\n",
+ __func__, ret);
+ goto error_return;
+ }
+
+ cdsp_private = pdev;
+
+ return 0;
+
+error_return:
+
+ if (priv->boot_cdsp_obj) {
+ kobject_del(priv->boot_cdsp_obj);
+ priv->boot_cdsp_obj = NULL;
+ }
+
+ return ret;
+}
+
+static int cdsp_loader_remove(struct platform_device *pdev)
+{
+ struct cdsp_loader_private *priv = NULL;
+
+ priv = platform_get_drvdata(pdev);
+
+ if (!priv)
+ return 0;
+
+ if (priv->pil_h) {
+ subsystem_put(priv->pil_h);
+ priv->pil_h = NULL;
+ }
+
+ if (priv->boot_cdsp_obj) {
+ sysfs_remove_group(priv->boot_cdsp_obj, priv->attr_group);
+ kobject_del(priv->boot_cdsp_obj);
+ priv->boot_cdsp_obj = NULL;
+ }
+
+ return 0;
+}
+
+static int cdsp_loader_probe(struct platform_device *pdev)
+{
+ int ret = cdsp_loader_init_sysfs(pdev);
+
+ if (ret != 0) {
+ dev_err(&pdev->dev, "%s: Error in initing sysfs\n", __func__);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id cdsp_loader_dt_match[] = {
+ { .compatible = "qcom,cdsp-loader" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, cdsp_loader_dt_match);
+
+static struct platform_driver cdsp_loader_driver = {
+ .driver = {
+ .name = "cdsp-loader",
+ .owner = THIS_MODULE,
+ .of_match_table = cdsp_loader_dt_match,
+ },
+ .probe = cdsp_loader_probe,
+ .remove = cdsp_loader_remove,
+};
+
+static int __init cdsp_loader_init(void)
+{
+ return platform_driver_register(&cdsp_loader_driver);
+}
+module_init(cdsp_loader_init);
+
+static void __exit cdsp_loader_exit(void)
+{
+ platform_driver_unregister(&cdsp_loader_driver);
+}
+module_exit(cdsp_loader_exit);
+
+MODULE_DESCRIPTION("CDSP Loader module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c
index 6b42348..ea9617c 100644
--- a/drivers/target/target_core_device.c
+++ b/drivers/target/target_core_device.c
@@ -351,7 +351,15 @@ int core_enable_device_list_for_node(
kfree(new);
return -EINVAL;
}
- BUG_ON(orig->se_lun_acl != NULL);
+ if (orig->se_lun_acl != NULL) {
+ pr_warn_ratelimited("Detected existing explicit"
+ " se_lun_acl->se_lun_group reference for %s"
+ " mapped_lun: %llu, failing\n",
+ nacl->initiatorname, mapped_lun);
+ mutex_unlock(&nacl->lun_entry_mutex);
+ kfree(new);
+ return -EINVAL;
+ }
rcu_assign_pointer(new->se_lun, lun);
rcu_assign_pointer(new->se_lun_acl, lun_acl);
diff --git a/drivers/target/target_core_sbc.c b/drivers/target/target_core_sbc.c
index 04f616b..aabd660 100644
--- a/drivers/target/target_core_sbc.c
+++ b/drivers/target/target_core_sbc.c
@@ -450,6 +450,7 @@ static sense_reason_t compare_and_write_post(struct se_cmd *cmd, bool success,
int *post_ret)
{
struct se_device *dev = cmd->se_dev;
+ sense_reason_t ret = TCM_NO_SENSE;
/*
* Only set SCF_COMPARE_AND_WRITE_POST to force a response fall-through
@@ -457,9 +458,12 @@ static sense_reason_t compare_and_write_post(struct se_cmd *cmd, bool success,
* sent to the backend driver.
*/
spin_lock_irq(&cmd->t_state_lock);
- if ((cmd->transport_state & CMD_T_SENT) && !cmd->scsi_status) {
+ if (cmd->transport_state & CMD_T_SENT) {
cmd->se_cmd_flags |= SCF_COMPARE_AND_WRITE_POST;
*post_ret = 1;
+
+ if (cmd->scsi_status == SAM_STAT_CHECK_CONDITION)
+ ret = TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;
}
spin_unlock_irq(&cmd->t_state_lock);
@@ -469,7 +473,7 @@ static sense_reason_t compare_and_write_post(struct se_cmd *cmd, bool success,
*/
up(&dev->caw_sem);
- return TCM_NO_SENSE;
+ return ret;
}
static sense_reason_t compare_and_write_callback(struct se_cmd *cmd, bool success,
diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c
index 7dfefd6..767d1eb6 100644
--- a/drivers/target/target_core_transport.c
+++ b/drivers/target/target_core_transport.c
@@ -457,8 +457,20 @@ static void target_complete_nacl(struct kref *kref)
{
struct se_node_acl *nacl = container_of(kref,
struct se_node_acl, acl_kref);
+ struct se_portal_group *se_tpg = nacl->se_tpg;
- complete(&nacl->acl_free_comp);
+ if (!nacl->dynamic_stop) {
+ complete(&nacl->acl_free_comp);
+ return;
+ }
+
+ mutex_lock(&se_tpg->acl_node_mutex);
+ list_del(&nacl->acl_list);
+ mutex_unlock(&se_tpg->acl_node_mutex);
+
+ core_tpg_wait_for_nacl_pr_ref(nacl);
+ core_free_device_list_for_node(nacl, se_tpg);
+ kfree(nacl);
}
void target_put_nacl(struct se_node_acl *nacl)
@@ -499,12 +511,39 @@ EXPORT_SYMBOL(transport_deregister_session_configfs);
void transport_free_session(struct se_session *se_sess)
{
struct se_node_acl *se_nacl = se_sess->se_node_acl;
+
/*
* Drop the se_node_acl->nacl_kref obtained from within
* core_tpg_get_initiator_node_acl().
*/
if (se_nacl) {
+ struct se_portal_group *se_tpg = se_nacl->se_tpg;
+ const struct target_core_fabric_ops *se_tfo = se_tpg->se_tpg_tfo;
+ unsigned long flags;
+
se_sess->se_node_acl = NULL;
+
+ /*
+ * Also determine if we need to drop the extra ->cmd_kref if
+ * it had been previously dynamically generated, and
+ * the endpoint is not caching dynamic ACLs.
+ */
+ mutex_lock(&se_tpg->acl_node_mutex);
+ if (se_nacl->dynamic_node_acl &&
+ !se_tfo->tpg_check_demo_mode_cache(se_tpg)) {
+ spin_lock_irqsave(&se_nacl->nacl_sess_lock, flags);
+ if (list_empty(&se_nacl->acl_sess_list))
+ se_nacl->dynamic_stop = true;
+ spin_unlock_irqrestore(&se_nacl->nacl_sess_lock, flags);
+
+ if (se_nacl->dynamic_stop)
+ list_del(&se_nacl->acl_list);
+ }
+ mutex_unlock(&se_tpg->acl_node_mutex);
+
+ if (se_nacl->dynamic_stop)
+ target_put_nacl(se_nacl);
+
target_put_nacl(se_nacl);
}
if (se_sess->sess_cmd_map) {
@@ -518,16 +557,12 @@ EXPORT_SYMBOL(transport_free_session);
void transport_deregister_session(struct se_session *se_sess)
{
struct se_portal_group *se_tpg = se_sess->se_tpg;
- const struct target_core_fabric_ops *se_tfo;
- struct se_node_acl *se_nacl;
unsigned long flags;
- bool drop_nacl = false;
if (!se_tpg) {
transport_free_session(se_sess);
return;
}
- se_tfo = se_tpg->se_tpg_tfo;
spin_lock_irqsave(&se_tpg->session_lock, flags);
list_del(&se_sess->sess_list);
@@ -535,33 +570,15 @@ void transport_deregister_session(struct se_session *se_sess)
se_sess->fabric_sess_ptr = NULL;
spin_unlock_irqrestore(&se_tpg->session_lock, flags);
- /*
- * Determine if we need to do extra work for this initiator node's
- * struct se_node_acl if it had been previously dynamically generated.
- */
- se_nacl = se_sess->se_node_acl;
-
- mutex_lock(&se_tpg->acl_node_mutex);
- if (se_nacl && se_nacl->dynamic_node_acl) {
- if (!se_tfo->tpg_check_demo_mode_cache(se_tpg)) {
- list_del(&se_nacl->acl_list);
- drop_nacl = true;
- }
- }
- mutex_unlock(&se_tpg->acl_node_mutex);
-
- if (drop_nacl) {
- core_tpg_wait_for_nacl_pr_ref(se_nacl);
- core_free_device_list_for_node(se_nacl, se_tpg);
- se_sess->se_node_acl = NULL;
- kfree(se_nacl);
- }
pr_debug("TARGET_CORE[%s]: Deregistered fabric_sess\n",
se_tpg->se_tpg_tfo->get_fabric_name());
/*
* If last kref is dropping now for an explicit NodeACL, awake sleeping
* ->acl_free_comp caller to wakeup configfs se_node_acl->acl_group
* removal context from within transport_free_session() code.
+ *
+ * For dynamic ACL, target_put_nacl() uses target_complete_nacl()
+ * to release all remaining generate_node_acl=1 created ACL resources.
*/
transport_free_session(se_sess);
@@ -3086,7 +3103,6 @@ static void target_tmr_work(struct work_struct *work)
spin_unlock_irqrestore(&cmd->t_state_lock, flags);
goto check_stop;
}
- cmd->t_state = TRANSPORT_ISTATE_PROCESSING;
spin_unlock_irqrestore(&cmd->t_state_lock, flags);
cmd->se_tfo->queue_tm_rsp(cmd);
@@ -3099,11 +3115,25 @@ int transport_generic_handle_tmr(
struct se_cmd *cmd)
{
unsigned long flags;
+ bool aborted = false;
spin_lock_irqsave(&cmd->t_state_lock, flags);
- cmd->transport_state |= CMD_T_ACTIVE;
+ if (cmd->transport_state & CMD_T_ABORTED) {
+ aborted = true;
+ } else {
+ cmd->t_state = TRANSPORT_ISTATE_PROCESSING;
+ cmd->transport_state |= CMD_T_ACTIVE;
+ }
spin_unlock_irqrestore(&cmd->t_state_lock, flags);
+ if (aborted) {
+ pr_warn_ratelimited("handle_tmr caught CMD_T_ABORTED TMR %d"
+ "ref_tag: %llu tag: %llu\n", cmd->se_tmr_req->function,
+ cmd->se_tmr_req->ref_task_tag, cmd->tag);
+ transport_cmd_check_stop_to_fabric(cmd);
+ return 0;
+ }
+
INIT_WORK(&cmd->work, target_tmr_work);
queue_work(cmd->se_dev->tmr_wq, &cmd->work);
return 0;
diff --git a/drivers/target/target_core_xcopy.c b/drivers/target/target_core_xcopy.c
index 094a144..18848ba 100644
--- a/drivers/target/target_core_xcopy.c
+++ b/drivers/target/target_core_xcopy.c
@@ -836,7 +836,7 @@ static void target_xcopy_do_work(struct work_struct *work)
" CHECK_CONDITION -> sending response\n", rc);
ec_cmd->scsi_status = SAM_STAT_CHECK_CONDITION;
}
- target_complete_cmd(ec_cmd, SAM_STAT_CHECK_CONDITION);
+ target_complete_cmd(ec_cmd, ec_cmd->scsi_status);
}
sense_reason_t target_do_xcopy(struct se_cmd *se_cmd)
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index 7acbd2c..1782804 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -5648,6 +5648,10 @@ long btrfs_ioctl(struct file *file, unsigned int
#ifdef CONFIG_COMPAT
long btrfs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
+ /*
+ * These all access 32-bit values anyway so no further
+ * handling is necessary.
+ */
switch (cmd) {
case FS_IOC32_GETFLAGS:
cmd = FS_IOC_GETFLAGS;
@@ -5658,8 +5662,6 @@ long btrfs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
case FS_IOC32_GETVERSION:
cmd = FS_IOC_GETVERSION;
break;
- default:
- return -ENOIOCTLCMD;
}
return btrfs_ioctl(file, cmd, (unsigned long) compat_ptr(arg));
diff --git a/fs/ext4/inline.c b/fs/ext4/inline.c
index 17a257c..dbef345 100644
--- a/fs/ext4/inline.c
+++ b/fs/ext4/inline.c
@@ -503,8 +503,16 @@ int ext4_readpage_inline(struct inode *inode, struct page *page)
return -EAGAIN;
}
- trace_android_fs_dataread_start(inode, page_offset(page), PAGE_SIZE,
- current->pid, current->comm);
+ if (trace_android_fs_dataread_start_enabled()) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_dataread_start(inode, page_offset(page),
+ PAGE_SIZE, current->pid,
+ path, current->comm);
+ }
/*
* Current inline data can only exist in the 1st page,
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 1db9080..46912da 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -1184,8 +1184,16 @@ static int ext4_write_begin(struct file *file, struct address_space *mapping,
pgoff_t index;
unsigned from, to;
- trace_android_fs_datawrite_start(inode, pos, len,
- current->pid, current->comm);
+ if (trace_android_fs_datawrite_start_enabled()) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_datawrite_start(inode, pos, len,
+ current->pid, path,
+ current->comm);
+ }
trace_ext4_write_begin(inode, pos, len, flags);
/*
* Reserve one block more for addition to orphan list in case
@@ -2902,8 +2910,16 @@ static int ext4_da_write_begin(struct file *file, struct address_space *mapping,
len, flags, pagep, fsdata);
}
*fsdata = (void *)0;
- trace_android_fs_datawrite_start(inode, pos, len,
- current->pid, current->comm);
+ if (trace_android_fs_datawrite_start_enabled()) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_datawrite_start(inode, pos, len,
+ current->pid,
+ path, current->comm);
+ }
trace_ext4_da_write_begin(inode, pos, len, flags);
if (ext4_test_inode_state(inode, EXT4_STATE_MAY_INLINE_DATA)) {
@@ -3597,16 +3613,27 @@ static ssize_t ext4_direct_IO(struct kiocb *iocb, struct iov_iter *iter)
return 0;
if (trace_android_fs_dataread_start_enabled() &&
- (rw == READ))
- trace_android_fs_dataread_start(inode, offset, count,
- current->pid,
- current->comm);
- if (trace_android_fs_datawrite_start_enabled() &&
- (rw == WRITE))
- trace_android_fs_datawrite_start(inode, offset, count,
- current->pid,
- current->comm);
+ (rw == READ)) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_dataread_start(inode, offset, count,
+ current->pid, path,
+ current->comm);
+ }
+ if (trace_android_fs_datawrite_start_enabled() &&
+ (rw == WRITE)) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_datawrite_start(inode, offset, count,
+ current->pid, path,
+ current->comm);
+ }
trace_ext4_direct_IO_enter(inode, offset, count, iov_iter_rw(iter));
if (iov_iter_rw(iter) == READ)
ret = ext4_direct_IO_read(iocb, iter);
@@ -3839,6 +3866,11 @@ static int ext4_block_truncate_page(handle_t *handle,
unsigned blocksize;
struct inode *inode = mapping->host;
+ /* If we are processing an encrypted inode during orphan list
+ * handling */
+ if (ext4_encrypted_inode(inode) && !fscrypt_has_encryption_key(inode))
+ return 0;
+
blocksize = inode->i_sb->s_blocksize;
length = blocksize - (offset & (blocksize - 1));
diff --git a/fs/ext4/readpage.c b/fs/ext4/readpage.c
index 77cf54c..2531cc1 100644
--- a/fs/ext4/readpage.c
+++ b/fs/ext4/readpage.c
@@ -117,11 +117,17 @@ ext4_submit_bio_read(struct bio *bio)
struct page *first_page = bio->bi_io_vec[0].bv_page;
if (first_page != NULL) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ first_page->mapping->host);
trace_android_fs_dataread_start(
first_page->mapping->host,
page_offset(first_page),
bio->bi_iter.bi_size,
current->pid,
+ path,
current->comm);
}
}
diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c
index aee4a45..2c5ae0b 100644
--- a/fs/f2fs/data.c
+++ b/fs/f2fs/data.c
@@ -1607,8 +1607,16 @@ static int f2fs_write_begin(struct file *file, struct address_space *mapping,
block_t blkaddr = NULL_ADDR;
int err = 0;
- trace_android_fs_datawrite_start(inode, pos, len,
- current->pid, current->comm);
+ if (trace_android_fs_datawrite_start_enabled()) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_datawrite_start(inode, pos, len,
+ current->pid, path,
+ current->comm);
+ }
trace_f2fs_write_begin(inode, pos, len, flags);
/*
@@ -1763,14 +1771,27 @@ static ssize_t f2fs_direct_IO(struct kiocb *iocb, struct iov_iter *iter)
trace_f2fs_direct_IO_enter(inode, offset, count, rw);
if (trace_android_fs_dataread_start_enabled() &&
- (rw == READ))
+ (rw == READ)) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
trace_android_fs_dataread_start(inode, offset,
- count, current->pid,
+ count, current->pid, path,
current->comm);
+ }
if (trace_android_fs_datawrite_start_enabled() &&
- (rw == WRITE))
+ (rw == WRITE)) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
trace_android_fs_datawrite_start(inode, offset, count,
- current->pid, current->comm);
+ current->pid, path,
+ current->comm);
+ }
down_read(&F2FS_I(inode)->dio_rwsem[rw]);
err = blockdev_direct_IO(iocb, inode, iter, get_data_block_dio);
diff --git a/fs/f2fs/inline.c b/fs/f2fs/inline.c
index d534f44..1427db9 100644
--- a/fs/f2fs/inline.c
+++ b/fs/f2fs/inline.c
@@ -83,9 +83,16 @@ int f2fs_read_inline_data(struct inode *inode, struct page *page)
{
struct page *ipage;
- trace_android_fs_dataread_start(inode, page_offset(page),
- PAGE_SIZE, current->pid,
- current->comm);
+ if (trace_android_fs_dataread_start_enabled()) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ inode);
+ trace_android_fs_dataread_start(inode, page_offset(page),
+ PAGE_SIZE, current->pid,
+ path, current->comm);
+ }
ipage = get_node_page(F2FS_I_SB(inode), inode->i_ino);
if (IS_ERR(ipage)) {
diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index 3fd1e21..83511cb 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -401,6 +401,10 @@ static void request_end(struct fuse_conn *fc, struct fuse_req *req)
static void queue_interrupt(struct fuse_iqueue *fiq, struct fuse_req *req)
{
spin_lock(&fiq->waitq.lock);
+ if (test_bit(FR_FINISHED, &req->flags)) {
+ spin_unlock(&fiq->waitq.lock);
+ return;
+ }
if (list_empty(&req->intr_entry)) {
list_add_tail(&req->intr_entry, &fiq->interrupts);
wake_up_locked(&fiq->waitq);
@@ -1376,6 +1380,7 @@ static ssize_t fuse_dev_splice_read(struct file *in, loff_t *ppos,
* code can Oops if the buffer persists after module unload.
*/
bufs[page_nr].ops = &nosteal_pipe_buf_ops;
+ bufs[page_nr].flags = 0;
ret = add_to_pipe(pipe, &bufs[page_nr++]);
if (unlikely(ret < 0))
break;
diff --git a/fs/mpage.c b/fs/mpage.c
index 2bb117d..802b481 100644
--- a/fs/mpage.c
+++ b/fs/mpage.c
@@ -80,11 +80,17 @@ static struct bio *mpage_bio_submit(int op, int op_flags, struct bio *bio)
struct page *first_page = bio->bi_io_vec[0].bv_page;
if (first_page != NULL) {
+ char *path, pathbuf[MAX_TRACE_PATHBUF_LEN];
+
+ path = android_fstrace_get_pathname(pathbuf,
+ MAX_TRACE_PATHBUF_LEN,
+ first_page->mapping->host);
trace_android_fs_dataread_start(
first_page->mapping->host,
page_offset(first_page),
bio->bi_iter.bi_size,
current->pid,
+ path,
current->comm);
}
}
diff --git a/fs/splice.c b/fs/splice.c
index 63b8f54..8dd79ec 100644
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -203,6 +203,7 @@ ssize_t splice_to_pipe(struct pipe_inode_info *pipe,
buf->len = spd->partial[page_nr].len;
buf->private = spd->partial[page_nr].private;
buf->ops = spd->ops;
+ buf->flags = 0;
pipe->nrbufs++;
page_nr++;
diff --git a/include/linux/can/core.h b/include/linux/can/core.h
index a087500..df08a41 100644
--- a/include/linux/can/core.h
+++ b/include/linux/can/core.h
@@ -45,10 +45,9 @@ struct can_proto {
extern int can_proto_register(const struct can_proto *cp);
extern void can_proto_unregister(const struct can_proto *cp);
-extern int can_rx_register(struct net_device *dev, canid_t can_id,
- canid_t mask,
- void (*func)(struct sk_buff *, void *),
- void *data, char *ident);
+int can_rx_register(struct net_device *dev, canid_t can_id, canid_t mask,
+ void (*func)(struct sk_buff *, void *),
+ void *data, char *ident, struct sock *sk);
extern void can_rx_unregister(struct net_device *dev, canid_t can_id,
canid_t mask,
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 0839818..3a4f264 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -186,6 +186,7 @@ extern void clocksource_suspend(void);
extern void clocksource_resume(void);
extern struct clocksource * __init clocksource_default_clock(void);
extern void clocksource_mark_unstable(struct clocksource *cs);
+extern void clocksource_select_force(void);
extern u64
clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles);
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 9535e79..ec7047c 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012, 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -175,6 +175,7 @@ struct coresight_device {
const struct coresight_ops *ops;
struct device dev;
atomic_t *refcnt;
+ struct coresight_path *node;
bool orphan;
bool enable; /* true only if configured as part of a path */
bool activated; /* true only if a sink is part of a path */
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index eec093c..b8eb25b 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -567,7 +567,7 @@ static inline void cpumask_copy(struct cpumask *dstp,
static inline int cpumask_parse_user(const char __user *buf, int len,
struct cpumask *dstp)
{
- return bitmap_parse_user(buf, len, cpumask_bits(dstp), nr_cpu_ids);
+ return bitmap_parse_user(buf, len, cpumask_bits(dstp), nr_cpumask_bits);
}
/**
@@ -582,7 +582,7 @@ static inline int cpumask_parselist_user(const char __user *buf, int len,
struct cpumask *dstp)
{
return bitmap_parselist_user(buf, len, cpumask_bits(dstp),
- nr_cpu_ids);
+ nr_cpumask_bits);
}
/**
@@ -597,7 +597,7 @@ static inline int cpumask_parse(const char *buf, struct cpumask *dstp)
char *nl = strchr(buf, '\n');
unsigned int len = nl ? (unsigned int)(nl - buf) : strlen(buf);
- return bitmap_parse(buf, len, cpumask_bits(dstp), nr_cpu_ids);
+ return bitmap_parse(buf, len, cpumask_bits(dstp), nr_cpumask_bits);
}
/**
@@ -609,7 +609,7 @@ static inline int cpumask_parse(const char *buf, struct cpumask *dstp)
*/
static inline int cpulist_parse(const char *buf, struct cpumask *dstp)
{
- return bitmap_parselist(buf, cpumask_bits(dstp), nr_cpu_ids);
+ return bitmap_parselist(buf, cpumask_bits(dstp), nr_cpumask_bits);
}
/**
diff --git a/include/linux/device.h b/include/linux/device.h
index d85101c..d469121 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -55,6 +55,8 @@ struct bus_attribute {
struct bus_attribute bus_attr_##_name = __ATTR_RW(_name)
#define BUS_ATTR_RO(_name) \
struct bus_attribute bus_attr_##_name = __ATTR_RO(_name)
+#define BUS_ATTR_WO(_name) \
+ struct bus_attribute bus_attr_##_name = __ATTR_WO(_name)
extern int __must_check bus_create_file(struct bus_type *,
struct bus_attribute *);
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index cd184bd..c92a083 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -128,6 +128,7 @@ struct hv_ring_buffer_info {
u32 ring_data_startoffset;
u32 priv_write_index;
u32 priv_read_index;
+ u32 cached_read_index;
};
/*
@@ -180,6 +181,19 @@ static inline u32 hv_get_bytes_to_write(struct hv_ring_buffer_info *rbi)
return write;
}
+static inline u32 hv_get_cached_bytes_to_write(
+ const struct hv_ring_buffer_info *rbi)
+{
+ u32 read_loc, write_loc, dsize, write;
+
+ dsize = rbi->ring_datasize;
+ read_loc = rbi->cached_read_index;
+ write_loc = rbi->ring_buffer->write_index;
+
+ write = write_loc >= read_loc ? dsize - (write_loc - read_loc) :
+ read_loc - write_loc;
+ return write;
+}
/*
* VMBUS version is 32 bit entity broken up into
* two 16 bit quantities: major_number. minor_number.
@@ -1447,6 +1461,7 @@ void hv_event_tasklet_enable(struct vmbus_channel *channel);
void hv_process_channel_removal(struct vmbus_channel *channel, u32 relid);
+void vmbus_setevent(struct vmbus_channel *channel);
/*
* Negotiated version with the Host.
*/
@@ -1479,10 +1494,11 @@ hv_get_ring_buffer(struct hv_ring_buffer_info *ring_info)
* there is room for the producer to send the pending packet.
*/
-static inline bool hv_need_to_signal_on_read(struct hv_ring_buffer_info *rbi)
+static inline void hv_signal_on_read(struct vmbus_channel *channel)
{
- u32 cur_write_sz;
+ u32 cur_write_sz, cached_write_sz;
u32 pending_sz;
+ struct hv_ring_buffer_info *rbi = &channel->inbound;
/*
* Issue a full memory barrier before making the signaling decision.
@@ -1500,14 +1516,26 @@ static inline bool hv_need_to_signal_on_read(struct hv_ring_buffer_info *rbi)
pending_sz = READ_ONCE(rbi->ring_buffer->pending_send_sz);
/* If the other end is not blocked on write don't bother. */
if (pending_sz == 0)
- return false;
+ return;
cur_write_sz = hv_get_bytes_to_write(rbi);
- if (cur_write_sz >= pending_sz)
- return true;
+ if (cur_write_sz < pending_sz)
+ return;
- return false;
+ cached_write_sz = hv_get_cached_bytes_to_write(rbi);
+ if (cached_write_sz < pending_sz)
+ vmbus_setevent(channel);
+
+ return;
+}
+
+static inline void
+init_cached_read_index(struct vmbus_channel *channel)
+{
+ struct hv_ring_buffer_info *rbi = &channel->inbound;
+
+ rbi->cached_read_index = rbi->ring_buffer->read_index;
}
/*
@@ -1571,6 +1599,8 @@ static inline void put_pkt_raw(struct vmbus_channel *channel,
* This call commits the read index and potentially signals the host.
* Here is the pattern for using the "in-place" consumption APIs:
*
+ * init_cached_read_index();
+ *
* while (get_next_pkt_raw() {
* process the packet "in-place";
* put_pkt_raw();
@@ -1589,8 +1619,7 @@ static inline void commit_rd_index(struct vmbus_channel *channel)
virt_rmb();
ring_info->ring_buffer->read_index = ring_info->priv_read_index;
- if (hv_need_to_signal_on_read(ring_info))
- vmbus_set_event(channel);
+ hv_signal_on_read(channel);
}
diff --git a/include/linux/ipa.h b/include/linux/ipa.h
index 5fc7dda..985d2f5 100644
--- a/include/linux/ipa.h
+++ b/include/linux/ipa.h
@@ -1412,7 +1412,8 @@ struct iommu_domain *ipa_get_smmu_domain(void);
int ipa_disable_apps_wan_cons_deaggr(uint32_t agg_size, uint32_t agg_count);
-struct ipa_gsi_ep_config *ipa_get_gsi_ep_info(int ipa_ep_idx);
+const struct ipa_gsi_ep_config *ipa_get_gsi_ep_info
+ (enum ipa_client_type client);
int ipa_stop_gsi_channel(u32 clnt_hdl);
@@ -2156,7 +2157,8 @@ static inline int ipa_disable_apps_wan_cons_deaggr(void)
return -EINVAL;
}
-static inline struct ipa_gsi_ep_config *ipa_get_gsi_ep_info(int ipa_ep_idx)
+static inline const struct ipa_gsi_ep_config *ipa_get_gsi_ep_info
+ (enum ipa_client_type client)
{
return NULL;
}
diff --git a/include/linux/memblock.h b/include/linux/memblock.h
index da25f07..f7033fa 100644
--- a/include/linux/memblock.h
+++ b/include/linux/memblock.h
@@ -341,7 +341,7 @@ int memblock_is_map_memory(phys_addr_t addr);
int memblock_is_region_memory(phys_addr_t base, phys_addr_t size);
bool memblock_is_reserved(phys_addr_t addr);
bool memblock_is_region_reserved(phys_addr_t base, phys_addr_t size);
-int memblock_overlaps_memory(phys_addr_t base, phys_addr_t size);
+bool memblock_overlaps_memory(phys_addr_t base, phys_addr_t size);
extern void __memblock_dump_all(void);
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index d213c76..a47c29e 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1508,6 +1508,7 @@ enum netdev_priv_flags {
* @mtu: Interface MTU value
* @type: Interface hardware type
* @hard_header_len: Maximum hardware header length.
+ * @min_header_len: Minimum hardware header length
*
* @needed_headroom: Extra headroom the hardware may need, but not in all
* cases can this be guaranteed
@@ -1728,6 +1729,7 @@ struct net_device {
unsigned int mtu;
unsigned short type;
unsigned short hard_header_len;
+ unsigned short min_header_len;
unsigned short needed_headroom;
unsigned short needed_tailroom;
@@ -2783,6 +2785,8 @@ static inline bool dev_validate_header(const struct net_device *dev,
{
if (likely(len >= dev->hard_header_len))
return true;
+ if (len < dev->min_header_len)
+ return false;
if (capable(CAP_SYS_RAWIO)) {
memset(ll_header + len, 0, dev->hard_header_len - len);
diff --git a/include/linux/qcom-geni-se.h b/include/linux/qcom-geni-se.h
new file mode 100644
index 0000000..5b644c5
--- /dev/null
+++ b/include/linux/qcom-geni-se.h
@@ -0,0 +1,452 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_QCOM_GENI_SE
+#define _LINUX_QCOM_GENI_SE
+#include <linux/io.h>
+
+enum se_xfer_mode {
+ INVALID,
+ FIFO_MODE,
+ GSI_DMA,
+};
+
+enum se_protocol_types {
+ NONE,
+ SPI,
+ UART,
+ I2C,
+ I3C
+};
+
+#define GENI_INIT_CFG_REVISION (0x0)
+#define GENI_S_INIT_CFG_REVISION (0x4)
+#define GENI_FORCE_DEFAULT_REG (0x20)
+#define GENI_OUTPUT_CTRL (0x24)
+#define GENI_CGC_CTRL (0x28)
+#define SE_GENI_STATUS (0x40)
+#define GENI_SER_M_CLK_CFG (0x48)
+#define GENI_SER_S_CLK_CFG (0x4C)
+#define GENI_CLK_CTRL_RO (0x60)
+#define GENI_IF_DISABLE_RO (0x64)
+#define GENI_FW_REVISION_RO (0x68)
+#define GENI_FW_S_REVISION_RO (0x6C)
+#define SE_GENI_CLK_SEL (0x7C)
+#define SE_GENI_DMA_MODE_EN (0x258)
+#define SE_GENI_TX_PACKING_CFG0 (0x260)
+#define SE_GENI_TX_PACKING_CFG1 (0x264)
+#define SE_GENI_RX_PACKING_CFG0 (0x284)
+#define SE_GENI_RX_PACKING_CFG1 (0x288)
+#define SE_GENI_M_CMD0 (0x600)
+#define SE_GENI_M_CMD_CTRL_REG (0x604)
+#define SE_GENI_M_IRQ_STATUS (0x610)
+#define SE_GENI_M_IRQ_EN (0x614)
+#define SE_GENI_M_IRQ_CLEAR (0x618)
+#define SE_GENI_S_CMD0 (0x630)
+#define SE_GENI_S_CMD_CTRL_REG (0x634)
+#define SE_GENI_S_IRQ_STATUS (0x640)
+#define SE_GENI_S_IRQ_EN (0x644)
+#define SE_GENI_S_IRQ_CLEAR (0x648)
+#define SE_GENI_TX_FIFOn (0x700)
+#define SE_GENI_RX_FIFOn (0x780)
+#define SE_GENI_TX_FIFO_STATUS (0x800)
+#define SE_GENI_RX_FIFO_STATUS (0x804)
+#define SE_GENI_TX_WATERMARK_REG (0x80C)
+#define SE_GENI_RX_WATERMARK_REG (0x810)
+#define SE_GENI_RX_RFR_WATERMARK_REG (0x814)
+#define SE_GENI_M_GP_LENGTH (0x910)
+#define SE_GENI_S_GP_LENGTH (0x914)
+#define SE_IRQ_EN (0xE1C)
+#define SE_HW_PARAM_0 (0xE24)
+#define SE_HW_PARAM_1 (0xE28)
+#define SE_DMA_GENERAL_CFG (0xE30)
+
+/* GENI_OUTPUT_CTRL fields */
+#define DEFAULT_IO_OUTPUT_CTRL_MSK (GENMASK(6, 0))
+
+/* GENI_FORCE_DEFAULT_REG fields */
+#define FORCE_DEFAULT (BIT(0))
+
+/* GENI_CGC_CTRL fields */
+#define CFG_AHB_CLK_CGC_ON (BIT(0))
+#define CFG_AHB_WR_ACLK_CGC_ON (BIT(1))
+#define DATA_AHB_CLK_CGC_ON (BIT(2))
+#define SCLK_CGC_ON (BIT(3))
+#define TX_CLK_CGC_ON (BIT(4))
+#define RX_CLK_CGC_ON (BIT(5))
+#define EXT_CLK_CGC_ON (BIT(6))
+#define PROG_RAM_HCLK_OFF (BIT(8))
+#define PROG_RAM_SCLK_OFF (BIT(9))
+#define DEFAULT_CGC_EN (GENMASK(6, 0))
+
+/* GENI_STATUS fields */
+#define M_GENI_CMD_ACTIVE (BIT(0))
+#define S_GENI_CMD_ACTIVE (BIT(12))
+
+/* GENI_SER_M_CLK_CFG/GENI_SER_S_CLK_CFG */
+#define SER_CLK_EN (BIT(0))
+#define CLK_DIV_MSK (GENMASK(15, 4))
+#define CLK_DIV_SHFT (4)
+
+/* CLK_CTRL_RO fields */
+
+/* IF_DISABLE_RO fields */
+
+/* FW_REVISION_RO fields */
+#define FW_REV_PROTOCOL_MSK (GENMASK(15, 8))
+#define FW_REV_PROTOCOL_SHFT (8)
+
+/* SE_GENI_DMA_MODE_EN */
+#define GENI_DMA_MODE_EN (BIT(0))
+
+/* GENI_M_CMD0 fields */
+#define M_OPCODE_MSK (GENMASK(31, 27))
+#define M_OPCODE_SHFT (27)
+#define M_PARAMS_MSK (GENMASK(26, 0))
+
+/* GENI_M_CMD_CTRL_REG */
+#define M_GENI_CMD_CANCEL BIT(2)
+#define M_GENI_CMD_ABORT BIT(1)
+#define M_GENI_DISABLE BIT(0)
+
+/* GENI_S_CMD0 fields */
+#define S_OPCODE_MSK (GENMASK(31, 27))
+#define S_OPCODE_SHFT (27)
+#define S_PARAMS_MSK (GENMASK(26, 0))
+
+/* GENI_S_CMD_CTRL_REG */
+#define S_GENI_CMD_CANCEL (BIT(2))
+#define S_GENI_CMD_ABORT (BIT(1))
+#define S_GENI_DISABLE (BIT(0))
+
+/* GENI_M_IRQ_EN fields */
+#define M_CMD_DONE_EN (BIT(0))
+#define M_CMD_OVERRUN_EN (BIT(1))
+#define M_ILLEGAL_CMD_EN (BIT(2))
+#define M_CMD_FAILURE_EN (BIT(3))
+#define M_CMD_CANCEL_EN (BIT(4))
+#define M_CMD_ABORT_EN (BIT(5))
+#define M_TIMESTAMP_EN (BIT(6))
+#define M_RX_IRQ_EN (BIT(7))
+#define M_GP_SYNC_IRQ_0_EN (BIT(8))
+#define M_GP_IRQ_0_EN (BIT(9))
+#define M_GP_IRQ_1_EN (BIT(10))
+#define M_GP_IRQ_2_EN (BIT(11))
+#define M_GP_IRQ_3_EN (BIT(12))
+#define M_GP_IRQ_4_EN (BIT(13))
+#define M_GP_IRQ_5_EN (BIT(14))
+#define M_IO_DATA_DEASSERT_EN (BIT(22))
+#define M_IO_DATA_ASSERT_EN (BIT(23))
+#define M_RX_FIFO_RD_ERR_EN (BIT(24))
+#define M_RX_FIFO_WR_ERR_EN (BIT(25))
+#define M_RX_FIFO_WATERMARK_EN (BIT(26))
+#define M_RX_FIFO_LAST_EN (BIT(27))
+#define M_TX_FIFO_RD_ERR_EN (BIT(28))
+#define M_TX_FIFO_WR_ERR_EN (BIT(29))
+#define M_TX_FIFO_WATERMARK_EN (BIT(30))
+#define M_SEC_IRQ_EN (BIT(31))
+#define M_COMMON_GENI_M_IRQ_EN (GENMASK(3, 0) | M_TIMESTAMP_EN | \
+ GENMASK(14, 8) | M_IO_DATA_DEASSERT_EN | \
+ M_IO_DATA_ASSERT_EN | M_RX_FIFO_RD_ERR_EN | \
+ M_RX_FIFO_WR_ERR_EN | M_TX_FIFO_RD_ERR_EN | \
+ M_TX_FIFO_WR_ERR_EN | M_SEC_IRQ_EN)
+
+/* GENI_S_IRQ_EN fields */
+#define S_CMD_DONE_EN (BIT(0))
+#define S_CMD_OVERRUN_EN (BIT(1))
+#define S_ILLEGAL_CMD_EN (BIT(2))
+#define S_CMD_FAILURE_EN (BIT(3))
+#define S_CMD_CANCEL_EN (BIT(4))
+#define S_CMD_ABORT_EN (BIT(5))
+#define S_GP_SYNC_IRQ_0_EN (BIT(8))
+#define S_GP_IRQ_0_EN (BIT(9))
+#define S_GP_IRQ_1_EN (BIT(10))
+#define S_GP_IRQ_2_EN (BIT(11))
+#define S_GP_IRQ_3_EN (BIT(12))
+#define S_GP_IRQ_4_EN (BIT(13))
+#define S_GP_IRQ_5_EN (BIT(14))
+#define S_IO_DATA_DEASSERT_EN (BIT(22))
+#define S_IO_DATA_ASSERT_EN (BIT(23))
+#define S_RX_FIFO_RD_ERR_EN (BIT(24))
+#define S_RX_FIFO_WR_ERR_EN (BIT(25))
+#define S_RX_FIFO_WATERMARK_EN (BIT(26))
+#define S_RX_FIFO_LAST_EN (BIT(27))
+#define S_COMMON_GENI_S_IRQ_EN (GENMASK(3, 0) | GENMASK(14, 8) | \
+ S_RX_FIFO_RD_ERR_EN | S_RX_FIFO_WR_ERR_EN)
+
+/* GENI_/TX/RX/RX_RFR/_WATERMARK_REG fields */
+#define WATERMARK_MSK (GENMASK(5, 0))
+
+/* GENI_TX_FIFO_STATUS fields */
+#define TX_FIFO_WC (GENMASK(27, 0))
+
+/* GENI_RX_FIFO_STATUS fields */
+#define RX_LAST (BIT(31))
+#define RX_LAST_BYTE_VALID_MSK (GENMASK(30, 28))
+#define RX_LAST_BYTE_VALID_SHFT (28)
+#define RX_FIFO_WC_MSK (GENMASK(24, 0))
+
+/* SE_IRQ_EN fields */
+#define DMA_RX_IRQ_EN (BIT(0))
+#define DMA_TX_IRQ_EN (BIT(1))
+#define GENI_M_IRQ_EN (BIT(2))
+#define GENI_S_IRQ_EN (BIT(3))
+
+/* SE_HW_PARAM_0 fields */
+#define TX_FIFO_WIDTH_MSK (GENMASK(29, 24))
+#define TX_FIFO_WIDTH_SHFT (24)
+#define TX_FIFO_DEPTH_MSK (GENMASK(21, 16))
+#define TX_FIFO_DEPTH_SHFT (16)
+
+/* SE_HW_PARAM_1 fields */
+#define RX_FIFO_WIDTH_MSK (GENMASK(29, 24))
+#define RX_FIFO_WIDTH_SHFT (24)
+#define RX_FIFO_DEPTH_MSK (GENMASK(21, 16))
+#define RX_FIFO_DEPTH_SHFT (16)
+
+/* SE_DMA_GENERAL_CFG */
+#define DMA_RX_CLK_CGC_ON (BIT(0))
+#define DMA_TX_CLK_CGC_ON (BIT(1))
+#define DMA_AHB_SLV_CFG_ON (BIT(2))
+#define AHB_SEC_SLV_CLK_CGC_ON (BIT(3))
+#define DUMMY_RX_NON_BUFFERABLE (BIT(4))
+#define RX_DMA_ZERO_PADDING_EN (BIT(5))
+#define RX_DMA_IRQ_DELAY_MSK (GENMASK(8, 6))
+#define RX_DMA_IRQ_DELAY_SHFT (6)
+
+static inline unsigned int geni_read_reg(void __iomem *base, int offset)
+{
+ return readl_relaxed(base + offset);
+}
+
+static inline void geni_write_reg(unsigned int value, void __iomem *base,
+ int offset)
+{
+ return writel_relaxed(value, (base + offset));
+}
+
+static inline int get_se_proto(void __iomem *base)
+{
+ int proto = 0;
+
+ proto = ((geni_read_reg(base, GENI_FW_REVISION_RO)
+ & FW_REV_PROTOCOL_MSK) >> FW_REV_PROTOCOL_SHFT);
+ return proto;
+}
+
+static inline int se_geni_irq_en(void __iomem *base, int mode)
+{
+ int ret = 0;
+ unsigned int common_geni_m_irq_en;
+ unsigned int common_geni_s_irq_en;
+ int proto = get_se_proto(base);
+
+ common_geni_m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN);
+ common_geni_s_irq_en = geni_read_reg(base, SE_GENI_S_IRQ_EN);
+ /* Common to all modes */
+ common_geni_m_irq_en |= M_COMMON_GENI_M_IRQ_EN;
+ common_geni_s_irq_en |= S_COMMON_GENI_S_IRQ_EN;
+
+ switch (mode) {
+ case FIFO_MODE:
+ {
+ if (proto == I2C) {
+ common_geni_m_irq_en |=
+ (M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN);
+ common_geni_s_irq_en |= S_CMD_DONE_EN;
+ }
+ break;
+ }
+ case GSI_DMA:
+ break;
+ default:
+ pr_err("%s: Invalid mode %d\n", __func__, mode);
+ ret = -ENXIO;
+ goto exit_irq_en;
+ }
+
+
+ geni_write_reg(common_geni_m_irq_en, base, SE_GENI_M_IRQ_EN);
+ geni_write_reg(common_geni_s_irq_en, base, SE_GENI_S_IRQ_EN);
+exit_irq_en:
+ return ret;
+}
+
+
+static inline void se_set_rx_rfr_wm(void __iomem *base, unsigned int rx_wm,
+ unsigned int rx_rfr)
+{
+ geni_write_reg(rx_wm, base, SE_GENI_RX_WATERMARK_REG);
+ geni_write_reg(rx_rfr, base, SE_GENI_RX_RFR_WATERMARK_REG);
+}
+
+static inline int se_io_set_mode(void __iomem *base, int mode)
+{
+ int ret = 0;
+ unsigned int io_mode = 0;
+ unsigned int geni_dma_mode = 0;
+
+ io_mode = geni_read_reg(base, SE_IRQ_EN);
+ geni_dma_mode = geni_read_reg(base, SE_GENI_DMA_MODE_EN);
+
+ switch (mode) {
+ case FIFO_MODE:
+ {
+ io_mode |= (GENI_M_IRQ_EN | GENI_S_IRQ_EN);
+ io_mode |= (DMA_TX_IRQ_EN | DMA_RX_IRQ_EN);
+ geni_dma_mode &= ~GENI_DMA_MODE_EN;
+ break;
+
+ }
+ default:
+ ret = -ENXIO;
+ goto exit_set_mode;
+ }
+ geni_write_reg(io_mode, base, SE_IRQ_EN);
+ geni_write_reg(geni_dma_mode, base, SE_GENI_DMA_MODE_EN);
+exit_set_mode:
+ return ret;
+}
+
+static inline void se_io_init(void __iomem *base)
+{
+ unsigned int io_op_ctrl = 0;
+ unsigned int geni_cgc_ctrl;
+ unsigned int dma_general_cfg;
+
+ geni_cgc_ctrl = geni_read_reg(base, GENI_CGC_CTRL);
+ dma_general_cfg = geni_read_reg(base, SE_DMA_GENERAL_CFG);
+ geni_cgc_ctrl |= DEFAULT_CGC_EN;
+ dma_general_cfg |= (AHB_SEC_SLV_CLK_CGC_ON | DMA_AHB_SLV_CFG_ON |
+ DMA_TX_CLK_CGC_ON | DMA_RX_CLK_CGC_ON);
+ io_op_ctrl |= DEFAULT_IO_OUTPUT_CTRL_MSK;
+ geni_write_reg(geni_cgc_ctrl, base, GENI_CGC_CTRL);
+ geni_write_reg(dma_general_cfg, base, SE_DMA_GENERAL_CFG);
+
+ geni_write_reg(io_op_ctrl, base, GENI_OUTPUT_CTRL);
+ geni_write_reg(FORCE_DEFAULT, base, GENI_FORCE_DEFAULT_REG);
+}
+
+static inline int geni_se_init(void __iomem *base, int mode,
+ unsigned int rx_wm, unsigned int rx_rfr)
+{
+ int ret = 0;
+
+ se_io_init(base);
+ ret = se_io_set_mode(base, mode);
+ if (ret)
+ goto exit_geni_se_init;
+
+ se_set_rx_rfr_wm(base, rx_wm, rx_rfr);
+ ret = se_geni_irq_en(base, mode);
+ if (ret)
+ goto exit_geni_se_init;
+
+exit_geni_se_init:
+ return ret;
+}
+
+static inline void geni_setup_m_cmd(void __iomem *base, u32 cmd,
+ u32 params)
+{
+ u32 m_cmd = geni_read_reg(base, SE_GENI_M_CMD0);
+
+ m_cmd &= ~(M_OPCODE_MSK | M_PARAMS_MSK);
+ m_cmd |= (cmd << M_OPCODE_SHFT);
+ m_cmd |= (params & M_PARAMS_MSK);
+ geni_write_reg(m_cmd, base, SE_GENI_M_CMD0);
+}
+
+static inline void geni_setup_s_cmd(void __iomem *base, u32 cmd,
+ u32 params)
+{
+ u32 s_cmd = geni_read_reg(base, SE_GENI_S_CMD0);
+
+ s_cmd &= ~(S_OPCODE_MSK | S_PARAMS_MSK);
+ s_cmd |= (cmd << S_OPCODE_SHFT);
+ s_cmd |= (params & S_PARAMS_MSK);
+ geni_write_reg(s_cmd, base, SE_GENI_S_CMD0);
+}
+
+static inline void geni_cancel_m_cmd(void __iomem *base)
+{
+ geni_write_reg(M_GENI_CMD_CANCEL, base, SE_GENI_S_CMD_CTRL_REG);
+}
+
+static inline void geni_cancel_s_cmd(void __iomem *base)
+{
+ geni_write_reg(S_GENI_CMD_CANCEL, base, SE_GENI_S_CMD_CTRL_REG);
+}
+
+static inline void geni_abort_m_cmd(void __iomem *base)
+{
+ geni_write_reg(M_GENI_CMD_ABORT, base, SE_GENI_M_CMD_CTRL_REG);
+}
+
+static inline void qcom_geni_abort_s_cmd(void __iomem *base)
+{
+ geni_write_reg(S_GENI_CMD_ABORT, base, SE_GENI_S_CMD_CTRL_REG);
+}
+
+static inline int get_tx_fifo_depth(void __iomem *base)
+{
+ int tx_fifo_depth;
+
+ tx_fifo_depth = ((geni_read_reg(base, SE_HW_PARAM_0)
+ & TX_FIFO_DEPTH_MSK) >> TX_FIFO_DEPTH_SHFT);
+ return tx_fifo_depth;
+}
+
+static inline int get_tx_fifo_width(void __iomem *base)
+{
+ int tx_fifo_width;
+
+ tx_fifo_width = ((geni_read_reg(base, SE_HW_PARAM_0)
+ & TX_FIFO_WIDTH_MSK) >> TX_FIFO_WIDTH_SHFT);
+ return tx_fifo_width;
+}
+
+static inline int get_rx_fifo_depth(void __iomem *base)
+{
+ int rx_fifo_depth;
+
+ rx_fifo_depth = ((geni_read_reg(base, SE_HW_PARAM_1)
+ & RX_FIFO_DEPTH_MSK) >> RX_FIFO_DEPTH_SHFT);
+ return rx_fifo_depth;
+}
+
+static inline void se_config_packing(void __iomem *base, int bpw,
+ int pack_words, bool msb_to_lsb)
+{
+ u32 cfg[4] = {0};
+ unsigned long cfg0, cfg1;
+ int len = ((bpw < 8) ? (bpw - 1) : 7);
+ int idx = ((msb_to_lsb == 1) ? len : 0);
+ int iter = (bpw * pack_words) >> 3;
+ int i;
+
+ for (i = 0; i < iter; i++) {
+ cfg[i] = ((idx << 5) | (msb_to_lsb << 4) | (len << 1));
+ idx += (len + 1);
+ if (i == iter - 1)
+ cfg[i] |= 1;
+ }
+ cfg0 = cfg[0] | (cfg[1] << 10);
+ cfg1 = cfg[2] | (cfg[3] << 10);
+ geni_write_reg(cfg0, base, SE_GENI_TX_PACKING_CFG0);
+ geni_write_reg(cfg1, base, SE_GENI_TX_PACKING_CFG1);
+ geni_write_reg(cfg0, base, SE_GENI_RX_PACKING_CFG0);
+ geni_write_reg(cfg1, base, SE_GENI_RX_PACKING_CFG1);
+}
+#endif
diff --git a/include/linux/timer.h b/include/linux/timer.h
index 356793e..3e354fd 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -244,6 +244,8 @@ extern void add_timer(struct timer_list *timer);
extern int try_to_del_timer_sync(struct timer_list *timer);
+extern struct timer_base timer_base_deferrable;
+
#ifdef CONFIG_SMP
extern int del_timer_sync(struct timer_list *timer);
#else
diff --git a/include/net/cipso_ipv4.h b/include/net/cipso_ipv4.h
index 3ebb168..a34b141 100644
--- a/include/net/cipso_ipv4.h
+++ b/include/net/cipso_ipv4.h
@@ -309,6 +309,10 @@ static inline int cipso_v4_validate(const struct sk_buff *skb,
}
for (opt_iter = 6; opt_iter < opt_len;) {
+ if (opt_iter + 1 == opt_len) {
+ err_offset = opt_iter;
+ goto out;
+ }
tag_len = opt[opt_iter + 1];
if ((tag_len == 0) || (tag_len > (opt_len - opt_iter))) {
err_offset = opt_iter + 1;
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index f11ca83..7f15f95 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -871,7 +871,7 @@ int ip6_rcv_finish(struct net *net, struct sock *sk, struct sk_buff *skb);
* upper-layer output functions
*/
int ip6_xmit(const struct sock *sk, struct sk_buff *skb, struct flowi6 *fl6,
- struct ipv6_txoptions *opt, int tclass);
+ __u32 mark, struct ipv6_txoptions *opt, int tclass);
int ip6_find_1stfragopt(struct sk_buff *skb, u8 **nexthdr);
diff --git a/include/net/lwtunnel.h b/include/net/lwtunnel.h
index fc7c0db..3f40132 100644
--- a/include/net/lwtunnel.h
+++ b/include/net/lwtunnel.h
@@ -176,7 +176,10 @@ static inline int lwtunnel_valid_encap_type(u16 encap_type)
}
static inline int lwtunnel_valid_encap_type_attr(struct nlattr *attr, int len)
{
- return -EOPNOTSUPP;
+ /* return 0 since we are not walking attr looking for
+ * RTA_ENCAP_TYPE attribute on nexthops.
+ */
+ return 0;
}
static inline int lwtunnel_build_state(struct net_device *dev, u16 encap_type,
diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h
index c211900..48bc1ac 100644
--- a/include/target/target_core_base.h
+++ b/include/target/target_core_base.h
@@ -538,6 +538,7 @@ struct se_node_acl {
char initiatorname[TRANSPORT_IQN_LEN];
/* Used to signal demo mode created ACL, disabled by default */
bool dynamic_node_acl;
+ bool dynamic_stop;
u32 queue_depth;
u32 acl_index;
enum target_prot_type saved_prot_type;
diff --git a/include/trace/events/android_fs.h b/include/trace/events/android_fs.h
index 531da43..4950953 100644
--- a/include/trace/events/android_fs.h
+++ b/include/trace/events/android_fs.h
@@ -9,8 +9,8 @@
DEFINE_EVENT(android_fs_data_start_template, android_fs_dataread_start,
TP_PROTO(struct inode *inode, loff_t offset, int bytes,
- pid_t pid, char *command),
- TP_ARGS(inode, offset, bytes, pid, command));
+ pid_t pid, char *pathname, char *command),
+ TP_ARGS(inode, offset, bytes, pid, pathname, command));
DEFINE_EVENT(android_fs_data_end_template, android_fs_dataread_end,
TP_PROTO(struct inode *inode, loff_t offset, int bytes),
@@ -18,14 +18,48 @@ DEFINE_EVENT(android_fs_data_end_template, android_fs_dataread_end,
DEFINE_EVENT(android_fs_data_start_template, android_fs_datawrite_start,
TP_PROTO(struct inode *inode, loff_t offset, int bytes,
- pid_t pid, char *command),
- TP_ARGS(inode, offset, bytes, pid, command));
+ pid_t pid, char *pathname, char *command),
+ TP_ARGS(inode, offset, bytes, pid, pathname, command));
DEFINE_EVENT(android_fs_data_end_template, android_fs_datawrite_end,
TP_PROTO(struct inode *inode, loff_t offset, int bytes),
- TP_ARGS(inode, offset, bytes));
+ TP_ARGS(inode, offset, bytes));
#endif /* _TRACE_ANDROID_FS_H */
/* This part must be outside protection */
#include <trace/define_trace.h>
+
+#ifndef ANDROID_FSTRACE_GET_PATHNAME
+#define ANDROID_FSTRACE_GET_PATHNAME
+
+/* Sizes an on-stack array, so careful if sizing this up ! */
+#define MAX_TRACE_PATHBUF_LEN 256
+
+static inline char *
+android_fstrace_get_pathname(char *buf, int buflen, struct inode *inode)
+{
+ char *path;
+ struct dentry *d;
+
+ /*
+ * d_obtain_alias() will either iput() if it locates an existing
+ * dentry or transfer the reference to the new dentry created.
+ * So get an extra reference here.
+ */
+ ihold(inode);
+ d = d_obtain_alias(inode);
+ if (likely(!IS_ERR(d))) {
+ path = dentry_path_raw(d, buf, buflen);
+ if (unlikely(IS_ERR(path))) {
+ strcpy(buf, "ERROR");
+ path = buf;
+ }
+ dput(d);
+ } else {
+ strcpy(buf, "ERROR");
+ path = buf;
+ }
+ return path;
+}
+#endif
diff --git a/include/trace/events/android_fs_template.h b/include/trace/events/android_fs_template.h
index 618988b..4e61ffe 100644
--- a/include/trace/events/android_fs_template.h
+++ b/include/trace/events/android_fs_template.h
@@ -5,11 +5,10 @@
DECLARE_EVENT_CLASS(android_fs_data_start_template,
TP_PROTO(struct inode *inode, loff_t offset, int bytes,
- pid_t pid, char *command),
- TP_ARGS(inode, offset, bytes, pid, command),
+ pid_t pid, char *pathname, char *command),
+ TP_ARGS(inode, offset, bytes, pid, pathname, command),
TP_STRUCT__entry(
- __array(char, path, MAX_FILTER_STR_VAL);
- __field(char *, pathname);
+ __string(pathbuf, pathname);
__field(loff_t, offset);
__field(int, bytes);
__field(loff_t, i_size);
@@ -19,27 +18,7 @@ DECLARE_EVENT_CLASS(android_fs_data_start_template,
),
TP_fast_assign(
{
- struct dentry *d;
-
- /*
- * Grab a reference to the inode here because
- * d_obtain_alias() will either drop the inode
- * reference if it locates an existing dentry
- * or transfer the reference to the new dentry
- * created. In our case, the file is still open,
- * so the dentry is guaranteed to exist (connected),
- * so d_obtain_alias() drops the reference we
- * grabbed here.
- */
- ihold(inode);
- d = d_obtain_alias(inode);
- if (!IS_ERR(d)) {
- __entry->pathname = dentry_path(d,
- __entry->path,
- MAX_FILTER_STR_VAL);
- dput(d);
- } else
- __entry->pathname = ERR_PTR(-EINVAL);
+ __assign_str(pathbuf, pathname);
__entry->offset = offset;
__entry->bytes = bytes;
__entry->i_size = i_size_read(inode);
@@ -50,9 +29,8 @@ DECLARE_EVENT_CLASS(android_fs_data_start_template,
),
TP_printk("entry_name %s, offset %llu, bytes %d, cmdline %s,"
" pid %d, i_size %llu, ino %lu",
- (IS_ERR(__entry->pathname) ? "ERROR" : __entry->pathname),
- __entry->offset, __entry->bytes, __get_str(cmdline),
- __entry->pid, __entry->i_size,
+ __get_str(pathbuf), __entry->offset, __entry->bytes,
+ __get_str(cmdline), __entry->pid, __entry->i_size,
(unsigned long) __entry->ino)
);
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 6e7d325..a242e72 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -350,8 +350,8 @@ enum v4l2_quantization {
/*
* The default for R'G'B' quantization is always full range, except
* for the BT2020 colorspace. For Y'CbCr the quantization is always
- * limited range, except for COLORSPACE_JPEG, SRGB, ADOBERGB,
- * XV601 or XV709: those are full range.
+ * limited range, except for COLORSPACE_JPEG, XV601 or XV709: those
+ * are full range.
*/
V4L2_QUANTIZATION_DEFAULT = 0,
V4L2_QUANTIZATION_FULL_RANGE = 1,
@@ -366,8 +366,7 @@ enum v4l2_quantization {
#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb, colsp, ycbcr_enc) \
(((is_rgb) && (colsp) == V4L2_COLORSPACE_BT2020) ? V4L2_QUANTIZATION_LIM_RANGE : \
(((is_rgb) || (ycbcr_enc) == V4L2_YCBCR_ENC_XV601 || \
- (ycbcr_enc) == V4L2_YCBCR_ENC_XV709 || (colsp) == V4L2_COLORSPACE_JPEG) || \
- (colsp) == V4L2_COLORSPACE_ADOBERGB || (colsp) == V4L2_COLORSPACE_SRGB ? \
+ (ycbcr_enc) == V4L2_YCBCR_ENC_XV709 || (colsp) == V4L2_COLORSPACE_JPEG) ? \
V4L2_QUANTIZATION_FULL_RANGE : V4L2_QUANTIZATION_LIM_RANGE))
enum v4l2_priority {
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 8e901de..99c91f6 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -3466,14 +3466,15 @@ struct perf_read_data {
int ret;
};
-static int find_cpu_to_read(struct perf_event *event, int local_cpu)
+static int __perf_event_read_cpu(struct perf_event *event, int event_cpu)
{
- int event_cpu = event->oncpu;
u16 local_pkg, event_pkg;
if (event->group_caps & PERF_EV_CAP_READ_ACTIVE_PKG) {
- event_pkg = topology_physical_package_id(event_cpu);
- local_pkg = topology_physical_package_id(local_cpu);
+ int local_cpu = smp_processor_id();
+
+ event_pkg = topology_physical_package_id(event_cpu);
+ local_pkg = topology_physical_package_id(local_cpu);
if (event_pkg == local_pkg)
return local_cpu;
@@ -3603,7 +3604,7 @@ u64 perf_event_read_local(struct perf_event *event)
static int perf_event_read(struct perf_event *event, bool group)
{
- int ret = 0, cpu_to_read, local_cpu;
+ int event_cpu, ret = 0;
/*
* If event is enabled and currently active on a CPU, update the
@@ -3617,21 +3618,25 @@ static int perf_event_read(struct perf_event *event, bool group)
.ret = 0,
};
- local_cpu = get_cpu();
- cpu_to_read = find_cpu_to_read(event, local_cpu);
- put_cpu();
+ event_cpu = READ_ONCE(event->oncpu);
+ if ((unsigned)event_cpu >= nr_cpu_ids)
+ return 0;
+
+ preempt_disable();
+ event_cpu = __perf_event_read_cpu(event, event_cpu);
/*
* Purposely ignore the smp_call_function_single() return
* value.
*
- * If event->oncpu isn't a valid CPU it means the event got
+ * If event_cpu isn't a valid CPU it means the event got
* scheduled out and that will have updated the event count.
*
* Therefore, either way, we'll have an up-to-date event count
* after this.
*/
- (void)smp_call_function_single(cpu_to_read, __perf_event_read, &data, 1);
+ (void)smp_call_function_single(event_cpu, __perf_event_read, &data, 1);
+ preempt_enable();
ret = data.ret;
} else if (event->state == PERF_EVENT_STATE_INACTIVE) {
struct perf_event_context *ctx = event->ctx;
diff --git a/kernel/futex.c b/kernel/futex.c
index 2c4be46..38b68c2 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -3323,4 +3323,4 @@ static int __init futex_init(void)
return 0;
}
-__initcall(futex_init);
+core_initcall(futex_init);
diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
index b38f3fb..20fc294 100644
--- a/kernel/printk/printk.c
+++ b/kernel/printk/printk.c
@@ -1568,7 +1568,7 @@ static void call_console_drivers(int level,
{
struct console *con;
- trace_console(text, len);
+ trace_console_rcuidle(text, len);
if (!console_drivers)
return;
diff --git a/kernel/sched/Makefile b/kernel/sched/Makefile
index eed4b72..90d10e8 100644
--- a/kernel/sched/Makefile
+++ b/kernel/sched/Makefile
@@ -29,3 +29,4 @@
obj-$(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) += cpufreq_schedutil.o
obj-$(CONFIG_SCHED_CORE_CTL) += core_ctl.o
obj-$(CONFIG_CPU_FREQ_GOV_SCHED) += cpufreq_sched.o
+obj-$(CONFIG_CPU_FREQ_GOV_SCHEDUTIL) += cpufreq_schedutil.o
diff --git a/kernel/sched/cpufreq_schedutil.c b/kernel/sched/cpufreq_schedutil.c
new file mode 100644
index 0000000..69e0689
--- /dev/null
+++ b/kernel/sched/cpufreq_schedutil.c
@@ -0,0 +1,576 @@
+/*
+ * CPUFreq governor based on scheduler-provided CPU utilization data.
+ *
+ * Copyright (C) 2016, Intel Corporation
+ * Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/cpufreq.h>
+#include <linux/slab.h>
+#include <trace/events/power.h>
+
+#include "sched.h"
+
+struct sugov_tunables {
+ struct gov_attr_set attr_set;
+ unsigned int rate_limit_us;
+};
+
+struct sugov_policy {
+ struct cpufreq_policy *policy;
+
+ struct sugov_tunables *tunables;
+ struct list_head tunables_hook;
+
+ raw_spinlock_t update_lock; /* For shared policies */
+ u64 last_freq_update_time;
+ s64 freq_update_delay_ns;
+ unsigned int next_freq;
+
+ /* The next fields are only needed if fast switch cannot be used. */
+ struct irq_work irq_work;
+ struct work_struct work;
+ struct mutex work_lock;
+ bool work_in_progress;
+
+ bool need_freq_update;
+};
+
+struct sugov_cpu {
+ struct update_util_data update_util;
+ struct sugov_policy *sg_policy;
+
+ unsigned int cached_raw_freq;
+ unsigned long iowait_boost;
+ unsigned long iowait_boost_max;
+ u64 last_update;
+
+ /* The fields below are only needed when sharing a policy. */
+ unsigned long util;
+ unsigned long max;
+ unsigned int flags;
+};
+
+static DEFINE_PER_CPU(struct sugov_cpu, sugov_cpu);
+
+/************************ Governor internals ***********************/
+
+static bool sugov_should_update_freq(struct sugov_policy *sg_policy, u64 time)
+{
+ s64 delta_ns;
+
+ if (sg_policy->work_in_progress)
+ return false;
+
+ if (unlikely(sg_policy->need_freq_update)) {
+ sg_policy->need_freq_update = false;
+ /*
+ * This happens when limits change, so forget the previous
+ * next_freq value and force an update.
+ */
+ sg_policy->next_freq = UINT_MAX;
+ return true;
+ }
+
+ delta_ns = time - sg_policy->last_freq_update_time;
+ return delta_ns >= sg_policy->freq_update_delay_ns;
+}
+
+static void sugov_update_commit(struct sugov_policy *sg_policy, u64 time,
+ unsigned int next_freq)
+{
+ struct cpufreq_policy *policy = sg_policy->policy;
+
+ sg_policy->last_freq_update_time = time;
+
+ if (policy->fast_switch_enabled) {
+ if (sg_policy->next_freq == next_freq) {
+ trace_cpu_frequency(policy->cur, smp_processor_id());
+ return;
+ }
+ sg_policy->next_freq = next_freq;
+ next_freq = cpufreq_driver_fast_switch(policy, next_freq);
+ if (next_freq == CPUFREQ_ENTRY_INVALID)
+ return;
+
+ policy->cur = next_freq;
+ trace_cpu_frequency(next_freq, smp_processor_id());
+ } else if (sg_policy->next_freq != next_freq) {
+ sg_policy->next_freq = next_freq;
+ sg_policy->work_in_progress = true;
+ irq_work_queue(&sg_policy->irq_work);
+ }
+}
+
+/**
+ * get_next_freq - Compute a new frequency for a given cpufreq policy.
+ * @sg_cpu: schedutil cpu object to compute the new frequency for.
+ * @util: Current CPU utilization.
+ * @max: CPU capacity.
+ *
+ * If the utilization is frequency-invariant, choose the new frequency to be
+ * proportional to it, that is
+ *
+ * next_freq = C * max_freq * util / max
+ *
+ * Otherwise, approximate the would-be frequency-invariant utilization by
+ * util_raw * (curr_freq / max_freq) which leads to
+ *
+ * next_freq = C * curr_freq * util_raw / max
+ *
+ * Take C = 1.25 for the frequency tipping point at (util / max) = 0.8.
+ *
+ * The lowest driver-supported frequency which is equal or greater than the raw
+ * next_freq (as calculated above) is returned, subject to policy min/max and
+ * cpufreq driver limitations.
+ */
+static unsigned int get_next_freq(struct sugov_cpu *sg_cpu, unsigned long util,
+ unsigned long max)
+{
+ struct sugov_policy *sg_policy = sg_cpu->sg_policy;
+ struct cpufreq_policy *policy = sg_policy->policy;
+ unsigned int freq = arch_scale_freq_invariant() ?
+ policy->cpuinfo.max_freq : policy->cur;
+
+ freq = (freq + (freq >> 2)) * util / max;
+
+ if (freq == sg_cpu->cached_raw_freq && sg_policy->next_freq != UINT_MAX)
+ return sg_policy->next_freq;
+ sg_cpu->cached_raw_freq = freq;
+ return cpufreq_driver_resolve_freq(policy, freq);
+}
+
+static void sugov_get_util(unsigned long *util, unsigned long *max)
+{
+ struct rq *rq = this_rq();
+ unsigned long cfs_max;
+
+ cfs_max = arch_scale_cpu_capacity(NULL, smp_processor_id());
+
+ *util = min(rq->cfs.avg.util_avg, cfs_max);
+ *max = cfs_max;
+}
+
+static void sugov_set_iowait_boost(struct sugov_cpu *sg_cpu, u64 time,
+ unsigned int flags)
+{
+ if (flags & SCHED_CPUFREQ_IOWAIT) {
+ sg_cpu->iowait_boost = sg_cpu->iowait_boost_max;
+ } else if (sg_cpu->iowait_boost) {
+ s64 delta_ns = time - sg_cpu->last_update;
+
+ /* Clear iowait_boost if the CPU apprears to have been idle. */
+ if (delta_ns > TICK_NSEC)
+ sg_cpu->iowait_boost = 0;
+ }
+}
+
+static void sugov_iowait_boost(struct sugov_cpu *sg_cpu, unsigned long *util,
+ unsigned long *max)
+{
+ unsigned long boost_util = sg_cpu->iowait_boost;
+ unsigned long boost_max = sg_cpu->iowait_boost_max;
+
+ if (!boost_util)
+ return;
+
+ if (*util * boost_max < *max * boost_util) {
+ *util = boost_util;
+ *max = boost_max;
+ }
+ sg_cpu->iowait_boost >>= 1;
+}
+
+static void sugov_update_single(struct update_util_data *hook, u64 time,
+ unsigned int flags)
+{
+ struct sugov_cpu *sg_cpu = container_of(hook, struct sugov_cpu, update_util);
+ struct sugov_policy *sg_policy = sg_cpu->sg_policy;
+ struct cpufreq_policy *policy = sg_policy->policy;
+ unsigned long util, max;
+ unsigned int next_f;
+
+ sugov_set_iowait_boost(sg_cpu, time, flags);
+ sg_cpu->last_update = time;
+
+ if (!sugov_should_update_freq(sg_policy, time))
+ return;
+
+ if (flags & SCHED_CPUFREQ_RT_DL) {
+ next_f = policy->cpuinfo.max_freq;
+ } else {
+ sugov_get_util(&util, &max);
+ sugov_iowait_boost(sg_cpu, &util, &max);
+ next_f = get_next_freq(sg_cpu, util, max);
+ }
+ sugov_update_commit(sg_policy, time, next_f);
+}
+
+static unsigned int sugov_next_freq_shared(struct sugov_cpu *sg_cpu,
+ unsigned long util, unsigned long max,
+ unsigned int flags)
+{
+ struct sugov_policy *sg_policy = sg_cpu->sg_policy;
+ struct cpufreq_policy *policy = sg_policy->policy;
+ unsigned int max_f = policy->cpuinfo.max_freq;
+ u64 last_freq_update_time = sg_policy->last_freq_update_time;
+ unsigned int j;
+
+ if (flags & SCHED_CPUFREQ_RT_DL)
+ return max_f;
+
+ sugov_iowait_boost(sg_cpu, &util, &max);
+
+ for_each_cpu(j, policy->cpus) {
+ struct sugov_cpu *j_sg_cpu;
+ unsigned long j_util, j_max;
+ s64 delta_ns;
+
+ if (j == smp_processor_id())
+ continue;
+
+ j_sg_cpu = &per_cpu(sugov_cpu, j);
+ /*
+ * If the CPU utilization was last updated before the previous
+ * frequency update and the time elapsed between the last update
+ * of the CPU utilization and the last frequency update is long
+ * enough, don't take the CPU into account as it probably is
+ * idle now (and clear iowait_boost for it).
+ */
+ delta_ns = last_freq_update_time - j_sg_cpu->last_update;
+ if (delta_ns > TICK_NSEC) {
+ j_sg_cpu->iowait_boost = 0;
+ continue;
+ }
+ if (j_sg_cpu->flags & SCHED_CPUFREQ_RT_DL)
+ return max_f;
+
+ j_util = j_sg_cpu->util;
+ j_max = j_sg_cpu->max;
+ if (j_util * max > j_max * util) {
+ util = j_util;
+ max = j_max;
+ }
+
+ sugov_iowait_boost(j_sg_cpu, &util, &max);
+ }
+
+ return get_next_freq(sg_cpu, util, max);
+}
+
+static void sugov_update_shared(struct update_util_data *hook, u64 time,
+ unsigned int flags)
+{
+ struct sugov_cpu *sg_cpu = container_of(hook, struct sugov_cpu, update_util);
+ struct sugov_policy *sg_policy = sg_cpu->sg_policy;
+ unsigned long util, max;
+ unsigned int next_f;
+
+ sugov_get_util(&util, &max);
+
+ raw_spin_lock(&sg_policy->update_lock);
+
+ sg_cpu->util = util;
+ sg_cpu->max = max;
+ sg_cpu->flags = flags;
+
+ sugov_set_iowait_boost(sg_cpu, time, flags);
+ sg_cpu->last_update = time;
+
+ if (sugov_should_update_freq(sg_policy, time)) {
+ next_f = sugov_next_freq_shared(sg_cpu, util, max, flags);
+ sugov_update_commit(sg_policy, time, next_f);
+ }
+
+ raw_spin_unlock(&sg_policy->update_lock);
+}
+
+static void sugov_work(struct work_struct *work)
+{
+ struct sugov_policy *sg_policy = container_of(work, struct sugov_policy, work);
+
+ mutex_lock(&sg_policy->work_lock);
+ __cpufreq_driver_target(sg_policy->policy, sg_policy->next_freq,
+ CPUFREQ_RELATION_L);
+ mutex_unlock(&sg_policy->work_lock);
+
+ sg_policy->work_in_progress = false;
+}
+
+static void sugov_irq_work(struct irq_work *irq_work)
+{
+ struct sugov_policy *sg_policy;
+
+ sg_policy = container_of(irq_work, struct sugov_policy, irq_work);
+ schedule_work_on(smp_processor_id(), &sg_policy->work);
+}
+
+/************************** sysfs interface ************************/
+
+static struct sugov_tunables *global_tunables;
+static DEFINE_MUTEX(global_tunables_lock);
+
+static inline struct sugov_tunables *to_sugov_tunables(struct gov_attr_set *attr_set)
+{
+ return container_of(attr_set, struct sugov_tunables, attr_set);
+}
+
+static ssize_t rate_limit_us_show(struct gov_attr_set *attr_set, char *buf)
+{
+ struct sugov_tunables *tunables = to_sugov_tunables(attr_set);
+
+ return sprintf(buf, "%u\n", tunables->rate_limit_us);
+}
+
+static ssize_t rate_limit_us_store(struct gov_attr_set *attr_set, const char *buf,
+ size_t count)
+{
+ struct sugov_tunables *tunables = to_sugov_tunables(attr_set);
+ struct sugov_policy *sg_policy;
+ unsigned int rate_limit_us;
+
+ if (kstrtouint(buf, 10, &rate_limit_us))
+ return -EINVAL;
+
+ tunables->rate_limit_us = rate_limit_us;
+
+ list_for_each_entry(sg_policy, &attr_set->policy_list, tunables_hook)
+ sg_policy->freq_update_delay_ns = rate_limit_us * NSEC_PER_USEC;
+
+ return count;
+}
+
+static struct governor_attr rate_limit_us = __ATTR_RW(rate_limit_us);
+
+static struct attribute *sugov_attributes[] = {
+ &rate_limit_us.attr,
+ NULL
+};
+
+static struct kobj_type sugov_tunables_ktype = {
+ .default_attrs = sugov_attributes,
+ .sysfs_ops = &governor_sysfs_ops,
+};
+
+/********************** cpufreq governor interface *********************/
+
+static struct cpufreq_governor schedutil_gov;
+
+static struct sugov_policy *sugov_policy_alloc(struct cpufreq_policy *policy)
+{
+ struct sugov_policy *sg_policy;
+
+ sg_policy = kzalloc(sizeof(*sg_policy), GFP_KERNEL);
+ if (!sg_policy)
+ return NULL;
+
+ sg_policy->policy = policy;
+ init_irq_work(&sg_policy->irq_work, sugov_irq_work);
+ INIT_WORK(&sg_policy->work, sugov_work);
+ mutex_init(&sg_policy->work_lock);
+ raw_spin_lock_init(&sg_policy->update_lock);
+ return sg_policy;
+}
+
+static void sugov_policy_free(struct sugov_policy *sg_policy)
+{
+ mutex_destroy(&sg_policy->work_lock);
+ kfree(sg_policy);
+}
+
+static struct sugov_tunables *sugov_tunables_alloc(struct sugov_policy *sg_policy)
+{
+ struct sugov_tunables *tunables;
+
+ tunables = kzalloc(sizeof(*tunables), GFP_KERNEL);
+ if (tunables) {
+ gov_attr_set_init(&tunables->attr_set, &sg_policy->tunables_hook);
+ if (!have_governor_per_policy())
+ global_tunables = tunables;
+ }
+ return tunables;
+}
+
+static void sugov_tunables_free(struct sugov_tunables *tunables)
+{
+ if (!have_governor_per_policy())
+ global_tunables = NULL;
+
+ kfree(tunables);
+}
+
+static int sugov_init(struct cpufreq_policy *policy)
+{
+ struct sugov_policy *sg_policy;
+ struct sugov_tunables *tunables;
+ unsigned int lat;
+ int ret = 0;
+
+ /* State should be equivalent to EXIT */
+ if (policy->governor_data)
+ return -EBUSY;
+
+ sg_policy = sugov_policy_alloc(policy);
+ if (!sg_policy)
+ return -ENOMEM;
+
+ mutex_lock(&global_tunables_lock);
+
+ if (global_tunables) {
+ if (WARN_ON(have_governor_per_policy())) {
+ ret = -EINVAL;
+ goto free_sg_policy;
+ }
+ policy->governor_data = sg_policy;
+ sg_policy->tunables = global_tunables;
+
+ gov_attr_set_get(&global_tunables->attr_set, &sg_policy->tunables_hook);
+ goto out;
+ }
+
+ tunables = sugov_tunables_alloc(sg_policy);
+ if (!tunables) {
+ ret = -ENOMEM;
+ goto free_sg_policy;
+ }
+
+ tunables->rate_limit_us = LATENCY_MULTIPLIER;
+ lat = policy->cpuinfo.transition_latency / NSEC_PER_USEC;
+ if (lat)
+ tunables->rate_limit_us *= lat;
+
+ policy->governor_data = sg_policy;
+ sg_policy->tunables = tunables;
+
+ ret = kobject_init_and_add(&tunables->attr_set.kobj, &sugov_tunables_ktype,
+ get_governor_parent_kobj(policy), "%s",
+ schedutil_gov.name);
+ if (ret)
+ goto fail;
+
+ out:
+ mutex_unlock(&global_tunables_lock);
+
+ cpufreq_enable_fast_switch(policy);
+ return 0;
+
+ fail:
+ policy->governor_data = NULL;
+ sugov_tunables_free(tunables);
+
+ free_sg_policy:
+ mutex_unlock(&global_tunables_lock);
+
+ sugov_policy_free(sg_policy);
+ pr_err("initialization failed (error %d)\n", ret);
+ return ret;
+}
+
+static void sugov_exit(struct cpufreq_policy *policy)
+{
+ struct sugov_policy *sg_policy = policy->governor_data;
+ struct sugov_tunables *tunables = sg_policy->tunables;
+ unsigned int count;
+
+ cpufreq_disable_fast_switch(policy);
+
+ mutex_lock(&global_tunables_lock);
+
+ count = gov_attr_set_put(&tunables->attr_set, &sg_policy->tunables_hook);
+ policy->governor_data = NULL;
+ if (!count)
+ sugov_tunables_free(tunables);
+
+ mutex_unlock(&global_tunables_lock);
+
+ sugov_policy_free(sg_policy);
+}
+
+static int sugov_start(struct cpufreq_policy *policy)
+{
+ struct sugov_policy *sg_policy = policy->governor_data;
+ unsigned int cpu;
+
+ sg_policy->freq_update_delay_ns = sg_policy->tunables->rate_limit_us * NSEC_PER_USEC;
+ sg_policy->last_freq_update_time = 0;
+ sg_policy->next_freq = UINT_MAX;
+ sg_policy->work_in_progress = false;
+ sg_policy->need_freq_update = false;
+
+ for_each_cpu(cpu, policy->cpus) {
+ struct sugov_cpu *sg_cpu = &per_cpu(sugov_cpu, cpu);
+
+ sg_cpu->sg_policy = sg_policy;
+ if (policy_is_shared(policy)) {
+ sg_cpu->util = 0;
+ sg_cpu->max = 0;
+ sg_cpu->flags = SCHED_CPUFREQ_RT;
+ sg_cpu->last_update = 0;
+ sg_cpu->cached_raw_freq = 0;
+ sg_cpu->iowait_boost = 0;
+ sg_cpu->iowait_boost_max = policy->cpuinfo.max_freq;
+ cpufreq_add_update_util_hook(cpu, &sg_cpu->update_util,
+ sugov_update_shared);
+ } else {
+ cpufreq_add_update_util_hook(cpu, &sg_cpu->update_util,
+ sugov_update_single);
+ }
+ }
+ return 0;
+}
+
+static void sugov_stop(struct cpufreq_policy *policy)
+{
+ struct sugov_policy *sg_policy = policy->governor_data;
+ unsigned int cpu;
+
+ for_each_cpu(cpu, policy->cpus)
+ cpufreq_remove_update_util_hook(cpu);
+
+ synchronize_sched();
+
+ irq_work_sync(&sg_policy->irq_work);
+ cancel_work_sync(&sg_policy->work);
+}
+
+static void sugov_limits(struct cpufreq_policy *policy)
+{
+ struct sugov_policy *sg_policy = policy->governor_data;
+
+ if (!policy->fast_switch_enabled) {
+ mutex_lock(&sg_policy->work_lock);
+ cpufreq_policy_apply_limits(policy);
+ mutex_unlock(&sg_policy->work_lock);
+ }
+
+ sg_policy->need_freq_update = true;
+}
+
+static struct cpufreq_governor schedutil_gov = {
+ .name = "schedutil",
+ .owner = THIS_MODULE,
+ .init = sugov_init,
+ .exit = sugov_exit,
+ .start = sugov_start,
+ .stop = sugov_stop,
+ .limits = sugov_limits,
+};
+
+#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL
+struct cpufreq_governor *cpufreq_default_governor(void)
+{
+ return &schedutil_gov;
+}
+#endif
+
+static int __init sugov_register(void)
+{
+ return cpufreq_register_governor(&schedutil_gov);
+}
+fs_initcall(sugov_register);
diff --git a/kernel/stacktrace.c b/kernel/stacktrace.c
index b6e4c16..9c15a91 100644
--- a/kernel/stacktrace.c
+++ b/kernel/stacktrace.c
@@ -18,10 +18,8 @@ void print_stack_trace(struct stack_trace *trace, int spaces)
if (WARN_ON(!trace->entries))
return;
- for (i = 0; i < trace->nr_entries; i++) {
- printk("%*c", 1 + spaces, ' ');
- print_ip_sym(trace->entries[i]);
- }
+ for (i = 0; i < trace->nr_entries; i++)
+ printk("%*c%pS\n", 1 + spaces, ' ', (void *)trace->entries[i]);
}
EXPORT_SYMBOL_GPL(print_stack_trace);
@@ -29,7 +27,6 @@ int snprint_stack_trace(char *buf, size_t size,
struct stack_trace *trace, int spaces)
{
int i;
- unsigned long ip;
int generated;
int total = 0;
@@ -37,9 +34,8 @@ int snprint_stack_trace(char *buf, size_t size,
return 0;
for (i = 0; i < trace->nr_entries; i++) {
- ip = trace->entries[i];
- generated = snprintf(buf, size, "%*c[<%p>] %pS\n",
- 1 + spaces, ' ', (void *) ip, (void *) ip);
+ generated = snprintf(buf, size, "%*c%pS\n", 1 + spaces, ' ',
+ (void *)trace->entries[i]);
total += generated;
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 7e4fad7..8a6970e 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -108,7 +108,7 @@ static int finished_booting;
#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
static void clocksource_watchdog_work(struct work_struct *work);
-static void clocksource_select(void);
+static void clocksource_select(bool force);
static LIST_HEAD(watchdog_list);
static struct clocksource *watchdog;
@@ -415,7 +415,7 @@ static int clocksource_watchdog_kthread(void *data)
{
mutex_lock(&clocksource_mutex);
if (__clocksource_watchdog_kthread())
- clocksource_select();
+ clocksource_select(false);
mutex_unlock(&clocksource_mutex);
return 0;
}
@@ -555,11 +555,12 @@ static inline void clocksource_update_max_deferment(struct clocksource *cs)
#ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
-static struct clocksource *clocksource_find_best(bool oneshot, bool skipcur)
+static struct clocksource *clocksource_find_best(bool oneshot, bool skipcur,
+ bool force)
{
struct clocksource *cs;
- if (!finished_booting || list_empty(&clocksource_list))
+ if ((!finished_booting && !force) || list_empty(&clocksource_list))
return NULL;
/*
@@ -577,13 +578,13 @@ static struct clocksource *clocksource_find_best(bool oneshot, bool skipcur)
return NULL;
}
-static void __clocksource_select(bool skipcur)
+static void __clocksource_select(bool skipcur, bool force)
{
bool oneshot = tick_oneshot_mode_active();
struct clocksource *best, *cs;
/* Find the best suitable clocksource */
- best = clocksource_find_best(oneshot, skipcur);
+ best = clocksource_find_best(oneshot, skipcur, force);
if (!best)
return;
@@ -632,22 +633,40 @@ static void __clocksource_select(bool skipcur)
* Select the clocksource with the best rating, or the clocksource,
* which is selected by userspace override.
*/
-static void clocksource_select(void)
+static void clocksource_select(bool force)
{
- __clocksource_select(false);
+ return __clocksource_select(false, force);
}
static void clocksource_select_fallback(void)
{
- __clocksource_select(true);
+ __clocksource_select(true, false);
}
#else /* !CONFIG_ARCH_USES_GETTIMEOFFSET */
-static inline void clocksource_select(void) { }
+
+static inline void clocksource_select(bool force) { }
static inline void clocksource_select_fallback(void) { }
#endif
+/**
+ * clocksource_select_force - Force re-selection of the best clocksource
+ * among registered clocksources
+ *
+ * clocksource_select() can't select the best clocksource before
+ * calling clocksource_done_booting() and since clocksource_select()
+ * should be called with clocksource_mutex held, provide a new API
+ * can be called from other files to select best clockrouce irrespective
+ * of finished_booting flag.
+ */
+void clocksource_select_force(void)
+{
+ mutex_lock(&clocksource_mutex);
+ clocksource_select(true);
+ mutex_unlock(&clocksource_mutex);
+}
+
/*
* clocksource_done_booting - Called near the end of core bootup
*
@@ -664,7 +683,7 @@ static int __init clocksource_done_booting(void)
* Run the watchdog first to eliminate unstable clock sources
*/
__clocksource_watchdog_kthread();
- clocksource_select();
+ clocksource_select(false);
mutex_unlock(&clocksource_mutex);
return 0;
}
@@ -755,6 +774,7 @@ void __clocksource_update_freq_scale(struct clocksource *cs, u32 scale, u32 freq
}
EXPORT_SYMBOL_GPL(__clocksource_update_freq_scale);
+
/**
* __clocksource_register_scale - Used to install new clocksources
* @cs: clocksource to be registered
@@ -776,7 +796,7 @@ int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
mutex_lock(&clocksource_mutex);
clocksource_enqueue(cs);
clocksource_enqueue_watchdog(cs);
- clocksource_select();
+ clocksource_select(false);
clocksource_select_watchdog(false);
mutex_unlock(&clocksource_mutex);
return 0;
@@ -799,7 +819,7 @@ void clocksource_change_rating(struct clocksource *cs, int rating)
{
mutex_lock(&clocksource_mutex);
__clocksource_change_rating(cs, rating);
- clocksource_select();
+ clocksource_select(false);
clocksource_select_watchdog(false);
mutex_unlock(&clocksource_mutex);
}
@@ -903,7 +923,7 @@ static ssize_t sysfs_override_clocksource(struct device *dev,
ret = sysfs_get_uname(buf, override_name, count);
if (ret >= 0)
- clocksource_select();
+ clocksource_select(false);
mutex_unlock(&clocksource_mutex);
diff --git a/kernel/time/timekeeping_debug.c b/kernel/time/timekeeping_debug.c
index ca9fb80..38bc4d2 100644
--- a/kernel/time/timekeeping_debug.c
+++ b/kernel/time/timekeeping_debug.c
@@ -75,7 +75,7 @@ void tk_debug_account_sleep_time(struct timespec64 *t)
int bin = min(fls(t->tv_sec), NUM_BINS-1);
sleep_time_bin[bin]++;
- pr_info("Suspended for %lld.%03lu seconds\n", (s64)t->tv_sec,
- t->tv_nsec / NSEC_PER_MSEC);
+ printk_deferred(KERN_INFO "Suspended for %lld.%03lu seconds\n",
+ (s64)t->tv_sec, t->tv_nsec / NSEC_PER_MSEC);
}
diff --git a/kernel/time/timer.c b/kernel/time/timer.c
index f605186..400920e 100644
--- a/kernel/time/timer.c
+++ b/kernel/time/timer.c
@@ -206,6 +206,7 @@ struct timer_base {
} ____cacheline_aligned;
static DEFINE_PER_CPU(struct timer_base, timer_bases[NR_BASES]);
+struct timer_base timer_base_deferrable;
#if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ_COMMON)
unsigned int sysctl_timer_migration = 1;
@@ -229,6 +230,9 @@ void timers_update_migration(bool update_nohz)
per_cpu(timer_bases[BASE_DEF].nohz_active, cpu) = true;
per_cpu(hrtimer_bases.nohz_active, cpu) = true;
}
+
+ timer_base_deferrable.migration_enabled = on;
+ timer_base_deferrable.nohz_active = true;
}
int timer_migration_handler(struct ctl_table *table, int write,
@@ -852,8 +856,11 @@ static inline struct timer_base *get_timer_cpu_base(u32 tflags, u32 cpu)
* the deferrable base.
*/
if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && base->nohz_active &&
- (tflags & TIMER_DEFERRABLE))
- base = per_cpu_ptr(&timer_bases[BASE_DEF], cpu);
+ (tflags & TIMER_DEFERRABLE)) {
+ base = &timer_base_deferrable;
+ if (tflags & TIMER_PINNED)
+ base = per_cpu_ptr(&timer_bases[BASE_DEF], cpu);
+ }
return base;
}
@@ -867,7 +874,9 @@ static inline struct timer_base *get_timer_this_cpu_base(u32 tflags)
*/
if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && base->nohz_active &&
(tflags & TIMER_DEFERRABLE))
- base = this_cpu_ptr(&timer_bases[BASE_DEF]);
+ base = &timer_base_deferrable;
+ if (tflags & TIMER_PINNED)
+ base = this_cpu_ptr(&timer_bases[BASE_DEF]);
return base;
}
@@ -1652,8 +1661,10 @@ static __latent_entropy void run_timer_softirq(struct softirq_action *h)
struct timer_base *base = this_cpu_ptr(&timer_bases[BASE_STD]);
__run_timers(base);
- if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && base->nohz_active)
+ if (IS_ENABLED(CONFIG_NO_HZ_COMMON) && base->nohz_active) {
+ __run_timers(&timer_base_deferrable);
__run_timers(this_cpu_ptr(&timer_bases[BASE_DEF]));
+ }
}
/*
diff --git a/mm/memblock.c b/mm/memblock.c
index 166f17a..49b7c1e 100644
--- a/mm/memblock.c
+++ b/mm/memblock.c
@@ -1641,11 +1641,12 @@ int __init_memblock memblock_is_region_memory(phys_addr_t base, phys_addr_t size
memblock.memory.regions[idx].size) >= end;
}
-int __init_memblock memblock_overlaps_memory(phys_addr_t base, phys_addr_t size)
+bool __init_memblock memblock_overlaps_memory(phys_addr_t base,
+ phys_addr_t size)
{
memblock_cap_size(base, &size);
- return memblock_overlaps_region(&memblock.memory, base, size) >= 0;
+ return memblock_overlaps_region(&memblock.memory, base, size);
}
/**
diff --git a/mm/slub.c b/mm/slub.c
index 2b3e740..7aa0e97 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -1419,6 +1419,10 @@ static int init_cache_random_seq(struct kmem_cache *s)
int err;
unsigned long i, count = oo_objects(s->oo);
+ /* Bailout if already initialised */
+ if (s->random_seq)
+ return 0;
+
err = cache_random_seq_create(s, count, GFP_KERNEL);
if (err) {
pr_err("SLUB: Unable to initialize free list for %s\n",
diff --git a/net/can/af_can.c b/net/can/af_can.c
index 1108079..5488e4a 100644
--- a/net/can/af_can.c
+++ b/net/can/af_can.c
@@ -445,6 +445,7 @@ static struct hlist_head *find_rcv_list(canid_t *can_id, canid_t *mask,
* @func: callback function on filter match
* @data: returned parameter for callback function
* @ident: string for calling module identification
+ * @sk: socket pointer (might be NULL)
*
* Description:
* Invokes the callback function with the received sk_buff and the given
@@ -468,7 +469,7 @@ static struct hlist_head *find_rcv_list(canid_t *can_id, canid_t *mask,
*/
int can_rx_register(struct net_device *dev, canid_t can_id, canid_t mask,
void (*func)(struct sk_buff *, void *), void *data,
- char *ident)
+ char *ident, struct sock *sk)
{
struct receiver *r;
struct hlist_head *rl;
@@ -496,6 +497,7 @@ int can_rx_register(struct net_device *dev, canid_t can_id, canid_t mask,
r->func = func;
r->data = data;
r->ident = ident;
+ r->sk = sk;
hlist_add_head_rcu(&r->list, rl);
d->entries++;
@@ -520,8 +522,11 @@ EXPORT_SYMBOL(can_rx_register);
static void can_rx_delete_receiver(struct rcu_head *rp)
{
struct receiver *r = container_of(rp, struct receiver, rcu);
+ struct sock *sk = r->sk;
kmem_cache_free(rcv_cache, r);
+ if (sk)
+ sock_put(sk);
}
/**
@@ -596,8 +601,11 @@ void can_rx_unregister(struct net_device *dev, canid_t can_id, canid_t mask,
spin_unlock(&can_rcvlists_lock);
/* schedule the receiver item for deletion */
- if (r)
+ if (r) {
+ if (r->sk)
+ sock_hold(r->sk);
call_rcu(&r->rcu, can_rx_delete_receiver);
+ }
}
EXPORT_SYMBOL(can_rx_unregister);
diff --git a/net/can/af_can.h b/net/can/af_can.h
index fca0fe9..b86f512 100644
--- a/net/can/af_can.h
+++ b/net/can/af_can.h
@@ -50,13 +50,14 @@
struct receiver {
struct hlist_node list;
- struct rcu_head rcu;
canid_t can_id;
canid_t mask;
unsigned long matches;
void (*func)(struct sk_buff *, void *);
void *data;
char *ident;
+ struct sock *sk;
+ struct rcu_head rcu;
};
#define CAN_SFF_RCV_ARRAY_SZ (1 << CAN_SFF_ID_BITS)
diff --git a/net/can/bcm.c b/net/can/bcm.c
index 5e9ed5e..e4f694d 100644
--- a/net/can/bcm.c
+++ b/net/can/bcm.c
@@ -1225,7 +1225,7 @@ static int bcm_rx_setup(struct bcm_msg_head *msg_head, struct msghdr *msg,
err = can_rx_register(dev, op->can_id,
REGMASK(op->can_id),
bcm_rx_handler, op,
- "bcm");
+ "bcm", sk);
op->rx_reg_dev = dev;
dev_put(dev);
@@ -1234,7 +1234,7 @@ static int bcm_rx_setup(struct bcm_msg_head *msg_head, struct msghdr *msg,
} else
err = can_rx_register(NULL, op->can_id,
REGMASK(op->can_id),
- bcm_rx_handler, op, "bcm");
+ bcm_rx_handler, op, "bcm", sk);
if (err) {
/* this bcm rx op is broken -> remove it */
list_del(&op->list);
diff --git a/net/can/gw.c b/net/can/gw.c
index 4551687..77c8af4 100644
--- a/net/can/gw.c
+++ b/net/can/gw.c
@@ -442,7 +442,7 @@ static inline int cgw_register_filter(struct cgw_job *gwj)
{
return can_rx_register(gwj->src.dev, gwj->ccgw.filter.can_id,
gwj->ccgw.filter.can_mask, can_can_gw_rcv,
- gwj, "gw");
+ gwj, "gw", NULL);
}
static inline void cgw_unregister_filter(struct cgw_job *gwj)
diff --git a/net/can/raw.c b/net/can/raw.c
index b075f02..6dc546a 100644
--- a/net/can/raw.c
+++ b/net/can/raw.c
@@ -190,7 +190,7 @@ static int raw_enable_filters(struct net_device *dev, struct sock *sk,
for (i = 0; i < count; i++) {
err = can_rx_register(dev, filter[i].can_id,
filter[i].can_mask,
- raw_rcv, sk, "raw");
+ raw_rcv, sk, "raw", sk);
if (err) {
/* clean up successfully registered filters */
while (--i >= 0)
@@ -211,7 +211,7 @@ static int raw_enable_errfilter(struct net_device *dev, struct sock *sk,
if (err_mask)
err = can_rx_register(dev, 0, err_mask | CAN_ERR_FLAG,
- raw_rcv, sk, "raw");
+ raw_rcv, sk, "raw", sk);
return err;
}
diff --git a/net/core/dev.c b/net/core/dev.c
index ab6dc94..555ed4b 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1696,24 +1696,19 @@ EXPORT_SYMBOL_GPL(net_dec_egress_queue);
static struct static_key netstamp_needed __read_mostly;
#ifdef HAVE_JUMP_LABEL
-/* We are not allowed to call static_key_slow_dec() from irq context
- * If net_disable_timestamp() is called from irq context, defer the
- * static_key_slow_dec() calls.
- */
static atomic_t netstamp_needed_deferred;
+static void netstamp_clear(struct work_struct *work)
+{
+ int deferred = atomic_xchg(&netstamp_needed_deferred, 0);
+
+ while (deferred--)
+ static_key_slow_dec(&netstamp_needed);
+}
+static DECLARE_WORK(netstamp_work, netstamp_clear);
#endif
void net_enable_timestamp(void)
{
-#ifdef HAVE_JUMP_LABEL
- int deferred = atomic_xchg(&netstamp_needed_deferred, 0);
-
- if (deferred) {
- while (--deferred)
- static_key_slow_dec(&netstamp_needed);
- return;
- }
-#endif
static_key_slow_inc(&netstamp_needed);
}
EXPORT_SYMBOL(net_enable_timestamp);
@@ -1721,12 +1716,12 @@ EXPORT_SYMBOL(net_enable_timestamp);
void net_disable_timestamp(void)
{
#ifdef HAVE_JUMP_LABEL
- if (in_interrupt()) {
- atomic_inc(&netstamp_needed_deferred);
- return;
- }
-#endif
+ /* net_disable_timestamp() can be called from non process context */
+ atomic_inc(&netstamp_needed_deferred);
+ schedule_work(&netstamp_work);
+#else
static_key_slow_dec(&netstamp_needed);
+#endif
}
EXPORT_SYMBOL(net_disable_timestamp);
diff --git a/net/dccp/ipv6.c b/net/dccp/ipv6.c
index 715e5d1..7506c03 100644
--- a/net/dccp/ipv6.c
+++ b/net/dccp/ipv6.c
@@ -227,7 +227,7 @@ static int dccp_v6_send_response(const struct sock *sk, struct request_sock *req
opt = ireq->ipv6_opt;
if (!opt)
opt = rcu_dereference(np->opt);
- err = ip6_xmit(sk, skb, &fl6, opt, np->tclass);
+ err = ip6_xmit(sk, skb, &fl6, sk->sk_mark, opt, np->tclass);
rcu_read_unlock();
err = net_xmit_eval(err);
}
@@ -281,7 +281,7 @@ static void dccp_v6_ctl_send_reset(const struct sock *sk, struct sk_buff *rxskb)
dst = ip6_dst_lookup_flow(ctl_sk, &fl6, NULL);
if (!IS_ERR(dst)) {
skb_dst_set(skb, dst);
- ip6_xmit(ctl_sk, skb, &fl6, NULL, 0);
+ ip6_xmit(ctl_sk, skb, &fl6, 0, NULL, 0);
DCCP_INC_STATS(DCCP_MIB_OUTSEGS);
DCCP_INC_STATS(DCCP_MIB_OUTRSTS);
return;
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
index da38621..0f99297 100644
--- a/net/dsa/dsa2.c
+++ b/net/dsa/dsa2.c
@@ -273,6 +273,7 @@ static int dsa_user_port_apply(struct device_node *port, u32 index,
if (err) {
dev_warn(ds->dev, "Failed to create slave %d: %d\n",
index, err);
+ ds->ports[index].netdev = NULL;
return err;
}
diff --git a/net/ethernet/eth.c b/net/ethernet/eth.c
index 02acfff..24d7aff 100644
--- a/net/ethernet/eth.c
+++ b/net/ethernet/eth.c
@@ -356,6 +356,7 @@ void ether_setup(struct net_device *dev)
dev->header_ops = ð_header_ops;
dev->type = ARPHRD_ETHER;
dev->hard_header_len = ETH_HLEN;
+ dev->min_header_len = ETH_HLEN;
dev->mtu = ETH_DATA_LEN;
dev->addr_len = ETH_ALEN;
dev->tx_queue_len = 1000; /* Ethernet wants good queues */
diff --git a/net/ipv4/cipso_ipv4.c b/net/ipv4/cipso_ipv4.c
index 72d6f05..ae20616 100644
--- a/net/ipv4/cipso_ipv4.c
+++ b/net/ipv4/cipso_ipv4.c
@@ -1587,6 +1587,10 @@ int cipso_v4_validate(const struct sk_buff *skb, unsigned char **option)
goto validate_return_locked;
}
+ if (opt_iter + 1 == opt_len) {
+ err_offset = opt_iter;
+ goto validate_return_locked;
+ }
tag_len = tag[1];
if (tag_len > (opt_len - opt_iter)) {
err_offset = opt_iter + 1;
diff --git a/net/ipv4/igmp.c b/net/ipv4/igmp.c
index 32a08bc..1bc623d 100644
--- a/net/ipv4/igmp.c
+++ b/net/ipv4/igmp.c
@@ -1172,6 +1172,7 @@ static void igmpv3_del_delrec(struct in_device *in_dev, struct ip_mc_list *im)
psf->sf_crcount = im->crcount;
}
in_dev_put(pmc->interface);
+ kfree(pmc);
}
spin_unlock_bh(&im->lock);
}
diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index d24fa20..0bd3efe 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -1607,6 +1607,7 @@ void ip_send_unicast_reply(struct sock *sk, struct sk_buff *skb,
sk->sk_protocol = ip_hdr(skb)->protocol;
sk->sk_bound_dev_if = arg->bound_dev_if;
sk->sk_sndbuf = sysctl_wmem_default;
+ sk->sk_mark = fl4.flowi4_mark;
err = ip_append_data(sk, &fl4, ip_reply_glue_bits, arg->iov->iov_base,
len, 0, &ipc, &rt, MSG_DONTWAIT);
if (unlikely(err)) {
diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c
index f226f408..65336f3 100644
--- a/net/ipv4/ip_sockglue.c
+++ b/net/ipv4/ip_sockglue.c
@@ -1215,7 +1215,14 @@ void ipv4_pktinfo_prepare(const struct sock *sk, struct sk_buff *skb)
pktinfo->ipi_ifindex = 0;
pktinfo->ipi_spec_dst.s_addr = 0;
}
- skb_dst_drop(skb);
+ /* We need to keep the dst for __ip_options_echo()
+ * We could restrict the test to opt.ts_needtime || opt.srr,
+ * but the following is good enough as IP options are not often used.
+ */
+ if (unlikely(IPCB(skb)->opt.optlen))
+ skb_dst_force(skb);
+ else
+ skb_dst_drop(skb);
}
int ip_setsockopt(struct sock *sk, int level,
diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index 5b2635e..06879e6 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -642,6 +642,8 @@ static int ping_v4_push_pending_frames(struct sock *sk, struct pingfakehdr *pfh,
{
struct sk_buff *skb = skb_peek(&sk->sk_write_queue);
+ if (!skb)
+ return 0;
pfh->wcheck = csum_partial((char *)&pfh->icmph,
sizeof(struct icmphdr), pfh->wcheck);
pfh->icmph.checksum = csum_fold(pfh->wcheck);
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 814af89..6a90a0e 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -772,6 +772,12 @@ ssize_t tcp_splice_read(struct socket *sock, loff_t *ppos,
ret = -EAGAIN;
break;
}
+ /* if __tcp_splice_read() got nothing while we have
+ * an skb in receive queue, we do not want to loop.
+ * This might happen with URG data.
+ */
+ if (!skb_queue_empty(&sk->sk_receive_queue))
+ break;
sk_wait_data(sk, &timeo, NULL);
if (signal_pending(current)) {
ret = sock_intr_errno(timeo);
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index cd8e189..0e7c05b 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -2436,9 +2436,11 @@ u32 __tcp_select_window(struct sock *sk)
int full_space = min_t(int, tp->window_clamp, allowed_space);
int window;
- if (mss > full_space)
+ if (unlikely(mss > full_space)) {
mss = full_space;
-
+ if (mss <= 0)
+ return 0;
+ }
if (free_space < (full_space >> 1)) {
icsk->icsk_ack.quick = 0;
diff --git a/net/ipv6/inet6_connection_sock.c b/net/ipv6/inet6_connection_sock.c
index 1c86c47..10d1deb 100644
--- a/net/ipv6/inet6_connection_sock.c
+++ b/net/ipv6/inet6_connection_sock.c
@@ -175,7 +175,7 @@ int inet6_csk_xmit(struct sock *sk, struct sk_buff *skb, struct flowi *fl_unused
/* Restore final destination back after routing done */
fl6.daddr = sk->sk_v6_daddr;
- res = ip6_xmit(sk, skb, &fl6, rcu_dereference(np->opt),
+ res = ip6_xmit(sk, skb, &fl6, sk->sk_mark, rcu_dereference(np->opt),
np->tclass);
rcu_read_unlock();
return res;
diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c
index 710bc79..ffc83d4 100644
--- a/net/ipv6/ip6_gre.c
+++ b/net/ipv6/ip6_gre.c
@@ -367,35 +367,37 @@ static void ip6gre_tunnel_uninit(struct net_device *dev)
static void ip6gre_err(struct sk_buff *skb, struct inet6_skb_parm *opt,
- u8 type, u8 code, int offset, __be32 info)
+ u8 type, u8 code, int offset, __be32 info)
{
- const struct ipv6hdr *ipv6h = (const struct ipv6hdr *)skb->data;
- __be16 *p = (__be16 *)(skb->data + offset);
- int grehlen = offset + 4;
+ const struct gre_base_hdr *greh;
+ const struct ipv6hdr *ipv6h;
+ int grehlen = sizeof(*greh);
struct ip6_tnl *t;
+ int key_off = 0;
__be16 flags;
+ __be32 key;
- flags = p[0];
- if (flags&(GRE_CSUM|GRE_KEY|GRE_SEQ|GRE_ROUTING|GRE_VERSION)) {
- if (flags&(GRE_VERSION|GRE_ROUTING))
- return;
- if (flags&GRE_KEY) {
- grehlen += 4;
- if (flags&GRE_CSUM)
- grehlen += 4;
- }
+ if (!pskb_may_pull(skb, offset + grehlen))
+ return;
+ greh = (const struct gre_base_hdr *)(skb->data + offset);
+ flags = greh->flags;
+ if (flags & (GRE_VERSION | GRE_ROUTING))
+ return;
+ if (flags & GRE_CSUM)
+ grehlen += 4;
+ if (flags & GRE_KEY) {
+ key_off = grehlen + offset;
+ grehlen += 4;
}
- /* If only 8 bytes returned, keyed message will be dropped here */
- if (!pskb_may_pull(skb, grehlen))
+ if (!pskb_may_pull(skb, offset + grehlen))
return;
ipv6h = (const struct ipv6hdr *)skb->data;
- p = (__be16 *)(skb->data + offset);
+ greh = (const struct gre_base_hdr *)(skb->data + offset);
+ key = key_off ? *(__be32 *)(skb->data + key_off) : 0;
t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr,
- flags & GRE_KEY ?
- *(((__be32 *)p) + (grehlen / 4) - 1) : 0,
- p[1]);
+ key, greh->protocol);
if (!t)
return;
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 59eb4ed..9a87bfb 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -163,7 +163,7 @@ int ip6_output(struct net *net, struct sock *sk, struct sk_buff *skb)
* which are using proper atomic operations or spinlocks.
*/
int ip6_xmit(const struct sock *sk, struct sk_buff *skb, struct flowi6 *fl6,
- struct ipv6_txoptions *opt, int tclass)
+ __u32 mark, struct ipv6_txoptions *opt, int tclass)
{
struct net *net = sock_net(sk);
const struct ipv6_pinfo *np = inet6_sk(sk);
@@ -230,7 +230,7 @@ int ip6_xmit(const struct sock *sk, struct sk_buff *skb, struct flowi6 *fl6,
skb->protocol = htons(ETH_P_IPV6);
skb->priority = sk->sk_priority;
- skb->mark = sk->sk_mark;
+ skb->mark = mark;
mtu = dst_mtu(dst);
if ((skb->len <= mtu) || skb->ignore_df || skb_is_gso(skb)) {
diff --git a/net/ipv6/ip6_tunnel.c b/net/ipv6/ip6_tunnel.c
index c1f497b..885b411 100644
--- a/net/ipv6/ip6_tunnel.c
+++ b/net/ipv6/ip6_tunnel.c
@@ -400,18 +400,19 @@ ip6_tnl_dev_uninit(struct net_device *dev)
__u16 ip6_tnl_parse_tlv_enc_lim(struct sk_buff *skb, __u8 *raw)
{
- const struct ipv6hdr *ipv6h = (const struct ipv6hdr *) raw;
- __u8 nexthdr = ipv6h->nexthdr;
- __u16 off = sizeof(*ipv6h);
+ const struct ipv6hdr *ipv6h = (const struct ipv6hdr *)raw;
+ unsigned int nhoff = raw - skb->data;
+ unsigned int off = nhoff + sizeof(*ipv6h);
+ u8 next, nexthdr = ipv6h->nexthdr;
while (ipv6_ext_hdr(nexthdr) && nexthdr != NEXTHDR_NONE) {
- __u16 optlen = 0;
struct ipv6_opt_hdr *hdr;
- if (raw + off + sizeof(*hdr) > skb->data &&
- !pskb_may_pull(skb, raw - skb->data + off + sizeof (*hdr)))
+ u16 optlen;
+
+ if (!pskb_may_pull(skb, off + sizeof(*hdr)))
break;
- hdr = (struct ipv6_opt_hdr *) (raw + off);
+ hdr = (struct ipv6_opt_hdr *)(skb->data + off);
if (nexthdr == NEXTHDR_FRAGMENT) {
struct frag_hdr *frag_hdr = (struct frag_hdr *) hdr;
if (frag_hdr->frag_off)
@@ -422,20 +423,29 @@ __u16 ip6_tnl_parse_tlv_enc_lim(struct sk_buff *skb, __u8 *raw)
} else {
optlen = ipv6_optlen(hdr);
}
+ /* cache hdr->nexthdr, since pskb_may_pull() might
+ * invalidate hdr
+ */
+ next = hdr->nexthdr;
if (nexthdr == NEXTHDR_DEST) {
- __u16 i = off + 2;
+ u16 i = 2;
+
+ /* Remember : hdr is no longer valid at this point. */
+ if (!pskb_may_pull(skb, off + optlen))
+ break;
+
while (1) {
struct ipv6_tlv_tnl_enc_lim *tel;
/* No more room for encapsulation limit */
- if (i + sizeof (*tel) > off + optlen)
+ if (i + sizeof(*tel) > optlen)
break;
- tel = (struct ipv6_tlv_tnl_enc_lim *) &raw[i];
+ tel = (struct ipv6_tlv_tnl_enc_lim *)(skb->data + off + i);
/* return index of option if found and valid */
if (tel->type == IPV6_TLV_TNL_ENCAP_LIMIT &&
tel->length == 1)
- return i;
+ return i + off - nhoff;
/* else jump to next option */
if (tel->type)
i += tel->length + 2;
@@ -443,7 +453,7 @@ __u16 ip6_tnl_parse_tlv_enc_lim(struct sk_buff *skb, __u8 *raw)
i++;
}
}
- nexthdr = hdr->nexthdr;
+ nexthdr = next;
off += optlen;
}
return 0;
diff --git a/net/ipv6/mcast.c b/net/ipv6/mcast.c
index 14a3903..1bdc703 100644
--- a/net/ipv6/mcast.c
+++ b/net/ipv6/mcast.c
@@ -81,7 +81,7 @@ static void mld_gq_timer_expire(unsigned long data);
static void mld_ifc_timer_expire(unsigned long data);
static void mld_ifc_event(struct inet6_dev *idev);
static void mld_add_delrec(struct inet6_dev *idev, struct ifmcaddr6 *pmc);
-static void mld_del_delrec(struct inet6_dev *idev, const struct in6_addr *addr);
+static void mld_del_delrec(struct inet6_dev *idev, struct ifmcaddr6 *pmc);
static void mld_clear_delrec(struct inet6_dev *idev);
static bool mld_in_v1_mode(const struct inet6_dev *idev);
static int sf_setstate(struct ifmcaddr6 *pmc);
@@ -692,9 +692,9 @@ static void igmp6_group_dropped(struct ifmcaddr6 *mc)
dev_mc_del(dev, buf);
}
- if (mc->mca_flags & MAF_NOREPORT)
- goto done;
spin_unlock_bh(&mc->mca_lock);
+ if (mc->mca_flags & MAF_NOREPORT)
+ return;
if (!mc->idev->dead)
igmp6_leave_group(mc);
@@ -702,8 +702,6 @@ static void igmp6_group_dropped(struct ifmcaddr6 *mc)
spin_lock_bh(&mc->mca_lock);
if (del_timer(&mc->mca_timer))
atomic_dec(&mc->mca_refcnt);
-done:
- ip6_mc_clear_src(mc);
spin_unlock_bh(&mc->mca_lock);
}
@@ -748,10 +746,11 @@ static void mld_add_delrec(struct inet6_dev *idev, struct ifmcaddr6 *im)
spin_unlock_bh(&idev->mc_lock);
}
-static void mld_del_delrec(struct inet6_dev *idev, const struct in6_addr *pmca)
+static void mld_del_delrec(struct inet6_dev *idev, struct ifmcaddr6 *im)
{
struct ifmcaddr6 *pmc, *pmc_prev;
- struct ip6_sf_list *psf, *psf_next;
+ struct ip6_sf_list *psf;
+ struct in6_addr *pmca = &im->mca_addr;
spin_lock_bh(&idev->mc_lock);
pmc_prev = NULL;
@@ -768,14 +767,21 @@ static void mld_del_delrec(struct inet6_dev *idev, const struct in6_addr *pmca)
}
spin_unlock_bh(&idev->mc_lock);
+ spin_lock_bh(&im->mca_lock);
if (pmc) {
- for (psf = pmc->mca_tomb; psf; psf = psf_next) {
- psf_next = psf->sf_next;
- kfree(psf);
+ im->idev = pmc->idev;
+ im->mca_crcount = idev->mc_qrv;
+ im->mca_sfmode = pmc->mca_sfmode;
+ if (pmc->mca_sfmode == MCAST_INCLUDE) {
+ im->mca_tomb = pmc->mca_tomb;
+ im->mca_sources = pmc->mca_sources;
+ for (psf = im->mca_sources; psf; psf = psf->sf_next)
+ psf->sf_crcount = im->mca_crcount;
}
in6_dev_put(pmc->idev);
kfree(pmc);
}
+ spin_unlock_bh(&im->mca_lock);
}
static void mld_clear_delrec(struct inet6_dev *idev)
@@ -904,7 +910,7 @@ int ipv6_dev_mc_inc(struct net_device *dev, const struct in6_addr *addr)
mca_get(mc);
write_unlock_bh(&idev->lock);
- mld_del_delrec(idev, &mc->mca_addr);
+ mld_del_delrec(idev, mc);
igmp6_group_added(mc);
ma_put(mc);
return 0;
@@ -927,6 +933,7 @@ int __ipv6_dev_mc_dec(struct inet6_dev *idev, const struct in6_addr *addr)
write_unlock_bh(&idev->lock);
igmp6_group_dropped(ma);
+ ip6_mc_clear_src(ma);
ma_put(ma);
return 0;
@@ -2501,15 +2508,17 @@ void ipv6_mc_down(struct inet6_dev *idev)
/* Withdraw multicast list */
read_lock_bh(&idev->lock);
- mld_ifc_stop_timer(idev);
- mld_gq_stop_timer(idev);
- mld_dad_stop_timer(idev);
for (i = idev->mc_list; i; i = i->next)
igmp6_group_dropped(i);
- read_unlock_bh(&idev->lock);
- mld_clear_delrec(idev);
+ /* Should stop timer after group drop. or we will
+ * start timer again in mld_ifc_event()
+ */
+ mld_ifc_stop_timer(idev);
+ mld_gq_stop_timer(idev);
+ mld_dad_stop_timer(idev);
+ read_unlock_bh(&idev->lock);
}
static void ipv6_mc_reset(struct inet6_dev *idev)
@@ -2531,8 +2540,10 @@ void ipv6_mc_up(struct inet6_dev *idev)
read_lock_bh(&idev->lock);
ipv6_mc_reset(idev);
- for (i = idev->mc_list; i; i = i->next)
+ for (i = idev->mc_list; i; i = i->next) {
+ mld_del_delrec(idev, i);
igmp6_group_added(i);
+ }
read_unlock_bh(&idev->lock);
}
@@ -2565,6 +2576,7 @@ void ipv6_mc_destroy_dev(struct inet6_dev *idev)
/* Deactivate timers */
ipv6_mc_down(idev);
+ mld_clear_delrec(idev);
/* Delete all-nodes address. */
/* We cannot call ipv6_dev_mc_dec() directly, our caller in
@@ -2579,11 +2591,9 @@ void ipv6_mc_destroy_dev(struct inet6_dev *idev)
write_lock_bh(&idev->lock);
while ((i = idev->mc_list) != NULL) {
idev->mc_list = i->next;
+
write_unlock_bh(&idev->lock);
-
- igmp6_group_dropped(i);
ma_put(i);
-
write_lock_bh(&idev->lock);
}
write_unlock_bh(&idev->lock);
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index b1cdf80..40d7405 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -1390,6 +1390,7 @@ static int ipip6_tunnel_init(struct net_device *dev)
err = dst_cache_init(&tunnel->dst_cache, GFP_KERNEL);
if (err) {
free_percpu(dev->tstats);
+ dev->tstats = NULL;
return err;
}
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index 28ec0a2..37c4b38 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -468,7 +468,7 @@ static int tcp_v6_send_synack(const struct sock *sk, struct dst_entry *dst,
opt = ireq->ipv6_opt;
if (!opt)
opt = rcu_dereference(np->opt);
- err = ip6_xmit(sk, skb, fl6, opt, np->tclass);
+ err = ip6_xmit(sk, skb, fl6, sk->sk_mark, opt, np->tclass);
rcu_read_unlock();
err = net_xmit_eval(err);
}
@@ -839,7 +839,7 @@ static void tcp_v6_send_response(const struct sock *sk, struct sk_buff *skb, u32
dst = ip6_dst_lookup_flow(ctl_sk, &fl6, NULL);
if (!IS_ERR(dst)) {
skb_dst_set(buff, dst);
- ip6_xmit(ctl_sk, buff, &fl6, NULL, tclass);
+ ip6_xmit(ctl_sk, buff, &fl6, fl6.flowi6_mark, NULL, tclass);
TCP_INC_STATS(net, TCP_MIB_OUTSEGS);
if (rst)
TCP_INC_STATS(net, TCP_MIB_OUTRSTS);
@@ -989,6 +989,16 @@ static int tcp_v6_conn_request(struct sock *sk, struct sk_buff *skb)
return 0; /* don't send reset */
}
+static void tcp_v6_restore_cb(struct sk_buff *skb)
+{
+ /* We need to move header back to the beginning if xfrm6_policy_check()
+ * and tcp_v6_fill_cb() are going to be called again.
+ * ip6_datagram_recv_specific_ctl() also expects IP6CB to be there.
+ */
+ memmove(IP6CB(skb), &TCP_SKB_CB(skb)->header.h6,
+ sizeof(struct inet6_skb_parm));
+}
+
static struct sock *tcp_v6_syn_recv_sock(const struct sock *sk, struct sk_buff *skb,
struct request_sock *req,
struct dst_entry *dst,
@@ -1180,8 +1190,10 @@ static struct sock *tcp_v6_syn_recv_sock(const struct sock *sk, struct sk_buff *
sk_gfp_mask(sk, GFP_ATOMIC));
consume_skb(ireq->pktopts);
ireq->pktopts = NULL;
- if (newnp->pktoptions)
+ if (newnp->pktoptions) {
+ tcp_v6_restore_cb(newnp->pktoptions);
skb_set_owner_r(newnp->pktoptions, newsk);
+ }
}
}
@@ -1196,16 +1208,6 @@ static struct sock *tcp_v6_syn_recv_sock(const struct sock *sk, struct sk_buff *
return NULL;
}
-static void tcp_v6_restore_cb(struct sk_buff *skb)
-{
- /* We need to move header back to the beginning if xfrm6_policy_check()
- * and tcp_v6_fill_cb() are going to be called again.
- * ip6_datagram_recv_specific_ctl() also expects IP6CB to be there.
- */
- memmove(IP6CB(skb), &TCP_SKB_CB(skb)->header.h6,
- sizeof(struct inet6_skb_parm));
-}
-
/* The socket must have it's spinlock held when we get
* here, unless it is a TCP_LISTEN socket.
*
diff --git a/net/l2tp/l2tp_core.h b/net/l2tp/l2tp_core.h
index 2599af6..181e755c 100644
--- a/net/l2tp/l2tp_core.h
+++ b/net/l2tp/l2tp_core.h
@@ -273,6 +273,7 @@ int l2tp_xmit_skb(struct l2tp_session *session, struct sk_buff *skb,
int l2tp_nl_register_ops(enum l2tp_pwtype pw_type,
const struct l2tp_nl_cmd_ops *ops);
void l2tp_nl_unregister_ops(enum l2tp_pwtype pw_type);
+int l2tp_ioctl(struct sock *sk, int cmd, unsigned long arg);
/* Session reference counts. Incremented when code obtains a reference
* to a session.
diff --git a/net/l2tp/l2tp_ip.c b/net/l2tp/l2tp_ip.c
index 8938b6b..c0f0750 100644
--- a/net/l2tp/l2tp_ip.c
+++ b/net/l2tp/l2tp_ip.c
@@ -11,6 +11,7 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <asm/ioctls.h>
#include <linux/icmp.h>
#include <linux/module.h>
#include <linux/skbuff.h>
@@ -560,6 +561,30 @@ static int l2tp_ip_recvmsg(struct sock *sk, struct msghdr *msg,
return err ? err : copied;
}
+int l2tp_ioctl(struct sock *sk, int cmd, unsigned long arg)
+{
+ struct sk_buff *skb;
+ int amount;
+
+ switch (cmd) {
+ case SIOCOUTQ:
+ amount = sk_wmem_alloc_get(sk);
+ break;
+ case SIOCINQ:
+ spin_lock_bh(&sk->sk_receive_queue.lock);
+ skb = skb_peek(&sk->sk_receive_queue);
+ amount = skb ? skb->len : 0;
+ spin_unlock_bh(&sk->sk_receive_queue.lock);
+ break;
+
+ default:
+ return -ENOIOCTLCMD;
+ }
+
+ return put_user(amount, (int __user *)arg);
+}
+EXPORT_SYMBOL(l2tp_ioctl);
+
static struct proto l2tp_ip_prot = {
.name = "L2TP/IP",
.owner = THIS_MODULE,
@@ -568,7 +593,7 @@ static struct proto l2tp_ip_prot = {
.bind = l2tp_ip_bind,
.connect = l2tp_ip_connect,
.disconnect = l2tp_ip_disconnect,
- .ioctl = udp_ioctl,
+ .ioctl = l2tp_ioctl,
.destroy = l2tp_ip_destroy_sock,
.setsockopt = ip_setsockopt,
.getsockopt = ip_getsockopt,
diff --git a/net/l2tp/l2tp_ip6.c b/net/l2tp/l2tp_ip6.c
index f092ac4..7095786 100644
--- a/net/l2tp/l2tp_ip6.c
+++ b/net/l2tp/l2tp_ip6.c
@@ -730,7 +730,7 @@ static struct proto l2tp_ip6_prot = {
.bind = l2tp_ip6_bind,
.connect = l2tp_ip6_connect,
.disconnect = l2tp_ip6_disconnect,
- .ioctl = udp_ioctl,
+ .ioctl = l2tp_ioctl,
.destroy = l2tp_ip6_destroy_sock,
.setsockopt = ipv6_setsockopt,
.getsockopt = ipv6_getsockopt,
diff --git a/net/mac80211/mesh.c b/net/mac80211/mesh.c
index 42120d9..50e1b7f 100644
--- a/net/mac80211/mesh.c
+++ b/net/mac80211/mesh.c
@@ -339,7 +339,7 @@ int mesh_add_vendor_ies(struct ieee80211_sub_if_data *sdata,
/* fast-forward to vendor IEs */
offset = ieee80211_ie_split_vendor(ifmsh->ie, ifmsh->ie_len, 0);
- if (offset) {
+ if (offset < ifmsh->ie_len) {
len = ifmsh->ie_len - offset;
data = ifmsh->ie + offset;
if (skb_tailroom(skb) < len)
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 94e4a59..458722b 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -2813,7 +2813,7 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
struct virtio_net_hdr vnet_hdr = { 0 };
int offset = 0;
struct packet_sock *po = pkt_sk(sk);
- int hlen, tlen;
+ int hlen, tlen, linear;
int extra_len = 0;
/*
@@ -2874,8 +2874,9 @@ static int packet_snd(struct socket *sock, struct msghdr *msg, size_t len)
err = -ENOBUFS;
hlen = LL_RESERVED_SPACE(dev);
tlen = dev->needed_tailroom;
- skb = packet_alloc_skb(sk, hlen + tlen, hlen, len,
- __virtio16_to_cpu(vio_le(), vnet_hdr.hdr_len),
+ linear = __virtio16_to_cpu(vio_le(), vnet_hdr.hdr_len);
+ linear = max(linear, min_t(int, len, dev->hard_header_len));
+ skb = packet_alloc_skb(sk, hlen + tlen, hlen, len, linear,
msg->msg_flags & MSG_DONTWAIT, &err);
if (skb == NULL)
goto out_unlock;
diff --git a/net/sched/cls_matchall.c b/net/sched/cls_matchall.c
index f935429..b12bc2a 100644
--- a/net/sched/cls_matchall.c
+++ b/net/sched/cls_matchall.c
@@ -16,16 +16,11 @@
#include <net/sch_generic.h>
#include <net/pkt_cls.h>
-struct cls_mall_filter {
+struct cls_mall_head {
struct tcf_exts exts;
struct tcf_result res;
u32 handle;
- struct rcu_head rcu;
u32 flags;
-};
-
-struct cls_mall_head {
- struct cls_mall_filter *filter;
struct rcu_head rcu;
};
@@ -33,38 +28,29 @@ static int mall_classify(struct sk_buff *skb, const struct tcf_proto *tp,
struct tcf_result *res)
{
struct cls_mall_head *head = rcu_dereference_bh(tp->root);
- struct cls_mall_filter *f = head->filter;
- if (tc_skip_sw(f->flags))
+ if (tc_skip_sw(head->flags))
return -1;
- return tcf_exts_exec(skb, &f->exts, res);
+ return tcf_exts_exec(skb, &head->exts, res);
}
static int mall_init(struct tcf_proto *tp)
{
- struct cls_mall_head *head;
-
- head = kzalloc(sizeof(*head), GFP_KERNEL);
- if (!head)
- return -ENOBUFS;
-
- rcu_assign_pointer(tp->root, head);
-
return 0;
}
-static void mall_destroy_filter(struct rcu_head *head)
+static void mall_destroy_rcu(struct rcu_head *rcu)
{
- struct cls_mall_filter *f = container_of(head, struct cls_mall_filter, rcu);
+ struct cls_mall_head *head = container_of(rcu, struct cls_mall_head,
+ rcu);
- tcf_exts_destroy(&f->exts);
-
- kfree(f);
+ tcf_exts_destroy(&head->exts);
+ kfree(head);
}
static int mall_replace_hw_filter(struct tcf_proto *tp,
- struct cls_mall_filter *f,
+ struct cls_mall_head *head,
unsigned long cookie)
{
struct net_device *dev = tp->q->dev_queue->dev;
@@ -74,7 +60,7 @@ static int mall_replace_hw_filter(struct tcf_proto *tp,
offload.type = TC_SETUP_MATCHALL;
offload.cls_mall = &mall_offload;
offload.cls_mall->command = TC_CLSMATCHALL_REPLACE;
- offload.cls_mall->exts = &f->exts;
+ offload.cls_mall->exts = &head->exts;
offload.cls_mall->cookie = cookie;
return dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle, tp->protocol,
@@ -82,7 +68,7 @@ static int mall_replace_hw_filter(struct tcf_proto *tp,
}
static void mall_destroy_hw_filter(struct tcf_proto *tp,
- struct cls_mall_filter *f,
+ struct cls_mall_head *head,
unsigned long cookie)
{
struct net_device *dev = tp->q->dev_queue->dev;
@@ -103,29 +89,20 @@ static bool mall_destroy(struct tcf_proto *tp, bool force)
{
struct cls_mall_head *head = rtnl_dereference(tp->root);
struct net_device *dev = tp->q->dev_queue->dev;
- struct cls_mall_filter *f = head->filter;
- if (!force && f)
- return false;
+ if (!head)
+ return true;
- if (f) {
- if (tc_should_offload(dev, tp, f->flags))
- mall_destroy_hw_filter(tp, f, (unsigned long) f);
+ if (tc_should_offload(dev, tp, head->flags))
+ mall_destroy_hw_filter(tp, head, (unsigned long) head);
- call_rcu(&f->rcu, mall_destroy_filter);
- }
- kfree_rcu(head, rcu);
+ call_rcu(&head->rcu, mall_destroy_rcu);
return true;
}
static unsigned long mall_get(struct tcf_proto *tp, u32 handle)
{
- struct cls_mall_head *head = rtnl_dereference(tp->root);
- struct cls_mall_filter *f = head->filter;
-
- if (f && f->handle == handle)
- return (unsigned long) f;
- return 0;
+ return 0UL;
}
static const struct nla_policy mall_policy[TCA_MATCHALL_MAX + 1] = {
@@ -134,7 +111,7 @@ static const struct nla_policy mall_policy[TCA_MATCHALL_MAX + 1] = {
};
static int mall_set_parms(struct net *net, struct tcf_proto *tp,
- struct cls_mall_filter *f,
+ struct cls_mall_head *head,
unsigned long base, struct nlattr **tb,
struct nlattr *est, bool ovr)
{
@@ -147,11 +124,11 @@ static int mall_set_parms(struct net *net, struct tcf_proto *tp,
return err;
if (tb[TCA_MATCHALL_CLASSID]) {
- f->res.classid = nla_get_u32(tb[TCA_MATCHALL_CLASSID]);
- tcf_bind_filter(tp, &f->res, base);
+ head->res.classid = nla_get_u32(tb[TCA_MATCHALL_CLASSID]);
+ tcf_bind_filter(tp, &head->res, base);
}
- tcf_exts_change(tp, &f->exts, &e);
+ tcf_exts_change(tp, &head->exts, &e);
return 0;
}
@@ -162,21 +139,17 @@ static int mall_change(struct net *net, struct sk_buff *in_skb,
unsigned long *arg, bool ovr)
{
struct cls_mall_head *head = rtnl_dereference(tp->root);
- struct cls_mall_filter *fold = (struct cls_mall_filter *) *arg;
struct net_device *dev = tp->q->dev_queue->dev;
- struct cls_mall_filter *f;
struct nlattr *tb[TCA_MATCHALL_MAX + 1];
+ struct cls_mall_head *new;
u32 flags = 0;
int err;
if (!tca[TCA_OPTIONS])
return -EINVAL;
- if (head->filter)
- return -EBUSY;
-
- if (fold)
- return -EINVAL;
+ if (head)
+ return -EEXIST;
err = nla_parse_nested(tb, TCA_MATCHALL_MAX,
tca[TCA_OPTIONS], mall_policy);
@@ -189,23 +162,23 @@ static int mall_change(struct net *net, struct sk_buff *in_skb,
return -EINVAL;
}
- f = kzalloc(sizeof(*f), GFP_KERNEL);
- if (!f)
+ new = kzalloc(sizeof(*new), GFP_KERNEL);
+ if (!new)
return -ENOBUFS;
- tcf_exts_init(&f->exts, TCA_MATCHALL_ACT, 0);
+ tcf_exts_init(&new->exts, TCA_MATCHALL_ACT, 0);
if (!handle)
handle = 1;
- f->handle = handle;
- f->flags = flags;
+ new->handle = handle;
+ new->flags = flags;
- err = mall_set_parms(net, tp, f, base, tb, tca[TCA_RATE], ovr);
+ err = mall_set_parms(net, tp, new, base, tb, tca[TCA_RATE], ovr);
if (err)
goto errout;
if (tc_should_offload(dev, tp, flags)) {
- err = mall_replace_hw_filter(tp, f, (unsigned long) f);
+ err = mall_replace_hw_filter(tp, new, (unsigned long) new);
if (err) {
if (tc_skip_sw(flags))
goto errout;
@@ -214,39 +187,29 @@ static int mall_change(struct net *net, struct sk_buff *in_skb,
}
}
- *arg = (unsigned long) f;
- rcu_assign_pointer(head->filter, f);
-
+ *arg = (unsigned long) head;
+ rcu_assign_pointer(tp->root, new);
+ if (head)
+ call_rcu(&head->rcu, mall_destroy_rcu);
return 0;
errout:
- kfree(f);
+ kfree(new);
return err;
}
static int mall_delete(struct tcf_proto *tp, unsigned long arg)
{
- struct cls_mall_head *head = rtnl_dereference(tp->root);
- struct cls_mall_filter *f = (struct cls_mall_filter *) arg;
- struct net_device *dev = tp->q->dev_queue->dev;
-
- if (tc_should_offload(dev, tp, f->flags))
- mall_destroy_hw_filter(tp, f, (unsigned long) f);
-
- RCU_INIT_POINTER(head->filter, NULL);
- tcf_unbind_filter(tp, &f->res);
- call_rcu(&f->rcu, mall_destroy_filter);
- return 0;
+ return -EOPNOTSUPP;
}
static void mall_walk(struct tcf_proto *tp, struct tcf_walker *arg)
{
struct cls_mall_head *head = rtnl_dereference(tp->root);
- struct cls_mall_filter *f = head->filter;
if (arg->count < arg->skip)
goto skip;
- if (arg->fn(tp, (unsigned long) f, arg) < 0)
+ if (arg->fn(tp, (unsigned long) head, arg) < 0)
arg->stop = 1;
skip:
arg->count++;
@@ -255,28 +218,28 @@ static void mall_walk(struct tcf_proto *tp, struct tcf_walker *arg)
static int mall_dump(struct net *net, struct tcf_proto *tp, unsigned long fh,
struct sk_buff *skb, struct tcmsg *t)
{
- struct cls_mall_filter *f = (struct cls_mall_filter *) fh;
+ struct cls_mall_head *head = (struct cls_mall_head *) fh;
struct nlattr *nest;
- if (!f)
+ if (!head)
return skb->len;
- t->tcm_handle = f->handle;
+ t->tcm_handle = head->handle;
nest = nla_nest_start(skb, TCA_OPTIONS);
if (!nest)
goto nla_put_failure;
- if (f->res.classid &&
- nla_put_u32(skb, TCA_MATCHALL_CLASSID, f->res.classid))
+ if (head->res.classid &&
+ nla_put_u32(skb, TCA_MATCHALL_CLASSID, head->res.classid))
goto nla_put_failure;
- if (tcf_exts_dump(skb, &f->exts))
+ if (tcf_exts_dump(skb, &head->exts))
goto nla_put_failure;
nla_nest_end(skb, nest);
- if (tcf_exts_dump_stats(skb, &f->exts) < 0)
+ if (tcf_exts_dump_stats(skb, &head->exts) < 0)
goto nla_put_failure;
return skb->len;
diff --git a/net/sctp/ipv6.c b/net/sctp/ipv6.c
index 176af30..6a2532d 100644
--- a/net/sctp/ipv6.c
+++ b/net/sctp/ipv6.c
@@ -222,7 +222,8 @@ static int sctp_v6_xmit(struct sk_buff *skb, struct sctp_transport *transport)
SCTP_INC_STATS(sock_net(sk), SCTP_MIB_OUTSCTPPACKS);
rcu_read_lock();
- res = ip6_xmit(sk, skb, fl6, rcu_dereference(np->opt), np->tclass);
+ res = ip6_xmit(sk, skb, fl6, sk->sk_mark, rcu_dereference(np->opt),
+ np->tclass);
rcu_read_unlock();
return res;
}
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index ca12aa3..6cbe5bd 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -7427,7 +7427,8 @@ static int sctp_wait_for_sndbuf(struct sctp_association *asoc, long *timeo_p,
*/
release_sock(sk);
current_timeo = schedule_timeout(current_timeo);
- BUG_ON(sk != asoc->base.sk);
+ if (sk != asoc->base.sk)
+ goto do_error;
lock_sock(sk);
*timeo_p = current_timeo;
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 92db80d..034f70c 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -5874,6 +5874,7 @@ do { \
break;
}
cfg->ht_opmode = ht_opmode;
+ mask |= (1 << (NL80211_MESHCONF_HT_OPMODE - 1));
}
FILL_IN_MESH_PARAM_IF_SET(tb, cfg, dot11MeshHWMPactivePathToRootTimeout,
1, 65535, mask,
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index 24bd84d..8b918f8 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -5859,7 +5859,7 @@ static int selinux_setprocattr(struct task_struct *p,
return error;
/* Obtain a SID for the context, if one was specified. */
- if (size && str[1] && str[1] != '\n') {
+ if (size && str[0] && str[0] != '\n') {
if (str[size-1] == '\n') {
str[size-1] = 0;
size--;
diff --git a/sound/core/seq/seq_memory.c b/sound/core/seq/seq_memory.c
index c850345..dfa5156 100644
--- a/sound/core/seq/seq_memory.c
+++ b/sound/core/seq/seq_memory.c
@@ -419,7 +419,6 @@ int snd_seq_pool_done(struct snd_seq_pool *pool)
{
unsigned long flags;
struct snd_seq_event_cell *ptr;
- int max_count = 5 * HZ;
if (snd_BUG_ON(!pool))
return -EINVAL;
@@ -432,14 +431,8 @@ int snd_seq_pool_done(struct snd_seq_pool *pool)
if (waitqueue_active(&pool->output_sleep))
wake_up(&pool->output_sleep);
- while (atomic_read(&pool->counter) > 0) {
- if (max_count == 0) {
- pr_warn("ALSA: snd_seq_pool_done timeout: %d cells remain\n", atomic_read(&pool->counter));
- break;
- }
+ while (atomic_read(&pool->counter) > 0)
schedule_timeout_uninterruptible(1);
- max_count--;
- }
/* release all resources */
spin_lock_irqsave(&pool->lock, flags);
diff --git a/sound/core/seq/seq_queue.c b/sound/core/seq/seq_queue.c
index 0bec02e..450c518 100644
--- a/sound/core/seq/seq_queue.c
+++ b/sound/core/seq/seq_queue.c
@@ -181,6 +181,8 @@ void __exit snd_seq_queues_delete(void)
}
}
+static void queue_use(struct snd_seq_queue *queue, int client, int use);
+
/* allocate a new queue -
* return queue index value or negative value for error
*/
@@ -192,11 +194,11 @@ int snd_seq_queue_alloc(int client, int locked, unsigned int info_flags)
if (q == NULL)
return -ENOMEM;
q->info_flags = info_flags;
+ queue_use(q, client, 1);
if (queue_list_add(q) < 0) {
queue_delete(q);
return -ENOMEM;
}
- snd_seq_queue_use(q->queue, client, 1); /* use this queue */
return q->queue;
}
@@ -502,19 +504,9 @@ int snd_seq_queue_timer_set_tempo(int queueid, int client,
return result;
}
-
-/* use or unuse this queue -
- * if it is the first client, starts the timer.
- * if it is not longer used by any clients, stop the timer.
- */
-int snd_seq_queue_use(int queueid, int client, int use)
+/* use or unuse this queue */
+static void queue_use(struct snd_seq_queue *queue, int client, int use)
{
- struct snd_seq_queue *queue;
-
- queue = queueptr(queueid);
- if (queue == NULL)
- return -EINVAL;
- mutex_lock(&queue->timer_mutex);
if (use) {
if (!test_and_set_bit(client, queue->clients_bitmap))
queue->clients++;
@@ -529,6 +521,21 @@ int snd_seq_queue_use(int queueid, int client, int use)
} else {
snd_seq_timer_close(queue);
}
+}
+
+/* use or unuse this queue -
+ * if it is the first client, starts the timer.
+ * if it is not longer used by any clients, stop the timer.
+ */
+int snd_seq_queue_use(int queueid, int client, int use)
+{
+ struct snd_seq_queue *queue;
+
+ queue = queueptr(queueid);
+ if (queue == NULL)
+ return -EINVAL;
+ mutex_lock(&queue->timer_mutex);
+ queue_use(queue, client, use);
mutex_unlock(&queue->timer_mutex);
queuefree(queue);
return 0;
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 56e5204..4bf4833 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -3638,6 +3638,7 @@ HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
+HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
diff --git a/sound/usb/line6/driver.c b/sound/usb/line6/driver.c
index 90009c0..ab3c280 100644
--- a/sound/usb/line6/driver.c
+++ b/sound/usb/line6/driver.c
@@ -754,8 +754,9 @@ int line6_probe(struct usb_interface *interface,
goto error;
}
+ line6_get_interval(line6);
+
if (properties->capabilities & LINE6_CAP_CONTROL) {
- line6_get_interval(line6);
ret = line6_init_cap_control(line6);
if (ret < 0)
goto error;
diff --git a/tools/perf/builtin-diff.c b/tools/perf/builtin-diff.c
index 9ff0db4..933aeec 100644
--- a/tools/perf/builtin-diff.c
+++ b/tools/perf/builtin-diff.c
@@ -1199,7 +1199,7 @@ static int ui_init(void)
BUG_ON(1);
}
- perf_hpp__register_sort_field(fmt);
+ perf_hpp__prepend_sort_field(fmt);
return 0;
}
diff --git a/tools/perf/ui/hist.c b/tools/perf/ui/hist.c
index 3738839..18cfcdc9 100644
--- a/tools/perf/ui/hist.c
+++ b/tools/perf/ui/hist.c
@@ -521,6 +521,12 @@ void perf_hpp_list__register_sort_field(struct perf_hpp_list *list,
list_add_tail(&format->sort_list, &list->sorts);
}
+void perf_hpp_list__prepend_sort_field(struct perf_hpp_list *list,
+ struct perf_hpp_fmt *format)
+{
+ list_add(&format->sort_list, &list->sorts);
+}
+
void perf_hpp__column_unregister(struct perf_hpp_fmt *format)
{
list_del(&format->list);
@@ -560,6 +566,10 @@ void perf_hpp__setup_output_field(struct perf_hpp_list *list)
perf_hpp_list__for_each_sort_list(list, fmt) {
struct perf_hpp_fmt *pos;
+ /* skip sort-only fields ("sort_compute" in perf diff) */
+ if (!fmt->entry && !fmt->color)
+ continue;
+
perf_hpp_list__for_each_format(list, pos) {
if (fmt_equal(fmt, pos))
goto next;
diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h
index 9928fed..a440a04 100644
--- a/tools/perf/util/hist.h
+++ b/tools/perf/util/hist.h
@@ -282,6 +282,8 @@ void perf_hpp_list__column_register(struct perf_hpp_list *list,
struct perf_hpp_fmt *format);
void perf_hpp_list__register_sort_field(struct perf_hpp_list *list,
struct perf_hpp_fmt *format);
+void perf_hpp_list__prepend_sort_field(struct perf_hpp_list *list,
+ struct perf_hpp_fmt *format);
static inline void perf_hpp__column_register(struct perf_hpp_fmt *format)
{
@@ -293,6 +295,11 @@ static inline void perf_hpp__register_sort_field(struct perf_hpp_fmt *format)
perf_hpp_list__register_sort_field(&perf_hpp_list, format);
}
+static inline void perf_hpp__prepend_sort_field(struct perf_hpp_fmt *format)
+{
+ perf_hpp_list__prepend_sort_field(&perf_hpp_list, format);
+}
+
#define perf_hpp_list__for_each_format(_list, format) \
list_for_each_entry(format, &(_list)->fields, list)