staging: dgnc: neo_uart_struct: adds marker and changes vars' types for sparse
This patch fixes these warnings found in the neo.c file:
warning: incorrect type in argument 1 (different address spaces)
expected void const volatile [noderef] <asn:2>*addr
got unsigned char volatile *<noident>
warning: incorrect type in argument 2 (different address spaces)
expected void volatile [noderef] <asn:2>*addr
got unsigned char volatile *<noident>
The variables passed to readb and writeb need to
be of type u8 with a __iomem marker. These warnings
were popping up everytime the readb and writeb
functions were called with a neo_uart_struct variable.
The change made to the driver.h file adds the marker
to the neo_uart_struct and the changes in neo.h
changes the variables' types.
Signed-off-by: Lidza Louina <lidza.louina@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/drivers/staging/dgnc/dgnc_neo.h b/drivers/staging/dgnc/dgnc_neo.h
index f7f569b..7ec5710 100644
--- a/drivers/staging/dgnc/dgnc_neo.h
+++ b/drivers/staging/dgnc/dgnc_neo.h
@@ -36,27 +36,27 @@
************************************************************************/
struct neo_uart_struct {
- volatile uchar txrx; /* WR RHR/THR - Holding Reg */
- volatile uchar ier; /* WR IER - Interrupt Enable Reg */
- volatile uchar isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
- volatile uchar lcr; /* WR LCR - Line Control Reg */
- volatile uchar mcr; /* WR MCR - Modem Control Reg */
- volatile uchar lsr; /* WR LSR - Line Status Reg */
- volatile uchar msr; /* WR MSR - Modem Status Reg */
- volatile uchar spr; /* WR SPR - Scratch Pad Reg */
- volatile uchar fctr; /* WR FCTR - Feature Control Reg */
- volatile uchar efr; /* WR EFR - Enhanced Function Reg */
- volatile uchar tfifo; /* WR TXCNT/TXTRG - Transmit FIFO Reg */
- volatile uchar rfifo; /* WR RXCNT/RXTRG - Recieve FIFO Reg */
- volatile uchar xoffchar1; /* WR XOFF 1 - XOff Character 1 Reg */
- volatile uchar xoffchar2; /* WR XOFF 2 - XOff Character 2 Reg */
- volatile uchar xonchar1; /* WR XON 1 - Xon Character 1 Reg */
- volatile uchar xonchar2; /* WR XON 2 - XOn Character 2 Reg */
+ u8 txrx; /* WR RHR/THR - Holding Reg */
+ u8 ier; /* WR IER - Interrupt Enable Reg */
+ u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
+ u8 lcr; /* WR LCR - Line Control Reg */
+ u8 mcr; /* WR MCR - Modem Control Reg */
+ u8 lsr; /* WR LSR - Line Status Reg */
+ u8 msr; /* WR MSR - Modem Status Reg */
+ u8 spr; /* WR SPR - Scratch Pad Reg */
+ u8 fctr; /* WR FCTR - Feature Control Reg */
+ u8 efr; /* WR EFR - Enhanced Function Reg */
+ u8 tfifo; /* WR TXCNT/TXTRG - Transmit FIFO Reg */
+ u8 rfifo; /* WR RXCNT/RXTRG - Recieve FIFO Reg */
+ u8 xoffchar1; /* WR XOFF 1 - XOff Character 1 Reg */
+ u8 xoffchar2; /* WR XOFF 2 - XOff Character 2 Reg */
+ u8 xonchar1; /* WR XON 1 - Xon Character 1 Reg */
+ u8 xonchar2; /* WR XON 2 - XOn Character 2 Reg */
- volatile uchar reserved1[0x2ff - 0x200]; /* U Reserved by Exar */
- volatile uchar txrxburst[64]; /* RW 64 bytes of RX/TX FIFO Data */
- volatile uchar reserved2[0x37f - 0x340]; /* U Reserved by Exar */
- volatile uchar rxburst_with_errors[64]; /* R 64 bytes of RX FIFO Data + LSR */
+ u8 reserved1[0x2ff - 0x200]; /* U Reserved by Exar */
+ u8 txrxburst[64]; /* RW 64 bytes of RX/TX FIFO Data */
+ u8 reserved2[0x37f - 0x340]; /* U Reserved by Exar */
+ u8 rxburst_with_errors[64]; /* R 64 bytes of RX FIFO Data + LSR */
};
/* Where to read the extended interrupt register (32bits instead of 8bits) */