tree ee48a9e41d4cdeffcbb68b50261576887357e7a2
parent 4a059ff3a9a8bd4ee78e3b89721b698ddb43d385
author Mark Salter <msalter@redhat.com> 1320505060 -0400
committer Mark Salter <msalter@redhat.com> 1326053537 -0500

C6X: fix timer64 initialization

Some SoCs have a timer block enable controlled through the DSCR registers.
There is a problem in the timer64 driver initialization where the code
accesses a timer register to get the divisor used to calculate timer clock
rate. If the timer block has not been enabled when this register read takes
place, an exception is generated. This patch makes sure that the timer block
is enabled before accessing the registers.

Signed-off-by: Mark Salter <msalter@redhat.com>