| commit | 25bb2cec88401a512c01adc8b815f8a579da2558 | [log] [tgz] |
|---|---|---|
| author | Thierry Reding <treding@nvidia.com> | Mon Aug 03 14:23:29 2015 +0200 |
| committer | Thierry Reding <treding@nvidia.com> | Fri Jul 01 14:42:01 2016 +0200 |
| tree | f8d68ae61a35be1c4af1d2308a0e257c4573efbf | |
| parent | 0751bb5c44fe1aa9494ce259d974c3d249b73a84 [diff] |
drm/tegra: sor: Factor out tegra_sor_set_parent_clock() Switching the SOR parent clock can glitch if done while the clock is enabled. Extract a common function that can be used to disable the module clock, switch the parent and reenable the module clock. Signed-off-by: Thierry Reding <treding@nvidia.com>