| commit | 51a01b8c2ea632ed9a57f98c234a0cd9dafe181a | [log] [tgz] |
|---|---|---|
| author | Dharageswari R <dharageswari.r@intel.com> | Fri Jun 03 18:29:37 2016 +0530 |
| committer | Mark Brown <broonie@kernel.org> | Tue Jun 07 14:19:11 2016 +0100 |
| tree | 7c13c502568b2af9cfce3f34f477deaeaad586d4 | |
| parent | 1ae7ca041a460502b0f9877d84d0f0d9bed9cb72 [diff] |
ASoC: Intel: Skylake: Disable SRAM Retention before D3 SW needs to set the PGCTL.LSRMD = 1 to disable LPSRAM retention feature,otherwise it may lead to SRAM ECC Errors. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>