drm/nv84-/fence: prepare for emit/sync support of sysram sequences
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 69d7b1d..fce944c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -561,7 +561,7 @@
struct nouveau_fence *fence = NULL;
int ret;
- ret = nouveau_fence_new(chan, &fence);
+ ret = nouveau_fence_new(chan, false, &fence);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index 525a517..eaa80a2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -51,7 +51,7 @@
struct nouveau_fence *fence = NULL;
int ret;
- ret = nouveau_fence_new(chan, &fence);
+ ret = nouveau_fence_new(chan, false, &fence);
if (!ret) {
ret = nouveau_fence_wait(fence, false, false);
nouveau_fence_unref(&fence);
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 78fc5aa..de87417 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -540,7 +540,7 @@
}
FIRE_RING (chan);
- ret = nouveau_fence_new(chan, pfence);
+ ret = nouveau_fence_new(chan, false, pfence);
if (ret)
goto fail;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 6a7a5b5..6c94683 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -41,8 +41,6 @@
struct nouveau_fence *fence, *fnext;
spin_lock(&fctx->lock);
list_for_each_entry_safe(fence, fnext, &fctx->pending, head) {
- if (fence->work)
- fence->work(fence->priv, false);
fence->channel = NULL;
list_del(&fence->head);
nouveau_fence_unref(&fence);
@@ -69,8 +67,6 @@
if (fctx->read(chan) < fence->sequence)
break;
- if (fence->work)
- fence->work(fence->priv, true);
fence->channel = NULL;
list_del(&fence->head);
nouveau_fence_unref(&fence);
@@ -256,7 +252,8 @@
}
int
-nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence)
+nouveau_fence_new(struct nouveau_channel *chan, bool sysmem,
+ struct nouveau_fence **pfence)
{
struct nouveau_fence *fence;
int ret = 0;
@@ -267,6 +264,8 @@
fence = kzalloc(sizeof(*fence), GFP_KERNEL);
if (!fence)
return -ENOMEM;
+
+ fence->sysmem = sysmem;
kref_init(&fence->kref);
ret = nouveau_fence_emit(fence, chan);
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.h b/drivers/gpu/drm/nouveau/nouveau_fence.h
index a5c47e3..c899434 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.h
@@ -7,15 +7,15 @@
struct list_head head;
struct kref kref;
+ bool sysmem;
+
struct nouveau_channel *channel;
unsigned long timeout;
u32 sequence;
-
- void (*work)(void *priv, bool signalled);
- void *priv;
};
-int nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **);
+int nouveau_fence_new(struct nouveau_channel *, bool sysmem,
+ struct nouveau_fence **);
struct nouveau_fence *
nouveau_fence_ref(struct nouveau_fence *);
void nouveau_fence_unref(struct nouveau_fence **);
@@ -79,24 +79,18 @@
struct nv84_fence_chan {
struct nouveau_fence_chan base;
struct nouveau_vma vma;
+ struct nouveau_vma vma_gart;
struct nouveau_vma dispc_vma[4];
};
struct nv84_fence_priv {
struct nouveau_fence_priv base;
struct nouveau_bo *bo;
+ struct nouveau_bo *bo_gart;
u32 *suspend;
};
u64 nv84_fence_crtc(struct nouveau_channel *, int);
-int nv84_fence_emit(struct nouveau_fence *);
-int nv84_fence_sync(struct nouveau_fence *, struct nouveau_channel *,
- struct nouveau_channel *);
-u32 nv84_fence_read(struct nouveau_channel *);
int nv84_fence_context_new(struct nouveau_channel *);
-void nv84_fence_context_del(struct nouveau_channel *);
-bool nv84_fence_suspend(struct nouveau_drm *);
-void nv84_fence_resume(struct nouveau_drm *);
-void nv84_fence_destroy(struct nouveau_drm *);
#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 7061138..6c45ddb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -787,7 +787,7 @@
}
}
- ret = nouveau_fence_new(chan, &fence);
+ ret = nouveau_fence_new(chan, false, &fence);
if (ret) {
NV_ERROR(cli, "error fencing pushbuf: %d\n", ret);
WIND_RING(chan);
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index bc6493c..9fd475c 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -76,27 +76,39 @@
return ret;
}
-int
+static int
nv84_fence_emit(struct nouveau_fence *fence)
{
struct nouveau_channel *chan = fence->channel;
struct nv84_fence_chan *fctx = chan->fence;
struct nouveau_fifo_chan *fifo = (void *)chan->object;
- u64 addr = fctx->vma.offset + fifo->chid * 16;
+ u64 addr = fifo->chid * 16;
+
+ if (fence->sysmem)
+ addr += fctx->vma_gart.offset;
+ else
+ addr += fctx->vma.offset;
+
return fctx->base.emit32(chan, addr, fence->sequence);
}
-int
+static int
nv84_fence_sync(struct nouveau_fence *fence,
struct nouveau_channel *prev, struct nouveau_channel *chan)
{
struct nv84_fence_chan *fctx = chan->fence;
struct nouveau_fifo_chan *fifo = (void *)prev->object;
- u64 addr = fctx->vma.offset + fifo->chid * 16;
+ u64 addr = fifo->chid * 16;
+
+ if (fence->sysmem)
+ addr += fctx->vma_gart.offset;
+ else
+ addr += fctx->vma.offset;
+
return fctx->base.sync32(chan, addr, fence->sequence);
}
-u32
+static u32
nv84_fence_read(struct nouveau_channel *chan)
{
struct nouveau_fifo_chan *fifo = (void *)chan->object;
@@ -104,7 +116,7 @@
return nouveau_bo_rd32(priv->bo, fifo->chid * 16/4);
}
-void
+static void
nv84_fence_context_del(struct nouveau_channel *chan)
{
struct drm_device *dev = chan->drm->dev;
@@ -117,6 +129,7 @@
nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
}
+ nouveau_bo_vma_del(priv->bo, &fctx->vma_gart);
nouveau_bo_vma_del(priv->bo, &fctx->vma);
nouveau_fence_context_del(&fctx->base);
chan->fence = NULL;
@@ -144,8 +157,10 @@
fctx->base.sync32 = nv84_fence_sync32;
ret = nouveau_bo_vma_add(priv->bo, client->vm, &fctx->vma);
- if (ret)
- nv84_fence_context_del(chan);
+ if (ret == 0) {
+ ret = nouveau_bo_vma_add(priv->bo_gart, client->vm,
+ &fctx->vma_gart);
+ }
/* map display semaphore buffers into channel's vm */
for (i = 0; !ret && i < chan->drm->dev->mode_config.num_crtc; i++) {
@@ -154,10 +169,13 @@
}
nouveau_bo_wr32(priv->bo, fifo->chid * 16/4, 0x00000000);
+
+ if (ret)
+ nv84_fence_context_del(chan);
return ret;
}
-bool
+static bool
nv84_fence_suspend(struct nouveau_drm *drm)
{
struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
@@ -173,7 +191,7 @@
return priv->suspend != NULL;
}
-void
+static void
nv84_fence_resume(struct nouveau_drm *drm)
{
struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
@@ -188,10 +206,14 @@
}
}
-void
+static void
nv84_fence_destroy(struct nouveau_drm *drm)
{
struct nv84_fence_priv *priv = drm->fence;
+ nouveau_bo_unmap(priv->bo_gart);
+ if (priv->bo_gart)
+ nouveau_bo_unpin(priv->bo_gart);
+ nouveau_bo_ref(NULL, &priv->bo_gart);
nouveau_bo_unmap(priv->bo);
if (priv->bo)
nouveau_bo_unpin(priv->bo);
@@ -233,6 +255,21 @@
nouveau_bo_ref(NULL, &priv->bo);
}
+ if (ret == 0)
+ ret = nouveau_bo_new(drm->dev, 16 * (pfifo->max + 1), 0,
+ TTM_PL_FLAG_TT, 0, 0, NULL,
+ &priv->bo_gart);
+ if (ret == 0) {
+ ret = nouveau_bo_pin(priv->bo_gart, TTM_PL_FLAG_TT);
+ if (ret == 0) {
+ ret = nouveau_bo_map(priv->bo_gart);
+ if (ret)
+ nouveau_bo_unpin(priv->bo_gart);
+ }
+ if (ret)
+ nouveau_bo_ref(NULL, &priv->bo_gart);
+ }
+
if (ret)
nv84_fence_destroy(drm);
return ret;
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c
index b7def39..9566267 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fence.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fence.c
@@ -81,37 +81,10 @@
int
nvc0_fence_create(struct nouveau_drm *drm)
{
- struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
- struct nv84_fence_priv *priv;
- int ret;
-
- priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->base.dtor = nv84_fence_destroy;
- priv->base.suspend = nv84_fence_suspend;
- priv->base.resume = nv84_fence_resume;
- priv->base.context_new = nvc0_fence_context_new;
- priv->base.context_del = nv84_fence_context_del;
-
- init_waitqueue_head(&priv->base.waiting);
- priv->base.uevent = true;
-
- ret = nouveau_bo_new(drm->dev, 16 * (pfifo->max + 1), 0,
- TTM_PL_FLAG_VRAM, 0, 0, NULL, &priv->bo);
+ int ret = nv84_fence_create(drm);
if (ret == 0) {
- ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);
- if (ret == 0) {
- ret = nouveau_bo_map(priv->bo);
- if (ret)
- nouveau_bo_unpin(priv->bo);
- }
- if (ret)
- nouveau_bo_ref(NULL, &priv->bo);
+ struct nv84_fence_priv *priv = drm->fence;
+ priv->base.context_new = nvc0_fence_context_new;
}
-
- if (ret)
- nv84_fence_destroy(drm);
return ret;
}