| commit | 26fe45a0a76f165425f332a5aaa298f149f9db22 | [log] [tgz] |
|---|---|---|
| author | Alex Deucher <alexander.deucher@amd.com> | Tue Jul 17 14:02:43 2012 -0400 |
| committer | Christian König <deathsimple@vodafone.de> | Wed Jul 18 13:53:42 2012 +0200 |
| tree | d618cfce76f9c06298976d988a65efbe0179e840 | |
| parent | 377edc8bbd34f177d4ad7113ef70b76ed278fa94 [diff] |
drm/radeon: fix up pll selection on DCE5/6 Selecting ATOM_PPLL_INVALID should be equivalent as the DCPLL or PPLL0 are already programmed for the DISPCLK, but the preferred method is to always specify the PLL selected. SetPixelClock will check the parameters and skip the programming if the PLL is already set up. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>