tree 063f36ca865e51c0ebf45f2bf42b0c9e67c9f03e
parent 3bcf603f6d5d18bd9d076dc280de71f48add4101
author Jesse Barnes <jbarnes@virtuousgeek.org> 1311879165 -0700
committer Keith Packard <keithp@keithp.com> 1311895711 -0700

drm/i915: flush plane control changes on ILK+ as well

After writing to the plane control reg we need to write to the surface
reg to trigger the double buffered register latch.  On previous
chipsets, writing to DSPADDR was enough, but on ILK+ DSPSURF is the reg
that triggers the double buffer latch.

v2: write DSPADDR too to cover pre-965 chipsets
v3: use flush_display_plane instead, that's what it's for
v4: send the right patch

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>