ARM: dts: msm: Add ICE node for SDM670
Add ICE device node to support HW Full Disk
Encryption.
Change-Id: I3c5e7b3cf68935797252bf1f9308cad439e2188c
Signed-off-by: Neeraj Soni <neersoni@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 61df4ce..8d9e51c 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -2160,6 +2160,28 @@
status = "ok";
};
+ sdcc1_ice: sdcc1ice@7c8000 {
+ compatible = "qcom,ice";
+ reg = <0x7c8000 0x8000>;
+ qcom,enable-ice-clk;
+ clock-names = "ice_core_clk_src", "ice_core_clk",
+ "bus_clk", "iface_clk";
+ clocks = <&clock_gcc GCC_SDCC1_ICE_CORE_CLK_SRC>,
+ <&clock_gcc GCC_SDCC1_ICE_CORE_CLK>,
+ <&clock_gcc GCC_SDCC1_APPS_CLK>,
+ <&clock_gcc GCC_SDCC1_AHB_CLK>;
+ qcom,op-freq-hz = <300000000>, <0>, <0>, <0>;
+ qcom,msm-bus,name = "sdcc_ice_noc";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <150 512 0 0>, /* No vote */
+ <150 512 1000 0>; /* Max. bandwidth */
+ qcom,bus-vector-names = "MIN",
+ "MAX";
+ qcom,instance-type = "sdcc";
+ };
+
sdhc_1: sdhci@7c4000 {
compatible = "qcom,sdhci-msm-v5";
reg = <0x7C4000 0x1000>, <0x7C5000 0x1000>;
@@ -2170,6 +2192,7 @@
qcom,bus-width = <8>;
qcom,large-address-bus;
+ sdhc-msm-crypto = <&sdcc1_ice>;
qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
192000000 384000000>;