tree 2d40d5a21d7a7530dd868d844d056e270724e65a
parent b89359bdf0f1e95a4c5f92300594ba9dde323fc4
author Xinliang Liu <xinliang.liu@linaro.org> 1444381229 +0800
committer Xinliang Liu <xinliang.liu@linaro.org> 1461919062 +0800

drm/hisilicon: Add device tree binding for hi6220 display subsystem

Add ADE display controller binding doc.
Add DesignWare DSI Host Controller v1.20a binding doc.

v8: None.
v7: Acked by Rob Herring.
v6:
- Cleanup values part of reg and clocks properties.
- Change "pclk_dsi" clock name to "pclk".
v5:
- Remove endpoint unit address of dsi output port.
- Add "hisilicon,noc-syscon" property for ADE NOC QoS syscon.
- Add "resets" property for ADE reset.
v4:
- Describe more specific of clocks and ports.
- Fix indentation.
v3:
- Make ade as the drm master node.
- Use assigned-clocks to set clock rate.
- Use ports to connect display relavant nodes.
v2:
- Move dt binding docs to bindings/display/hisilicon directory.

Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>