MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index c61a41d..249c61c 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -807,6 +807,16 @@
/* Compact branch: BEQZC || JIC */
regs->cp0_epc += 8;
break;
+ case bnezcjialc_op:
+ if (!cpu_has_mips_r6) {
+ ret = -SIGILL;
+ break;
+ }
+ /* Compact branch: BNEZC || JIALC */
+ if (insn.i_format.rs)
+ regs->regs[31] = epc + 4;
+ regs->cp0_epc += 8;
+ break;
#endif
case cbcond0_op:
case cbcond1_op: