tree 565b544e4d178c78ab32d1246f5585ec922074c9
parent b82bfa4793cd0f8fde49b85e0ad66906682e7447
author Andre Przywara <andre.przywara@arm.com> 1467133648 +0100
committer Catalin Marinas <catalin.marinas@arm.com> 1467368780 +0100

arm64: fix "dc cvau" cache operation on errata-affected core

The ARM errata 819472, 826319, 827319 and 824069 for affected
Cortex-A53 cores demand to promote "dc cvau" instructions to
"dc civac" as well.
Attribute the usage of the instruction in __flush_cache_user_range
to also be covered by our alternative patching efforts.
For that we introduce an assembly macro which both deals with
alternatives while still tagging the instructions as USER.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>