OMAP: DSS2: improve DSS clk src selection

dss_select_clk_source() was rather confusing. Selecting the source with
enums is much clearer.

The clk source selection is also stored into memory, so that we know what
is the selected source, even when clocks are off. This is important during
setup, as we need to what clocks to turn on before the clocks are turned
on.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 0a26b7d..8254a42 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -68,6 +68,9 @@
 	struct dss_clock_info cache_dss_cinfo;
 	struct dispc_clock_info cache_dispc_cinfo;
 
+	enum dss_clk_source dsi_clk_source;
+	enum dss_clk_source dispc_clk_source;
+
 	u32		ctx[DSS_SZ_REGS / sizeof(u32)];
 } dss;
 
@@ -247,23 +250,42 @@
 #undef DUMPREG
 }
 
-void dss_select_clk_source(bool dsi, bool dispc)
+void dss_select_dispc_clk_source(enum dss_clk_source clk_src)
 {
-	u32 r;
-	r = dss_read_reg(DSS_CONTROL);
-	r = FLD_MOD(r, dsi, 1, 1);	/* DSI_CLK_SWITCH */
-	r = FLD_MOD(r, dispc, 0, 0);	/* DISPC_CLK_SWITCH */
-	dss_write_reg(DSS_CONTROL, r);
+	int b;
+
+	BUG_ON(clk_src != DSS_SRC_DSI1_PLL_FCLK &&
+			clk_src != DSS_SRC_DSS1_ALWON_FCLK);
+
+	b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1;
+
+	REG_FLD_MOD(DSS_CONTROL, b, 0, 0);	/* DISPC_CLK_SWITCH */
+
+	dss.dispc_clk_source = clk_src;
 }
 
-int dss_get_dsi_clk_source(void)
+void dss_select_dsi_clk_source(enum dss_clk_source clk_src)
 {
-	return FLD_GET(dss_read_reg(DSS_CONTROL), 1, 1);
+	int b;
+
+	BUG_ON(clk_src != DSS_SRC_DSI2_PLL_FCLK &&
+			clk_src != DSS_SRC_DSS1_ALWON_FCLK);
+
+	b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1;
+
+	REG_FLD_MOD(DSS_CONTROL, b, 1, 1);	/* DSI_CLK_SWITCH */
+
+	dss.dsi_clk_source = clk_src;
 }
 
-int dss_get_dispc_clk_source(void)
+enum dss_clk_source dss_get_dispc_clk_source(void)
 {
-	return FLD_GET(dss_read_reg(DSS_CONTROL), 0, 0);
+	return dss.dispc_clk_source;
+}
+
+enum dss_clk_source dss_get_dsi_clk_source(void)
+{
+	return dss.dsi_clk_source;
 }
 
 /* calculate clock rates using dividers in cinfo */