ARM: tegra: Use a function to get the chip ID
Instead of using a simple variable access to get at the Tegra chip ID,
use a function so that we can run additional code. This can be used to
determine where the chip ID is being accessed without being available.
That in turn will be handy for resolving boot sequence dependencies in
order to convert more code to regular initcalls rather than a sequence
fixed by Tegra SoC setup code.
Signed-off-by: Thierry Reding <treding@nvidia.com>
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index 7bc5d8d..3165631 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -24,12 +24,13 @@
#include <linux/kernel.h>
#include <linux/module.h>
-#include "fuse.h"
+#include <soc/tegra/fuse.h>
+
#include "cpuidle.h"
void __init tegra_cpuidle_init(void)
{
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
tegra20_cpuidle_init();
@@ -49,7 +50,7 @@
void tegra_cpuidle_pcie_irqs_in_use(void)
{
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
tegra20_cpuidle_pcie_irqs_in_use();
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index fde581d..ec55d1d 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -23,9 +23,10 @@
#include <linux/io.h>
#include <linux/kernel.h>
+#include <soc/tegra/fuse.h>
+
#include "flowctrl.h"
#include "iomap.h"
-#include "fuse.h"
static u8 flowctrl_offset_halt_cpu[] = {
FLOW_CTRL_HALT_CPU0_EVENTS,
@@ -76,7 +77,7 @@
int i;
reg = flowctrl_read_cpu_csr(cpuid);
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
/* clear wfe bitmap */
reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
@@ -117,7 +118,7 @@
/* Disable powergating via flow controller for CPU0 */
reg = flowctrl_read_cpu_csr(cpuid);
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
/* clear wfe bitmap */
reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index af28303..b22e76a 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -51,7 +51,6 @@
int tegra_sku_id;
int tegra_cpu_process_id;
int tegra_core_process_id;
-int tegra_chip_id;
int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */
int tegra_soc_speedo_id;
enum tegra_revision tegra_revision;
@@ -124,7 +123,7 @@
case 2:
return TEGRA_REVISION_A02;
case 3:
- if (tegra_chip_id == TEGRA20 &&
+ if (tegra_get_chip_id() == TEGRA20 &&
(tegra_spare_fuse(18) || tegra_spare_fuse(19)))
return TEGRA_REVISION_A03p;
else
@@ -155,6 +154,13 @@
return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
}
+u8 tegra_get_chip_id(void)
+{
+ u32 id = tegra_read_chipid();
+
+ return (id >> 8) & 0xff;
+}
+
static void __init tegra20_fuse_init_randomness(void)
{
u32 randomness[2];
@@ -185,6 +191,7 @@
{
u32 id;
u32 randomness[5];
+ u8 chip_id;
u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
reg |= 1 << 28;
@@ -209,9 +216,9 @@
id = tegra_read_chipid();
randomness[2] = id;
- tegra_chip_id = (id >> 8) & 0xff;
+ chip_id = (id >> 8) & 0xff;
- switch (tegra_chip_id) {
+ switch (chip_id) {
case TEGRA20:
tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
tegra_init_speedo_data = &tegra20_init_speedo_data;
@@ -224,7 +231,7 @@
tegra_init_speedo_data = &tegra114_init_speedo_data;
break;
default:
- pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id);
+ pr_warn("Tegra: unknown chip id %d\n", chip_id);
tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
tegra_init_speedo_data = &tegra_get_process_id;
}
@@ -235,7 +242,7 @@
randomness[4] = (tegra_cpu_speedo_id << 16) | tegra_soc_speedo_id;
add_device_randomness(randomness, sizeof(randomness));
- switch (tegra_chip_id) {
+ switch (chip_id) {
case TEGRA20:
tegra20_fuse_init_randomness();
break;
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index c01d047..7a08b4b 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -26,11 +26,6 @@
#define SKU_ID_AP25E 27
#define SKU_ID_T25E 28
-#define TEGRA20 0x20
-#define TEGRA30 0x30
-#define TEGRA114 0x35
-#define TEGRA124 0x40
-
#ifndef __ASSEMBLY__
enum tegra_revision {
TEGRA_REVISION_UNKNOWN = 0,
@@ -45,7 +40,6 @@
extern int tegra_sku_id;
extern int tegra_cpu_process_id;
extern int tegra_core_process_id;
-extern int tegra_chip_id;
extern int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */
extern int tegra_soc_speedo_id;
extern enum tegra_revision tegra_revision;
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c
index 7842b25..d60339c 100644
--- a/arch/arm/mach-tegra/hotplug.c
+++ b/arch/arm/mach-tegra/hotplug.c
@@ -12,9 +12,10 @@
#include <linux/kernel.h>
#include <linux/smp.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/smp_plat.h>
-#include "fuse.h"
#include "sleep.h"
static void (*tegra_hotplug_shutdown)(void);
@@ -52,12 +53,12 @@
if (!IS_ENABLED(CONFIG_HOTPLUG_CPU))
return;
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20)
tegra_hotplug_shutdown = tegra20_hotplug_shutdown;
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_chip_id == TEGRA30)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_get_chip_id() == TEGRA30)
tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_get_chip_id() == TEGRA114)
tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_get_chip_id() == TEGRA124)
tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
}
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index c403edd..0466a14 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -21,6 +21,8 @@
#include <linux/jiffies.h>
#include <linux/smp.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/cacheflush.h>
#include <asm/mach-types.h>
#include <asm/smp_plat.h>
@@ -28,7 +30,6 @@
#include "common.h"
#include "flowctrl.h"
-#include "fuse.h"
#include "iomap.h"
#include "pmc.h"
#include "reset.h"
@@ -170,13 +171,13 @@
static int tegra_boot_secondary(unsigned int cpu,
struct task_struct *idle)
{
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20)
return tegra20_boot_secondary(cpu, idle);
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_chip_id == TEGRA30)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_get_chip_id() == TEGRA30)
return tegra30_boot_secondary(cpu, idle);
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_get_chip_id() == TEGRA114)
return tegra114_boot_secondary(cpu, idle);
- if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124)
+ if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_get_chip_id() == TEGRA124)
return tegra114_boot_secondary(cpu, idle);
return -EINVAL;
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index ae4826e..94db3b6 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -27,6 +27,8 @@
#include <linux/spinlock.h>
#include <linux/suspend.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/cacheflush.h>
#include <asm/idmap.h>
#include <asm/proc-fns.h>
@@ -35,7 +37,6 @@
#include <asm/tlbflush.h>
#include "flowctrl.h"
-#include "fuse.h"
#include "iomap.h"
#include "pmc.h"
#include "pm.h"
@@ -53,7 +54,7 @@
static void tegra_tear_down_cpu_init(void)
{
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
tegra_tear_down_cpu = tegra20_tear_down_cpu;
@@ -143,7 +144,7 @@
if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask))
last_cpu = true;
- else if (tegra_chip_id == TEGRA20 && phy_cpu_id == 1)
+ else if (tegra_get_chip_id() == TEGRA20 && phy_cpu_id == 1)
tegra20_cpu_set_resettable_soon();
spin_unlock(&tegra_lp2_lock);
@@ -212,7 +213,7 @@
*/
static bool tegra_lp1_iram_hook(void)
{
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
tegra20_lp1_iram_hook();
@@ -242,7 +243,7 @@
static bool tegra_sleep_core_init(void)
{
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
tegra20_sleep_core_init();
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index a602f6c..69df180 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -21,10 +21,10 @@
#include <linux/of.h>
#include <linux/of_address.h>
+#include <soc/tegra/fuse.h>
#include <soc/tegra/powergate.h>
#include "flowctrl.h"
-#include "fuse.h"
#include "pm.h"
#include "pmc.h"
#include "sleep.h"
@@ -252,7 +252,7 @@
reg |= TEGRA_POWER_CPU_PWRREQ_OE;
reg &= ~TEGRA_POWER_EFFECT_LP0;
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
case TEGRA30:
break;
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index c12044d..0a14b86 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -30,9 +30,9 @@
#include <linux/seq_file.h>
#include <linux/spinlock.h>
+#include <soc/tegra/fuse.h>
#include <soc/tegra/powergate.h>
-#include "fuse.h"
#include "iomap.h"
#define DPD_SAMPLE 0x020
@@ -158,7 +158,7 @@
* The Tegra124 GPU has a separate register (with different semantics)
* to remove clamps.
*/
- if (tegra_chip_id == TEGRA124) {
+ if (tegra_get_chip_id() == TEGRA124) {
if (id == TEGRA_POWERGATE_3D) {
pmc_write(0, GPU_RG_CNTRL);
return 0;
@@ -228,7 +228,7 @@
int __init tegra_powergate_init(void)
{
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
tegra_num_powerdomains = 7;
break;
@@ -369,7 +369,7 @@
{
struct dentry *d;
- switch (tegra_chip_id) {
+ switch (tegra_get_chip_id()) {
case TEGRA20:
powergate_name = powergate_name_t20;
break;
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index d916c84..7b2baab 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -17,11 +17,12 @@
#include <linux/init.h>
#include <linux/linkage.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/asm-offsets.h>
#include <asm/cache.h>
#include "flowctrl.h"
-#include "fuse.h"
#include "iomap.h"
#include "reset.h"
#include "sleep.h"
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index b905079..f94fdf8 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -19,6 +19,8 @@
#include <linux/init.h>
#include <linux/io.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/cacheflush.h>
#include <asm/firmware.h>
#include <asm/hardware/cache-l2x0.h>
@@ -53,7 +55,7 @@
* Prevent further modifications to the physical reset vector.
* NOTE: Has no effect on chips prior to Tegra30.
*/
- if (tegra_chip_id != TEGRA20) {
+ if (tegra_get_chip_id() != TEGRA20) {
reg = readl(sb_ctrl);
reg |= 2;
writel(reg, sb_ctrl);
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index e240b87..8ea699b 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -16,12 +16,13 @@
#include <linux/linkage.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/asm-offsets.h>
#include <asm/assembler.h>
#include <asm/cache.h>
#include "flowctrl.h"
-#include "fuse.h"
#include "irammap.h"
#include "sleep.h"
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 7a9f302..8be25c4 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -35,6 +35,8 @@
#include <linux/sys_soc.h>
#include <linux/usb/tegra_usb_phy.h>
+#include <soc/tegra/fuse.h>
+
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
@@ -104,7 +106,7 @@
soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
- soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
+ soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
soc_dev = soc_device_register(soc_dev_attr);
if (IS_ERR(soc_dev)) {