drm/i915: make caching operate on all address spaces
For now, objects will maintain the same cache levels amongst all address
spaces. This is to limit the risk of bugs, as playing with cacheability
in the different domains can be very error prone.
In the future, it may be optimal to allow setting domains per VMA (ie.
an object bound into an address space).
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8322dbe..56c300f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3319,7 +3319,7 @@
{
struct drm_device *dev = obj->base.dev;
drm_i915_private_t *dev_priv = dev->dev_private;
- struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
+ struct i915_vma *vma;
int ret;
if (obj->cache_level == cache_level)
@@ -3330,13 +3330,17 @@
return -EBUSY;
}
- if (vma && !i915_gem_valid_gtt_space(dev, &vma->node, cache_level)) {
- ret = i915_gem_object_unbind(obj);
- if (ret)
- return ret;
+ list_for_each_entry(vma, &obj->vma_list, vma_link) {
+ if (!i915_gem_valid_gtt_space(dev, &vma->node, cache_level)) {
+ ret = i915_gem_object_unbind(obj);
+ if (ret)
+ return ret;
+
+ break;
+ }
}
- if (i915_gem_obj_ggtt_bound(obj)) {
+ if (i915_gem_obj_bound_any(obj)) {
ret = i915_gem_object_finish_gpu(obj);
if (ret)
return ret;
@@ -3358,8 +3362,6 @@
if (obj->has_aliasing_ppgtt_mapping)
i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
obj, cache_level);
-
- i915_gem_obj_to_vma(obj, &dev_priv->gtt.base)->node.color = cache_level;
}
if (cache_level == I915_CACHE_NONE) {
@@ -3385,6 +3387,8 @@
old_write_domain);
}
+ list_for_each_entry(vma, &obj->vma_list, vma_link)
+ vma->node.color = cache_level;
obj->cache_level = cache_level;
i915_gem_verify_gtt(dev);
return 0;