msm: vidc: HDR10 PQ SEI generation for HEVC encoder
To enable HDR10 PQ feature, the userspace sets controls
for content light level and mastering display info. A
single property is set for both the controls to video
hardware so as to generate the SEI in encoded bitstream.
Use s64 datatype for minimum, maximum and default control
value to support UINT_MAX.
CRs-Fixed: 2100854
Change-Id: I42f8b11c5d3ccf0457d8088b2bdb30de3744e211
Signed-off-by: Umesh Pandey <umeshp@codeaurora.org>
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
index 001ca39..ca6d803 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
@@ -321,6 +321,10 @@
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x033)
#define HFI_PROPERTY_PARAM_VENC_IFRAMESIZE \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x034)
+#define HFI_PROPERTY_PARAM_VENC_SEND_OUTPUT_FOR_SKIPPED_FRAMES \
+ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x035)
+#define HFI_PROPERTY_PARAM_VENC_HDR10_PQ_SEI \
+ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x036)
#define HFI_PROPERTY_CONFIG_VENC_COMMON_START \
(HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000)
@@ -1058,4 +1062,24 @@
u32 packet_type;
u32 trigger_type;
};
+
+struct hfi_mastering_display_colour_sei_payload {
+ u32 display_primariesX[3];
+ u32 display_primariesY[3];
+ u32 white_pointX;
+ u32 white_pointY;
+ u32 max_display_mastering_luminance;
+ u32 min_display_mastering_luminance;
+};
+
+struct hfi_content_light_level_sei_payload {
+ u32 max_content_light;
+ u32 max_pic_average_light;
+};
+
+struct hfi_hdr10_pq_sei {
+ struct hfi_mastering_display_colour_sei_payload mdisp_info;
+ struct hfi_content_light_level_sei_payload cll_info;
+};
+
#endif