| commit | 196adf2f3015eacac0567278ba538e3ffdd16d0e | [log] [tgz] |
|---|---|---|
| author | Catalin Marinas <catalin.marinas@arm.com> | Mon Mar 24 10:35:35 2014 +0000 |
| committer | Catalin Marinas <catalin.marinas@arm.com> | Mon Mar 24 10:35:35 2014 +0000 |
| tree | 2dc6514b3263a9f3ed69b3b0ff34ef908afa5af7 | |
| parent | 214fdbe74a096c3aeb7af81d7900e2ab966b10d6 [diff] |
arm64: Remove pgprot_dmacoherent() Since this macro is identical to pgprot_writecombine() and is only used in a single place, remove it completely to avoid confusion. On ARMv7+ processors, the coherent DMA mapping must be Normal NonCacheable (a.k.a. writecombine) to avoid mismatched hardware attribute aliases (with the kernel linear mapping as Normal Cacheable). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>