tree 1a329f79c826febc5af299ef645801f85fb3a914
parent 2ccb396e9dd4536cfb7e8c4fd892d215c7aec2b6
author Thierry Reding <treding@nvidia.com> 1438600849 +0200
committer Thierry Reding <treding@nvidia.com> 1467624946 +0200

drm/tegra: dc: Implement runtime PM

Use runtime PM to clock-gate, assert reset and powergate the display
controller. This ties in nicely with atomic DPMS in that a runtime PM
reference is taken before a pipe is enabled and dropped after it has
been shut down.

To make sure this works, make sure to only ever update planes on active
CRTCs, otherwise register accesses to a clock-gated and reset CRTC will
hang the CPU.

Signed-off-by: Thierry Reding <treding@nvidia.com>