tree b9a757d6d0566420fe103c02d60f2b520e5c3880
parent 8112753bb2c0045398c89d0647792b39805f6d40
author Valentine Barshak <vbarshak@ru.mvista.com> 1190386209 +1000
committer Josh Boyer <jwboyer@linux.vnet.ibm.com> 1191414018 -0500

[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround

Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>