commit | 350405623ff3f447813eaef2035272bf05281671 | [log] [tgz] |
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author | Bob Paauwe <bob.j.paauwe@intel.com> | Thu Jun 25 14:54:07 2015 -0700 |
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Fri Jun 26 19:41:15 2015 +0200 |
tree | 68786b488fcaef15bf0df56765ac01482890ccef | |
parent | 267db663458a8077a087674fb85ea95f540d8671 [diff] |
drm/i915: Update rps frequencies for BXT Broxton is using a different register and different bit ordering for rps status capabilities. Also GT perf freqency register is different for Broxton so update that. Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>