drm/mms/dsi-staging: update dsc parsing error code
DSC param parsing may fail due to slice width alignment
issue. That should be treated as an error to avoid
null pointer access within pps command update.
Change-Id: Id60d95a5c4d24b8b130e2758e2cf03645e0720cd
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
index 6718156..7ade548 100644
--- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
+++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c
@@ -728,6 +728,10 @@
if (rc)
pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
+ pr_debug("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
+ mode->h_active, mode->h_front_porch, mode->h_back_porch,
+ mode->h_sync_width);
+
rc = of_property_read_u32(of_node, "qcom,mdss-dsi-panel-height",
&mode->v_active);
if (rc) {
@@ -759,6 +763,9 @@
rc);
goto error;
}
+ pr_debug("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
+ mode->v_active, mode->v_front_porch, mode->v_back_porch,
+ mode->v_sync_width);
error:
return rc;
@@ -2158,7 +2165,9 @@
intf_width = mode->timing.h_active;
if (intf_width % priv_info->dsc.slice_width) {
- pr_err("invalid slice width for the panel\n");
+ pr_err("invalid slice width for the intf width:%d slice width:%d\n",
+ intf_width, priv_info->dsc.slice_width);
+ rc = -EINVAL;
goto error;
}