| commit | 35faa55cff56441477973e454f62408714f35cd3 | [log] [tgz] |
|---|---|---|
| author | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | Thu Mar 15 18:42:31 2012 +0100 |
| committer | Grant Likely <grant.likely@secretlab.ca> | Thu Mar 15 15:14:13 2012 -0600 |
| tree | 933a91b2e07ba392fa04d2e00aaa0d99e4d8553e | |
| parent | bb9c5687e8cd02d6f8a3aea40c118b439cb09501 [diff] |
spi/fsl-espi: make the clock computation easier to read The -1 +1 thingy should probably do what DIV_ROUND_UP does. The 4 is 2 the "platform_clock => sysclock" and 2 from the computation part. The 64 is the same 4 times 16. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>