| commit | 37a28afbf1deb0c7e65248d5f9d347adc5a8c5da | [log] [tgz] |
|---|---|---|
| author | Santosh Mardi <gsantosh@codeaurora.org> | Thu Oct 12 13:03:31 2017 +0530 |
| committer | Santosh Mardi <gsantosh@codeaurora.org> | Fri Oct 13 15:00:05 2017 +0530 |
| tree | 55f0d41be1767e21d104f50b569e79468e613ed7 | |
| parent | 5b93637dbb74174bd19ebb6a3e2c3191f5cf7a4a [diff] |
ARM: dts: msm: update sdm670 devfreq node with proper cpu number In sdm670 we have 6 silver and 2 gold cores. Update the devfreq node with proper cpu number and proper PMU event for L3 cache miss event. Change-Id: I56d9217649ef51a0326401f7fe4c9ae8239bcea1 Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>