| commit | 3818f11740bbf87ad76f4f502f6739c8d62e5c17 | [log] [tgz] |
|---|---|---|
| author | Tomasz Figa <t.figa@samsung.com> | Tue Oct 15 19:41:18 2013 +0200 |
| committer | Tomasz Figa <t.figa@samsung.com> | Mon Dec 30 18:15:48 2013 +0100 |
| tree | 19cc5c3a76f11607db73d0bf500ea4da0f788de9 | |
| parent | 796d1f4cd62500ee55a645f2649b546710b11bd1 [diff] |
clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domain This patch adds mux_aclk_200_disp1_sub mux clock, which according to SoC documentation is the correct parent of DISP1 gate clocks. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com>