tree 239c48502a2a3bf054caddee3bb27b23d4777ec3
parent 3ff60f89bc4836583f5bd195062f16c563bd97aa
author Oscar Mateo <oscar.mateo@intel.com> 1402931459 +0100
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1403045358 +0200

drm/i915/bdw: Ack interrupts before handling them (GEN8)

Otherwise, we might receive a new interrupt before we have time to
ack the first one, eventually missing it.

The right order should be:

1 - Disable Master Interrupt Control.
2 - Find the category of interrupt that is pending.
3 - Find the source(s) of the interrupt and clear the Interrupt Identity bits (IIR)
4 - Process the interrupt(s) that had bits set in the IIRs.
5 - Re-enable Master Interrupt Control.

Without an atomic XCHG operation with mmio space, the above merely reduces the window
in which we can miss an interrupt (especially when you consider how heavyweight the
I915_READ/I915_WRITE operations are).

Spotted by Bob Beckett <robert.beckett@intel.com>.

v2: Add warning to commit message and comments to the code as per Chris Wilson's request.

v3: Improve the source code comment.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>