tree 1c4e6034b0d5485c4ed3d010acc2d60d52ec2ed8
parent a232f76732e11c91c2215d3a43cf9ebc7f939939
author Michael Chan <mchan@broadcom.com> 1128373359 -0700
committer David S. Miller <davem@davemloft.net> 1128373359 -0700

[TG3]: Refine AMD K8 write-reorder chipset test.

Test for VIA K8T800 north bridge instead of AMD K8 HyperTransport
bridge based on new information from Andi Kleen. The AMD
HyperTransport interface is not responsible for PCI transactions
and so the re-ordering is more likely done by the VIA north bridge.
This code is subject to change if we get more information from AMD
or VIA.

PCI Express devices are excluded from doing the read flush since all
chipsets in the write_reorder list are PCI chipsets.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>