commit | 39c41df9c1950fba0ee6a4e7a63be281e89fe437 | [log] [tgz] |
---|---|---|
author | Soren Brinkmann <soren.brinkmann@xilinx.com> | Wed Jul 31 16:24:59 2013 -0700 |
committer | Michal Simek <michal.simek@xilinx.com> | Tue Aug 13 16:37:35 2013 +0200 |
tree | 793a5765c09ff57451c33a255aa0575be950cf51 | |
parent | d4e4ab86bcba5a72779c43dc1459f71fea3d89c8 [diff] |
arm: zynq: dt: Set correct L2 ram latencies Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>