i2c: rcar: refactor status bit handling
The old macros made it harder to see what was actually happening.
Replace them with something more readable.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index 42005ccd..07256a6 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -87,6 +87,9 @@
#define RCAR_IRQ_RECV (MNRE | MALE | MSTE | MATE | MDRE)
#define RCAR_IRQ_STOP (MSTE)
+#define RCAR_IRQ_ACK_SEND (~(MAT | MDE))
+#define RCAR_IRQ_ACK_RECV (~(MAT | MDR))
+
/*
* flags
*/
@@ -268,27 +271,18 @@
* status functions
*/
-#define rcar_i2c_status_clear(priv) rcar_i2c_status_bit_clear(priv, 0xffffffff)
-static void rcar_i2c_status_bit_clear(struct rcar_i2c_priv *priv, u32 bit)
-{
- rcar_i2c_write(priv, ICMSR, ~bit);
-}
-
static int rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
{
int read = !!rcar_i2c_is_recv(priv);
rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read);
- rcar_i2c_status_clear(priv);
+ rcar_i2c_write(priv, ICMSR, 0);
rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
return 0;
}
-#define rcar_i2c_send_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDE))
-#define rcar_i2c_recv_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDR))
-
/*
* interrupt functions
*/
@@ -348,7 +342,7 @@
return ID_DONE;
}
- rcar_i2c_send_restart(priv);
+ rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
return 0;
}
@@ -389,7 +383,7 @@
else
rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
- rcar_i2c_recv_restart(priv);
+ rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
return 0;
}
@@ -452,7 +446,7 @@
out:
if (rcar_i2c_flags_has(priv, ID_DONE)) {
rcar_i2c_write(priv, ICMIER, 0);
- rcar_i2c_status_clear(priv);
+ rcar_i2c_write(priv, ICMSR, 0);
wake_up(&priv->wait);
}