tree bc17da1cc3f192ade4e939e0ae1193a9a66a0bb0
parent 62125a46cd717ad8fa6a64d260d46a0a108e6222
author J Keerthy <j-keerthy@ti.com> 1374561337 +0530
committer Mike Turquette <mturquette@linaro.org> 1389990931 -0800

CLK: TI: DRA7: Add APLL support

The patch adds support for DRA7 PCIe APLL. The APLL
sources the optional functional clocks for PCIe module.

APLL stands for Analog PLL. This is different when comapred
with DPLL meaning Digital PLL, the phase detection is done
using an analog circuit.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>